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-rwxr-xr-xsrc/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C1
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C12
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H71
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C143
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C16
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H9
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/utils/assert_noexit.H61
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/freq_workarounds.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C7
-rwxr-xr-xsrc/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml19
-rw-r--r--src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml44
12 files changed, 264 insertions, 125 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
index b62574bdc..33780c16f 100755
--- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C
@@ -36,6 +36,7 @@
#include <utility>
// mss lib
+#include <lib/freq/nimbus_freq_traits.H>
#include <lib/utils/fake_vpd.H>
#include <lib/mss_vpd_decoder.H>
#include <generic/memory/lib/spd/common/rcw_settings.H>
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
index 20231cfcd..2d9882a15 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.C
@@ -40,7 +40,7 @@
#include <lib/mss_vpd_decoder.H>
#include <lib/dimm/rank.H>
-#include <lib/utils/assert_noexit.H>
+#include <generic/memory/lib/utils/assert_noexit.H>
#include <lib/eff_config/plug_rules.H>
using fapi2::TARGET_TYPE_MCA;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
index 889c8e013..83f99bc09 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
@@ -42,7 +42,7 @@
#include <generic/memory/lib/utils/scom.H>
#include <lib/fir/fir.H>
#include <lib/fir/check.H>
-#include <lib/utils/assert_noexit.H>
+#include <generic/memory/lib/utils/assert_noexit.H>
#include <generic/memory/lib/utils/find.H>
using fapi2::TARGET_TYPE_MCBIST;
@@ -231,7 +231,7 @@ fapi2::ReturnCode during_draminit_training( const fapi2::Target<fapi2::TARGET_TY
fapi_try_exit:
// Handle any fails seen above accordingly
- return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>( l_mca, fapi2::current_err, l_check_fir);
+ return mss::check::fir_or_pll_fail( l_mca, fapi2::current_err, l_check_fir);
}
// Declares FIR registers that are re-used between multiple functions
@@ -378,7 +378,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Note: we return out if any FIR is bad
for(const auto& l_fir_reg : MCBIST_FIR_REGS)
{
- FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(i_target, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask(i_target, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(i_target, o_fir_error, io_rc);
@@ -395,7 +395,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
{
for(const auto& l_fir_reg : MCA_FIR_REGS)
{
- FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(l_mca, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask(l_mca, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(l_mca, o_fir_error, io_rc);
@@ -441,7 +441,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Note: we return out if any FIR is bad
for(const auto& l_fir_reg : MCBIST_FIR_REGS)
{
- FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(l_mcbist, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask(l_mcbist, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(l_mcbist, o_fir_error, io_rc);
@@ -456,7 +456,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Loop through all MCA FIR's
for(const auto& l_fir_reg : MCA_FIR_REGS)
{
- FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(i_target, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask(i_target, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(i_target, o_fir_error, io_rc);
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H
index 6c9d47a34..4818eeeb1 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_freq_traits.H
@@ -22,3 +22,74 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+
+///
+/// @file nimbus_freq_traits.H
+/// @brief Contains frequency traits information for Nimbus
+///
+// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP FW Owner: Andre Marin <aamarin@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: CI
+
+#ifndef _NIMBUS_FREQ_TRAITS_H_
+#define _NIMBUS_FREQ_TRAITS_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/utils/freq/gen_mss_freq_traits.H>
+#include <vpd_access.H>
+#include <generic/memory/lib/utils/freq/gen_mss_freq.H>
+
+namespace mss
+{
+
+///
+/// @class Traits and policy class for frequency and synchronous code - specialization for the NIMBUS processor type
+///
+template<>
+class frequency_traits<mss::proc_type::NIMBUS>
+{
+ public:
+ //////////////////////////////////////////////////////////////
+ // Target types
+ //////////////////////////////////////////////////////////////
+ static constexpr fapi2::TargetType PORT_TARGET_TYPE = fapi2::TARGET_TYPE_MCA;
+ static constexpr fapi2::TargetType FREQ_TARGET_TYPE = fapi2::TARGET_TYPE_MCBIST;
+ static constexpr fapi2::TargetType VPD_TARGET_TYPE = fapi2::TARGET_TYPE_MCS;
+
+ //////////////////////////////////////////////////////////////
+ // Traits values
+ //////////////////////////////////////////////////////////////
+ static const std::vector<uint64_t> SUPPORTED_FREQS;
+ // MCBIST is our frequency domain. So 4 ports per MCBIST
+ static constexpr uint64_t PORTS_PER_FREQ_DOMAIN = 4;
+ // Max DIMM's per port
+ static constexpr uint64_t MAX_DIMM_PER_PORT = 2;
+ // Maxium number of primary ranks on a DIMM
+ static constexpr uint64_t MAX_PRIMARY_RANK_PER_DIMM = 4;
+ // MC type for Nimbus is constant - NIMBUS
+ static constexpr mss::mc_type MC = mss::mc_type::NIMBUS;
+ static constexpr const char* PROC_STR = "NIMBUS";
+
+ // VPD traits values
+ // VPD keyword max is slightly repeated (it's in NIMBUS consts too)
+ static constexpr uint64_t VPD_KEYWORD_MAX = 255;
+ static constexpr const char* VPD_BLOB_NAME = "MR";
+ static constexpr auto VPD_BLOB = fapi2::MemVpdData::MR;
+ static constexpr auto LRDIMM_TYPE = fapi2::ENUM_ATTR_EFF_DIMM_TYPE_LRDIMM;
+
+ // Coding minion, why have these explicitly defined frequency values?
+ // Isn't the supported frequency vector used for this purpose?
+ // Well, we need to callout the specific frequency values that are allowed on a given system
+ // As we can't callout a vector in error callouts and each traits might have a different number of allowable traits,
+ // the below values are hardcoded specifically for the error callouts
+ static constexpr uint64_t SUPPORTED_FREQ0 = DIMM_SPEED_1866;
+ static constexpr uint64_t SUPPORTED_FREQ1 = DIMM_SPEED_2133;
+ static constexpr uint64_t SUPPORTED_FREQ2 = DIMM_SPEED_2400;
+ static constexpr uint64_t SUPPORTED_FREQ3 = DIMM_SPEED_2666;
+};
+
+} // ns mss
+#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
index 0a1f6b8b7..37a13275b 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/nimbus_mss_freq.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -39,14 +39,14 @@
// Memory libraries
#include <lib/mss_attribute_accessors.H>
-#include <lib/utils/assert_noexit.H>
#include <lib/shared/mss_const.H>
+#include <lib/freq/nimbus_freq_traits.H>
#include <lib/freq/sync.H>
#include <lib/workarounds/freq_workarounds.H>
// Generic libraries
+#include <generic/memory/lib/utils/assert_noexit.H>
#include <generic/memory/lib/utils/count_dimm.H>
-#include <generic/memory/lib/utils/freq/gen_mss_freq_traits.H>
#include <generic/memory/lib/utils/freq/gen_mss_freq.H>
#include <generic/memory/lib/utils/freq/mss_freq_scoreboard.H>
@@ -94,7 +94,7 @@ fapi2::ReturnCode set_CL_attr<mss::proc_type::NIMBUS>(
FAPI_ASSERT( l_temp[l_index] == i_cas_latency,
fapi2::MSS_BAD_CL_CAST()
.set_CL(i_cas_latency)
- .set_MCA_TARGET(i_target),
+ .set_PORT_TARGET(i_target),
"%s bad cast for cas latency from %d to %d",
mss::c_str(i_target),
i_cas_latency,
@@ -169,6 +169,133 @@ fapi2::ReturnCode get_dimm_type<mss::proc_type::NIMBUS>(
}
///
+/// @brief Calls out the code if we calculated a bad frequency for the domain - specialization for NIMBUS and MCBIST
+/// @param[in] i_target target on which to operate
+/// @param[in] i_final_freq frequency calculated for domain
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode callout_bad_freq_calculated<mss::proc_type::NIMBUS>(
+ const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target,
+ const uint64_t i_final_freq)
+{
+ using TT = mss::frequency_traits<mss::proc_type::NIMBUS>;
+
+ // Declaring temporary variables to avoid linker errors associated with FAPI_ASSERT
+ const auto FREQ0 = TT::SUPPORTED_FREQ0;
+ const auto FREQ1 = TT::SUPPORTED_FREQ1;
+ const auto FREQ2 = TT::SUPPORTED_FREQ2;
+ const auto FREQ3 = TT::SUPPORTED_FREQ3;
+
+ // If we don't find a valid frequency OR don't get a 0 (nothing configured on this clock domain), then error out
+ FAPI_ASSERT( std::binary_search(TT::SUPPORTED_FREQS.begin(), TT::SUPPORTED_FREQS.end(), i_final_freq) ||
+ i_final_freq == 0,
+ fapi2::MSS_BAD_FREQ_CALCULATED()
+ .set_MSS_FREQ(i_final_freq)
+ .set_TARGET(i_target)
+ .set_PROC_TYPE(mss::proc_type::NIMBUS)
+ .set_SUPPORTED_FREQ_0(FREQ0)
+ .set_SUPPORTED_FREQ_1(FREQ1)
+ .set_SUPPORTED_FREQ_2(FREQ2)
+ .set_SUPPORTED_FREQ_3(FREQ3),
+ "%s: Calculated FREQ (%d) isn't supported",
+ mss::c_str(i_target),
+ i_final_freq);
+
+ return fapi2::FAPI2_RC_SUCCESS;
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Configures the number of ranks in the VPD accessor - specialization for Nimbus and MCBIST
+/// @param[in] i_target the target on which to set the frequency values
+/// @param[in,out] io_vpd_info VPD information that needs to be configured
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode configure_vpd_ranks<mss::proc_type::NIMBUS>(
+ const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ fapi2::VPDInfo<fapi2::TARGET_TYPE_MCS>& io_vpd_info)
+{
+ using TT = mss::frequency_traits<mss::proc_type::NIMBUS>;
+
+ uint8_t l_rank_count_dimm[TT::MAX_DIMM_PER_PORT] = {};
+ uint8_t l_dimm_type[TT::MAX_DIMM_PER_PORT] = {};
+
+ // ATTR to update
+ // Note: this flat out assumes that we have two DIMM per port max.
+ // This goes against the directive to have arrays be dynamic in length and derived from ATTR's
+ FAPI_TRY( get_master_rank_per_dimm<mss::proc_type::NIMBUS>(i_target, &(l_rank_count_dimm[0])) );
+ FAPI_TRY( get_dimm_type<mss::proc_type::NIMBUS>(i_target, &(l_dimm_type[0])) );
+
+ // So for LRDIMM, our SI works a bit differently than for non-LRDIMM
+ // LRDIMM's have buffers that operate on a per-DIMM basis across multiple ranks
+ // As such, they act as a single load, similar to a 1R DIMM would
+ // per the IBM signal integrity team, the 1R DIMM settings should be used for LRDIMM's
+ // So, if we are LRDIMM's and have ranks, we want to only note it as a 1R DIMM for purposes of querying the VPD
+ FAPI_DBG("%s for DIMM 0 rank count %u dimm type %u %s",
+ mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM");
+ FAPI_DBG("%s for DIMM 1 rank count %u dimm type %u %s",
+ mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM");
+
+ l_rank_count_dimm[0] = ((l_dimm_type[0] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[0] > 0)) ? 1 : l_rank_count_dimm[0];
+ l_rank_count_dimm[1] = ((l_dimm_type[1] == TT::LRDIMM_TYPE) && (l_rank_count_dimm[1] > 0)) ? 1 : l_rank_count_dimm[1];
+
+ FAPI_DBG("after LR modification %s for DIMM 0 rank count %u dimm type %u %s",
+ mss::c_str(i_target), l_rank_count_dimm[0], l_dimm_type[0], l_dimm_type[0] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM");
+ FAPI_DBG("after LR modification %s for DIMM 1 rank count %u dimm type %u %s",
+ mss::c_str(i_target), l_rank_count_dimm[1], l_dimm_type[1], l_dimm_type[1] == TT::LRDIMM_TYPE ? "LRDIMM" : "RDIMM");
+
+ io_vpd_info.iv_rank_count_dimm_0 = l_rank_count_dimm[0];
+ io_vpd_info.iv_rank_count_dimm_1 = l_rank_count_dimm[1];
+
+ FAPI_INF("%s. VPD info - rank count for dimm_0: %d, dimm_1: %d",
+ mss::c_str(i_target), io_vpd_info.iv_rank_count_dimm_0, io_vpd_info.iv_rank_count_dimm_1);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Check VPD config for support of a given freq - specialization for NIMBUS
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_proposed_freq frequency to check for support
+/// @param[out] o_supported true if VPD supports the proposed frequency
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+template<>
+fapi2::ReturnCode check_freq_support_vpd<mss::proc_type::NIMBUS>(
+ const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
+ const uint64_t i_proposed_freq,
+ bool& o_supported)
+{
+ using TT = mss::frequency_traits<mss::proc_type::NIMBUS>;
+
+ o_supported = false;
+
+ fapi2::VPDInfo<TT::VPD_TARGET_TYPE> l_vpd_info(TT::VPD_BLOB);
+
+ const auto& l_vpd_target = mss::find_target<TT::VPD_TARGET_TYPE>(i_target);
+
+ // Configures the number of ranks for the VPD configuration
+ FAPI_TRY( configure_vpd_ranks<mss::proc_type::NIMBUS>(i_target, l_vpd_info),
+ "%s failed to configure VPD ranks", mss::c_str(i_target));
+ l_vpd_info.iv_is_config_ffdc_enabled = false;
+
+ l_vpd_info.iv_freq_mhz = i_proposed_freq;
+ FAPI_INF("VPD info - DDR frequency: %d MT/s", i_proposed_freq);
+
+ // Checks if this VPD configuration is supported
+ FAPI_TRY(is_vpd_config_supported<mss::proc_type::NIMBUS>(l_vpd_target, i_proposed_freq, l_vpd_info, o_supported),
+ "%s failed to determine if %u freq is supported", mss::c_str(i_target), i_proposed_freq);
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
/// @brief Update supported frequency scoreboard according to processor limits - specialization for NIMBUS and MCBIST
/// @param[in] i_target processor frequency domain
/// @param[in,out] io_scoreboard scoreboard of port targets supporting each frequency
@@ -211,10 +338,10 @@ fapi2::ReturnCode num_master_ranks_per_dimm<mss::proc_type::NIMBUS>(const fapi2:
/// @return FAPI2_RC_SUCCESS iff ok
///
template<>
-fapi2::ReturnCode callout_no_common_freq<mss::proc_type::NIMBUS>(const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>&
- i_target,
- const bool l_supported_freq,
- const uint64_t i_num_ports)
+fapi2::ReturnCode callout_no_common_freq<mss::proc_type::NIMBUS>(
+ const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_target,
+ const bool l_supported_freq,
+ const uint64_t i_num_ports)
{
std::vector<uint32_t> l_max_mrw_freqs(NUM_MAX_FREQS, 0);
uint8_t l_req_sync_mode = 0;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C
index 9b864695a..8c9b1ccc5 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -40,17 +40,17 @@
#include <map>
// Memory libraries
+#include <lib/freq/nimbus_freq_traits.H>
#include <lib/freq/sync.H>
#include <lib/mss_attribute_accessors.H>
-#include <lib/utils/assert_noexit.H>
// Generic libraries
+#include <generic/memory/lib/utils/assert_noexit.H>
#include <generic/memory/lib/utils/find.H>
#include <generic/memory/lib/utils/count_dimm.H>
#include <generic/memory/lib/spd/spd_facade.H>
#include <generic/memory/lib/spd/spd_utils.H>
#include <generic/memory/lib/utils/conversions.H>
-#include <generic/memory/lib/utils/freq/gen_mss_freq_traits.H>
#include <generic/memory/lib/utils/freq/gen_mss_freq.H>
#include <generic/memory/lib/utils/freq/mss_freq_scoreboard.H>
@@ -97,7 +97,7 @@ fapi2::ReturnCode dimm_speed_map(const std::vector< fapi2::Target<TARGET_TYPE_MC
// Getting error cross initializing with the Assert
// find_if should work if passed in an empty vector. begin() and end() will match and it'll exit without trying freq()
FAPI_ASSERT( !i_targets.empty(),
- fapi2::MSS_EMPTY_MCBIST_VECTOR_PASSED(),
+ fapi2::MSS_EMPTY_FREQ_TARGET_VECTOR_PASSED(),
"Empty MCBIST target vector found when constructing dimm speed mapping!" );
@@ -109,7 +109,7 @@ fapi2::ReturnCode dimm_speed_map(const std::vector< fapi2::Target<TARGET_TYPE_MC
// It has a valid freq
// Thus, this shouldn't ever happen, but let's check anyways
FAPI_ASSERT( l_found_comp != i_targets.end(),
- fapi2::MSS_ALL_MCBIST_HAVE_0_FREQ()
+ fapi2::MSS_ALL_TARGETS_HAVE_0_FREQ()
.set_VECTOR_SIZE(i_targets.size()),
"All MCBIST have 0 MSS_FREQ, but there are dimms?");
@@ -178,10 +178,10 @@ bool deconfigure(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target,
l_is_hw_deconfigured = true;
MSS_ASSERT_NOEXIT(false,
- fapi2::MSS_FREQ_NOT_EQUAL_NEST_FREQ()
+ fapi2::MSS_FREQ_NOT_EQUAL_MAX_DOMAIN_FREQ()
.set_MSS_FREQ(i_dimm_speed)
- .set_NEST_FREQ(i_nest_freq)
- .set_MCS_TARGET(l_mcs),
+ .set_DOMAIN_FREQ(i_nest_freq)
+ .set_DOMAIN_TARGET(l_mcs),
"Deconfiguring %s due to unequal frequencies: mss: %d, nest: %d",
mss::c_str(l_mcs),
i_dimm_speed,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H
index 7a780c310..4f8624890 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/freq/sync.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2018 */
+/* Contributors Listed Below - COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -39,6 +39,7 @@
#include <vector>
#include <fapi2.H>
+#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
#include <lib/shared/mss_const.H>
#include <generic/memory/lib/utils/freq/mss_freq_scoreboard.H>
#include <generic/memory/lib/utils/c_str.H>
@@ -67,12 +68,6 @@ inline bool is_nest_freq_valid (const uint64_t i_proposed_freq)
return ( std::binary_search(NIMBUS_NEST_FREQS.begin(), NIMBUS_NEST_FREQS.end(), i_proposed_freq) );
}
-enum class speed_equality : uint8_t
-{
- NOT_EQUAL_DIMM_SPEEDS = 0, ///< denotes all DIMMs don't have the same speed
- EQUAL_DIMM_SPEEDS = 1, ///< denotes all DIMMs have the same speed
-};
-
///
/// @brief Retrieves a mapping of MSS frequency values per mcbist target
/// @param[in] i_targets vector of controller targets
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/assert_noexit.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/assert_noexit.H
deleted file mode 100644
index 35f0b68d4..000000000
--- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/assert_noexit.H
+++ /dev/null
@@ -1,61 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG */
-/* This is an automatically generated prolog. */
-/* */
-/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/utils/assert_noexit.H $ */
-/* */
-/* OpenPOWER HostBoot Project */
-/* */
-/* Contributors Listed Below - COPYRIGHT 2016,2017 */
-/* [+] International Business Machines Corp. */
-/* */
-/* */
-/* Licensed under the Apache License, Version 2.0 (the "License"); */
-/* you may not use this file except in compliance with the License. */
-/* You may obtain a copy of the License at */
-/* */
-/* http://www.apache.org/licenses/LICENSE-2.0 */
-/* */
-/* Unless required by applicable law or agreed to in writing, software */
-/* distributed under the License is distributed on an "AS IS" BASIS, */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
-/* implied. See the License for the specific language governing */
-/* permissions and limitations under the License. */
-/* */
-/* IBM_PROLOG_END_TAG */
-
-///
-/// @file assert_noexit.H
-/// @brief MSS specific assert, but don't exit macro
-///
-// *HWP HWP Owner: Stephen Glancy <sglancy@us.ibm.com>
-// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
-// *HWP Team: Memory
-// *HWP Level: 3
-// *HWP Consumed by: HB:FSP
-
-#ifndef _MSS_ASSERT_NOEXIT_H_
-#define _MSS_ASSERT_NOEXIT_H_
-
-#include <fapi2.H>
-
-///
-/// @brief Create an error log based on __conditional__,
-/// the FFDC gathering function is called and the
-/// trace is output as a FAPI error trace. An error log
-/// is created. fapi2::current_err is set to indicate there was
-/// an error so the caller can ripple thru accordingly
-/// The caller is responsible for handling the error object.
-///
-/// @param[in] __conditional__ the condition to assert
-/// @param[in] __ffdc__ the FFDC gathering function
-/// @param[in] ... varargs, as input to FAPI_ERR
-///
-#define MSS_ASSERT_NOEXIT( __conditional__, __ffdc__, ... ) \
- if (! (__conditional__)) \
- { \
- __ffdc__.execute(fapi2::FAPI2_ERRL_SEV_UNDEFINED, true); \
- FAPI_ERR(__VA_ARGS__); \
- fapi2::current_err = fapi2::FAPI2_RC_FALSE; \
- }
-
-#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/freq_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/freq_workarounds.C
index 40b6ed54c..ff1aa8588 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/freq_workarounds.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/freq_workarounds.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -37,7 +37,7 @@
#include <mss.H>
#include <lib/workarounds/freq_workarounds.H>
-#include <lib/utils/assert_noexit.H>
+#include <generic/memory/lib/utils/assert_noexit.H>
namespace mss
{
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
index 34eae3e9b..7d770fc13 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2018 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -45,8 +45,10 @@
#include <fapi2.H>
// mss lib
+#include <lib/freq/nimbus_freq_traits.H>
#include <generic/memory/lib/utils/count_dimm.H>
#include <generic/memory/lib/utils/freq/gen_mss_freq.H>
+#include <generic/memory/lib/data_engine/pre_data_init.H>
using fapi2::TARGET_TYPE_MCS;
using fapi2::TARGET_TYPE_MCA;
@@ -81,6 +83,9 @@ extern "C"
return FAPI2_RC_SUCCESS;
}
+ // We will first set pre-eff_config attributes
+ FAPI_TRY(mss::set_pre_init_attrs<mss::proc_type::NIMBUS>(l_mcbist));
+
FAPI_TRY(mss::generate_freq<mss::proc_type::NIMBUS>(l_mcbist));
fapi_try_exit:
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
index 2e8fb7167..b4ab25916 100755
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml
@@ -530,25 +530,6 @@
</attribute>
<attribute>
- <id>ATTR_MSS_MRW_SUPPORTED_FREQ</id>
- <targetType>TARGET_TYPE_SYSTEM</targetType>
- <description>
- List of memory frequencies supported by the current system.
- </description>
- <valueType>uint32</valueType>
- <array>4</array>
- <platInit/>
- <!-- Note, mirrors ATTR_MSS_FREQ -->
- <enum>
- MT1866 = 1866,
- MT2133 = 2133,
- MT2400 = 2400,
- MT2666 = 2666
- </enum>
- <default> 1866, 2133, 2400, 2666 </default>
- </attribute>
-
- <attribute>
<id>ATTR_MSS_MRW_UNSUPPORTED_RANK_CONFIG</id>
<targetType>TARGET_TYPE_MCS</targetType>
<description>
diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml
index 8eac08abd..4a1b6f51f 100644
--- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml
+++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_freq.xml
@@ -5,7 +5,7 @@
<!-- -->
<!-- OpenPOWER HostBoot Project -->
<!-- -->
-<!-- Contributors Listed Below - COPYRIGHT 2015,2018 -->
+<!-- Contributors Listed Below - COPYRIGHT 2015,2019 -->
<!-- [+] International Business Machines Corp. -->
<!-- -->
<!-- -->
@@ -47,7 +47,7 @@
</callout>
<callout>
<childTargets>
- <parent>MCA_TARGET</parent>
+ <parent>PORT_TARGET</parent>
<childType>TARGET_TYPE_DIMM</childType>
</childTargets>
<priority>MEDIUM</priority>
@@ -55,27 +55,47 @@
</hwpError>
<hwpError>
- <rc>RC_MSS_FREQ_NOT_EQUAL_NEST_FREQ</rc>
+ <rc>RC_MSS_BAD_FREQ_CALCULATED</rc>
+ <description>
+ No frequency found for MC Either bad mrw attribute or no DIMMS installed?
+ Should be a code bug if we get here
+ </description>
+ <ffdc>MSS_FREQ</ffdc>
+ <ffdc>SUPPORTED_FREQ_0</ffdc>
+ <ffdc>SUPPORTED_FREQ_1</ffdc>
+ <ffdc>SUPPORTED_FREQ_2</ffdc>
+ <ffdc>SUPPORTED_FREQ_3</ffdc>
+ <ffdc>TARGET</ffdc>
+ <ffdc>PROC_TYPE</ffdc>
+ <callout>
+ <procedure>CODE</procedure>
+ <priority>HIGH</priority>
+ </callout>
+ </hwpError>
+
+ <hwpError>
+ <rc>RC_MSS_FREQ_NOT_EQUAL_MAX_DOMAIN_FREQ</rc>
<description>
Case when mss_freq speeds are different and sync mode is required,
- and mss_freq is not equal to nest freq.
+ and mss_freq is not equal to max freq in domain.
</description>
<ffdc>MSS_FREQ</ffdc>
- <ffdc>NEST_FREQ</ffdc>
+ <ffdc>DOMAIN_FREQ</ffdc>
+ <ffdc>DOMAIN_TARGET</ffdc>
<callout>
<procedure>CODE</procedure>
<priority>MEDIUM</priority>
</callout>
<callout>
<childTargets>
- <parent>MCS_TARGET</parent>
+ <parent>DOMAIN_TARGET</parent>
<childType>TARGET_TYPE_DIMM</childType>
</childTargets>
<priority>HIGH</priority>
</callout>
<deconfigure>
<childTargets>
- <parent>MCS_TARGET</parent>
+ <parent>DOMAIN_TARGET</parent>
<childType>TARGET_TYPE_DIMM</childType>
</childTargets>
</deconfigure>
@@ -96,9 +116,9 @@
</hwpError>
<hwpError>
- <rc>RC_MSS_EMPTY_MCBIST_VECTOR_PASSED</rc>
+ <rc>RC_MSS_EMPTY_FREQ_TARGET_VECTOR_PASSED</rc>
<description>
- Empty MCBIST target vector found when constructing dimm speed mapping
+ Empty freq target vector found when constructing dimm speed mapping
</description>
<callout>
<procedure>CODE</procedure>
@@ -144,9 +164,9 @@
</hwpError>
<hwpError>
- <rc>RC_MSS_ALL_MCBIST_HAVE_0_FREQ</rc>
+ <rc>RC_MSS_ALL_TARGETS_HAVE_0_FREQ</rc>
<description>
- All MCBIST have 0 MSS_FREQ, but there are dimms still configured?
+ All targets in the freq domain (MCBIST or port) have 0 MSS_FREQ, but there are dimms still configured?
</description>
<ffdc>VECTOR_SIZE</ffdc>
<callout>
@@ -275,7 +295,7 @@
</callout>
<callout>
<childTargets>
- <parent>MCA_TARGET</parent>
+ <parent>PORT_TARGET</parent>
<childType>TARGET_TYPE_DIMM</childType>
</childTargets>
<priority>MEDIUM</priority>
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