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diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
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+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_memdiag.C
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+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: chips/p9/procedures/hwp/memory/p9_mss_memdiag.C $ */
+/* */
+/* IBM CONFIDENTIAL */
+/* */
+/* EKB Project */
+/* */
+/* COPYRIGHT 2015 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* The source code for this program is not published or otherwise */
+/* divested of its trade secrets, irrespective of what has been */
+/* deposited with the U.S. Copyright Office. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+///
+/// @file p9_mss_memdiag.C
+/// @brief Mainstore pattern testing
+///
+// *HWP HWP Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com>
+// *HWP FW Owner: Brian Silver <bsilver@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 1
+// *HWP Consumed by: FSP:HB
+
+#include <fapi2.H>
+
+using fapi2::TARGET_TYPE_MCBIST;
+
+extern "C"
+{
+///
+/// @brief Pattern test the DRAM
+/// @param[in] i_target, the McBIST of the ports of the dram you're training
+/// @return FAPI2_RC_SUCCESS iff ok
+///
+ fapi2::ReturnCode p9_mss_memdiag( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target )
+ {
+ FAPI_INF("Start memdiag");
+ FAPI_INF("End memdiag");
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+}
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