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-rw-r--r--src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C
index 4b1df09f4..ed955b478 100644
--- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C
+++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_draminit.C
@@ -144,12 +144,13 @@ extern "C"
// Load RCD control words
FAPI_TRY( mss::rcd_load(i_target) );
+ // Register has been configured, so we can unmask 'training' errors which includes parity
+ // which we want to see during MRS load
+ FAPI_TRY( mss::unmask_training_errors(i_target) );
+
// Load MRS
FAPI_TRY( mss::mrs_load(i_target) );
- // If we're all good, set up things so training's errors are in the right state
- FAPI_TRY( mss::unmask_training_errors(i_target) );
-
fapi_try_exit:
FAPI_INF("End draminit: %s (0x%lx)", mss::c_str(i_target), uint64_t(fapi2::current_err));
return fapi2::current_err;
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