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-rw-r--r--src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
index a15b4d47d..1c70a3918 100644
--- a/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
+++ b/src/import/chips/centaur/procedures/hwp/memory/p9c_mss_eff_config.H
@@ -120,7 +120,7 @@ struct mss_eff_config_spd_data
uint32_t trfc4min[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT];
uint8_t twtrsmin[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT];
uint8_t twtrlmin[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT];
- uint32_t addr_map_reg_to_dram[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT]; // Assuming right align based on dimm_spd_attributes.xml
+ uint8_t addr_map_reg_to_dram[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT]; // Assuming right align based on dimm_spd_attributes.xml
// Not needed for GA1 CDIMM, will need to enable check for ISDIMM.
uint8_t sdram_optional_features[MAX_PORTS_PER_MBA][MAX_DIMM_PER_PORT];
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