diff options
Diffstat (limited to 'src/build')
| -rw-r--r-- | src/build/buildpnor/defaultPnorLayout.xml | 76 | ||||
| -rw-r--r-- | src/build/buildpnor/pnorLayoutFSP.xml | 74 | ||||
| -rwxr-xr-x | src/build/debug/Hostboot/Dump.pm | 19 | ||||
| -rwxr-xr-x | src/build/debug/fsp-memdump.sh | 22 | ||||
| -rwxr-xr-x | src/build/simics/standalone.simics | 14 |
5 files changed, 105 insertions, 100 deletions
diff --git a/src/build/buildpnor/defaultPnorLayout.xml b/src/build/buildpnor/defaultPnorLayout.xml index 2eb0f54e4..dd9c4ae7a 100644 --- a/src/build/buildpnor/defaultPnorLayout.xml +++ b/src/build/buildpnor/defaultPnorLayout.xml @@ -79,18 +79,9 @@ Layout Description </side> </metadata> <section> - <description>Hostboot Base (576K)</description> - <eyeCatch>HBB</eyeCatch> - <physicalOffset>0x8000</physicalOffset> - <physicalRegionSize>0x90000</physicalRegionSize> - <sha512Version/> - <side>sideless</side> - <ecc/> - </section> - <section> <description>Hostboot Error Logs (144K)</description> <eyeCatch>HBEL</eyeCatch> - <physicalOffset>0x98000</physicalOffset> + <physicalOffset>0x8000</physicalOffset> <physicalRegionSize>0x24000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -98,25 +89,16 @@ Layout Description <section> <description>Guard Data (20K)</description> <eyeCatch>GUARD</eyeCatch> - <physicalOffset>0xBC000</physicalOffset> + <physicalOffset>0x2C000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> </section> <section> - <description>Hostboot Data (1.125M)</description> - <eyeCatch>HBD</eyeCatch> - <physicalOffset>0xC1000</physicalOffset> - <physicalRegionSize>0x120000</physicalRegionSize> - <sha512Version/> - <side>sideless</side> - <ecc/> - </section> - <section> <description>DIMM JEDEC (288K)</description> <eyeCatch>DJVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x1E1000</physicalOffset> + <physicalOffset>0x31000</physicalOffset> <physicalRegionSize>0x48000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -125,7 +107,7 @@ Layout Description <description>Module VPD (576K)</description> <eyeCatch>MVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x229000</physicalOffset> + <physicalOffset>0x79000</physicalOffset> <physicalRegionSize>0x90000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -134,15 +116,33 @@ Layout Description <description>Centaur VPD (288K)</description> <eyeCatch>CVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x2B9000</physicalOffset> + <physicalOffset>0x109000</physicalOffset> <physicalRegionSize>0x48000</physicalRegionSize> <side>sideless</side> <ecc/> </section> <section> + <description>Hostboot Base (1MB)</description> + <eyeCatch>HBB</eyeCatch> + <physicalOffset>0x151000</physicalOffset> + <physicalRegionSize>0x100000</physicalRegionSize> + <side>sideless</side> + <sha512Version/> + <ecc/> + </section> + <section> + <description>Hostboot Data (1.125M)</description> + <eyeCatch>HBD</eyeCatch> + <physicalOffset>0x251000</physicalOffset> + <physicalRegionSize>0x120000</physicalRegionSize> + <sha512Version/> + <side>sideless</side> + <ecc/> + </section> + <section> <description>Hostboot Extended image (11MB w/o ECC)</description> <eyeCatch>HBI</eyeCatch> - <physicalOffset>0x301000</physicalOffset> + <physicalOffset>0x371000</physicalOffset> <physicalRegionSize>0xC60000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -162,7 +162,7 @@ Layout Description <section> <description>SBE-IPL (Staging Area) (520K)</description> <eyeCatch>SBE</eyeCatch> - <physicalOffset>0xF61000</physicalOffset> + <physicalOffset>0xFD1000</physicalOffset> <physicalRegionSize>0x82000</physicalRegionSize> <sha512perEC/> <sha512Version/> @@ -172,7 +172,7 @@ Layout Description <section> <description>HCODE Ref Image (1.125MB)</description> <eyeCatch>HCODE</eyeCatch> - <physicalOffset>0xFE3000</physicalOffset> + <physicalOffset>0x1053000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -181,7 +181,7 @@ Layout Description <section> <description>Hostboot Runtime Services for Sapphire (4.5MB)</description> <eyeCatch>HBRT</eyeCatch> - <physicalOffset>0x1103000</physicalOffset> + <physicalOffset>0x1173000</physicalOffset> <physicalRegionSize>0x480000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -190,7 +190,7 @@ Layout Description <section> <description>Payload (21.375MB)</description> <eyeCatch>PAYLOAD</eyeCatch> - <physicalOffset>0x1583000</physicalOffset> + <physicalOffset>0x15F3000</physicalOffset> <physicalRegionSize>0x1560000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -199,7 +199,7 @@ Layout Description <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TEST</eyeCatch> - <physicalOffset>0x2AE3000</physicalOffset> + <physicalOffset>0x2B53000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <testonly/> <side>sideless</side> @@ -208,7 +208,7 @@ Layout Description <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TESTRO</eyeCatch> - <physicalOffset>0x2AEC000</physicalOffset> + <physicalOffset>0x2B5C000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <testonly/> @@ -219,7 +219,7 @@ Layout Description <section> <description>Hostboot Bootloader (28K)</description> <eyeCatch>HBBL</eyeCatch> - <physicalOffset>0x2AF5000</physicalOffset> + <physicalOffset>0x2B65000</physicalOffset> <!-- Physical Size includes Header rounded to ECC valid size --> <!-- Max size of actual HBBL content is 20K and 22.5K with ECC --> <physicalRegionSize>0x7000</physicalRegionSize> @@ -230,7 +230,7 @@ Layout Description <section> <description>Global Data (36K)</description> <eyeCatch>GLOBAL</eyeCatch> - <physicalOffset>0x2AFC000</physicalOffset> + <physicalOffset>0x2B6C000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -238,7 +238,7 @@ Layout Description <section> <description>Ref Image Ring Overrides (20K)</description> <eyeCatch>RINGOVD</eyeCatch> - <physicalOffset>0x2B05000</physicalOffset> + <physicalOffset>0x2B75000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -246,7 +246,7 @@ Layout Description <section> <description>SecureBoot Key Transition Partition (16K)</description> <eyeCatch>SBKT</eyeCatch> - <physicalOffset>0x2B0A000</physicalOffset> + <physicalOffset>0x2B7A000</physicalOffset> <physicalRegionSize>0x4000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -254,7 +254,7 @@ Layout Description <section> <description>OCC Lid (1.125M)</description> <eyeCatch>OCC</eyeCatch> - <physicalOffset>0x2B0E000</physicalOffset> + <physicalOffset>0x2B7E000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -265,7 +265,7 @@ Layout Description <!-- We need 266KB per module sort, going to support 10 sorts by default, plus ECC --> <eyeCatch>WOFDATA</eyeCatch> - <physicalOffset>0x2C2E000</physicalOffset> + <physicalOffset>0x2C9E000</physicalOffset> <physicalRegionSize>0x300000</physicalRegionSize> <side>sideless</side> <sha512Version/> @@ -274,7 +274,7 @@ Layout Description <section> <description>FIRDATA (12K)</description> <eyeCatch>FIRDATA</eyeCatch> - <physicalOffset>0x2F2E000</physicalOffset> + <physicalOffset>0x2F9E000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -282,7 +282,7 @@ Layout Description <section> <description>Memory Data (24K)</description> <eyeCatch>MEMD</eyeCatch> - <physicalOffset>0x2F31000</physicalOffset> + <physicalOffset>0x2FA1000</physicalOffset> <physicalRegionSize>0x6000</physicalRegionSize> <side>sideless</side> <ecc/> diff --git a/src/build/buildpnor/pnorLayoutFSP.xml b/src/build/buildpnor/pnorLayoutFSP.xml index ec63b2228..70f6ef2bc 100644 --- a/src/build/buildpnor/pnorLayoutFSP.xml +++ b/src/build/buildpnor/pnorLayoutFSP.xml @@ -79,18 +79,9 @@ Layout Description - Used when building an FSP driver </side> </metadata> <section> - <description>Hostboot Base (576K)</description> - <eyeCatch>HBB</eyeCatch> - <physicalOffset>0x8000</physicalOffset> - <physicalRegionSize>0x90000</physicalRegionSize> - <sha512Version/> - <side>sideless</side> - <ecc/> - </section> - <section> <description>Hostboot Error Logs (144K)</description> <eyeCatch>HBEL</eyeCatch> - <physicalOffset>0x98000</physicalOffset> + <physicalOffset>0x8000</physicalOffset> <physicalRegionSize>0x24000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -98,25 +89,16 @@ Layout Description - Used when building an FSP driver <section> <description>Guard Data (20K)</description> <eyeCatch>GUARD</eyeCatch> - <physicalOffset>0xBC000</physicalOffset> + <physicalOffset>0x2C000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> </section> <section> - <description>Hostboot Data (1.125M)</description> - <eyeCatch>HBD</eyeCatch> - <physicalOffset>0xC1000</physicalOffset> - <physicalRegionSize>0x120000</physicalRegionSize> - <sha512Version/> - <side>sideless</side> - <ecc/> - </section> - <section> <description>DIMM JEDEC (288K)</description> <eyeCatch>DJVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x1E1000</physicalOffset> + <physicalOffset>0x31000</physicalOffset> <physicalRegionSize>0x48000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -125,7 +107,7 @@ Layout Description - Used when building an FSP driver <description>Module VPD (576K)</description> <eyeCatch>MVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x229000</physicalOffset> + <physicalOffset>0x79000</physicalOffset> <physicalRegionSize>0x90000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -134,15 +116,33 @@ Layout Description - Used when building an FSP driver <description>Centaur VPD (288K)</description> <eyeCatch>CVPD</eyeCatch> <!--NOTE: MUST update standalone.simics if offset changes --> - <physicalOffset>0x2B9000</physicalOffset> + <physicalOffset>0x109000</physicalOffset> <physicalRegionSize>0x48000</physicalRegionSize> <side>sideless</side> <ecc/> </section> <section> + <description>Hostboot Base (1MB)</description> + <eyeCatch>HBB</eyeCatch> + <physicalOffset>0x151000</physicalOffset> + <physicalRegionSize>0x100000</physicalRegionSize> + <side>sideless</side> + <sha512Version/> + <ecc/> + </section> + <section> + <description>Hostboot Data (1.125M)</description> + <eyeCatch>HBD</eyeCatch> + <physicalOffset>0x251000</physicalOffset> + <physicalRegionSize>0x120000</physicalRegionSize> + <sha512Version/> + <side>sideless</side> + <ecc/> + </section> + <section> <description>Hostboot Extended image (11MB w/o ECC)</description> <eyeCatch>HBI</eyeCatch> - <physicalOffset>0x301000</physicalOffset> + <physicalOffset>0x371000</physicalOffset> <physicalRegionSize>0xC60000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -162,7 +162,7 @@ Layout Description - Used when building an FSP driver <section> <description>SBE-IPL (Staging Area) (520K)</description> <eyeCatch>SBE</eyeCatch> - <physicalOffset>0xF61000</physicalOffset> + <physicalOffset>0xFD1000</physicalOffset> <physicalRegionSize>0x82000</physicalRegionSize> <sha512perEC/> <sha512Version/> @@ -172,7 +172,7 @@ Layout Description - Used when building an FSP driver <section> <description>HCODE Ref Image (1.125MB)</description> <eyeCatch>HCODE</eyeCatch> - <physicalOffset>0xFE3000</physicalOffset> + <physicalOffset>0x1053000</physicalOffset> <physicalRegionSize>0x120000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -181,7 +181,7 @@ Layout Description - Used when building an FSP driver <section> <description>Hostboot Runtime Services for Sapphire (4.5MB)</description> <eyeCatch>HBRT</eyeCatch> - <physicalOffset>0x1103000</physicalOffset> + <physicalOffset>0x1173000</physicalOffset> <physicalRegionSize>0x480000</physicalRegionSize> <sha512Version/> <side>sideless</side> @@ -190,7 +190,7 @@ Layout Description - Used when building an FSP driver <section> <description>Payload (21.375MB)</description> <eyeCatch>PAYLOAD</eyeCatch> - <physicalOffset>0x1583000</physicalOffset> + <physicalOffset>0x15F3000</physicalOffset> <physicalRegionSize>0x1560000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -198,7 +198,7 @@ Layout Description - Used when building an FSP driver <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TEST</eyeCatch> - <physicalOffset>0x2AE3000</physicalOffset> + <physicalOffset>0x2B53000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <testonly/> <side>sideless</side> @@ -207,7 +207,7 @@ Layout Description - Used when building an FSP driver <section> <description>Special PNOR Test Space (36K)</description> <eyeCatch>TESTRO</eyeCatch> - <physicalOffset>0x2AEC000</physicalOffset> + <physicalOffset>0x2B5C000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <testonly/> @@ -218,7 +218,7 @@ Layout Description - Used when building an FSP driver <section> <description>Hostboot Bootloader (28K)</description> <eyeCatch>HBBL</eyeCatch> - <physicalOffset>0x2AF5000</physicalOffset> + <physicalOffset>0x2B65000</physicalOffset> <!-- Physical Size includes Header rounded to ECC valid size --> <!-- Max size of actual HBBL content is 20K and 22.5K with ECC --> <physicalRegionSize>0x7000</physicalRegionSize> @@ -228,7 +228,7 @@ Layout Description - Used when building an FSP driver <section> <description>Global Data (36K)</description> <eyeCatch>GLOBAL</eyeCatch> - <physicalOffset>0x2AFC000</physicalOffset> + <physicalOffset>0x2B6C000</physicalOffset> <physicalRegionSize>0x9000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -236,7 +236,7 @@ Layout Description - Used when building an FSP driver <section> <description>Ref Image Ring Overrides (20K)</description> <eyeCatch>RINGOVD</eyeCatch> - <physicalOffset>0x2B05000</physicalOffset> + <physicalOffset>0x2B75000</physicalOffset> <physicalRegionSize>0x5000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -244,7 +244,7 @@ Layout Description - Used when building an FSP driver <section> <description>SecureBoot Key Transition Partition (16K)</description> <eyeCatch>SBKT</eyeCatch> - <physicalOffset>0x2B0A000</physicalOffset> + <physicalOffset>0x2B7A000</physicalOffset> <physicalRegionSize>0x4000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -254,7 +254,7 @@ Layout Description - Used when building an FSP driver <!-- We need 266KB per module sort, going to support 10 sorts by default, plus ECC --> <eyeCatch>WOFDATA</eyeCatch> - <physicalOffset>0x2B0E000</physicalOffset> + <physicalOffset>0x2B7E000</physicalOffset> <physicalRegionSize>0x300000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -262,7 +262,7 @@ Layout Description - Used when building an FSP driver <section> <description>FIRDATA (12K)</description> <eyeCatch>FIRDATA</eyeCatch> - <physicalOffset>0x2E0E000</physicalOffset> + <physicalOffset>0x2E7E000</physicalOffset> <physicalRegionSize>0x3000</physicalRegionSize> <side>sideless</side> <ecc/> @@ -270,7 +270,7 @@ Layout Description - Used when building an FSP driver <section> <description>Memory Data (24K)</description> <eyeCatch>MEMD</eyeCatch> - <physicalOffset>0x2E11000</physicalOffset> + <physicalOffset>0x2E81000</physicalOffset> <physicalRegionSize>0x6000</physicalRegionSize> <side>sideless</side> <ecc/> diff --git a/src/build/debug/Hostboot/Dump.pm b/src/build/debug/Hostboot/Dump.pm index 9ce3dd679..0966e2187 100755 --- a/src/build/debug/Hostboot/Dump.pm +++ b/src/build/debug/Hostboot/Dump.pm @@ -41,20 +41,23 @@ use constant MEMSTATE_MS_32MEG => 0x20; use constant _KB => 1024; use constant _MB => 1024 * 1024; +# Size of HBB PNOR partition without ECC, page algined down, minus 4K header +use constant MAX_HBB_SIZE => (904 * _KB); + # Map the available memory at each state. +# *** NOTE: Keep in sync with fsp-memdump.sh and bootloaderif.H (MAX_HBB_SIZE) our %memory_maps = ( MEMSTATE_NO_MEM() => # No memory has been initialized so we can only dump our static - # code load up to 512 - 4k. The 4k is a reserved space for the - # Secureboot Header. - [ 0, (512 - 4) * _KB + # code load up to HBB size + [ 0, MAX_HBB_SIZE ], MEMSTATE_HALF_CACHE() => - # All of the first 4MB can now be read (except reserved MBOX). - [ 512 * _KB, 512 * _KB, - 1 * _MB + 512 * _KB, 512 * _KB, - 2 * _MB + 512 * _KB, 512 * _KB, - 3 * _MB + 512 * _KB, 512 * _KB + # All of the first 4MB can now be read. + [ MAX_HBB_SIZE, ((1 * _MB) - MAX_HBB_SIZE), + 1 * _MB, 1 * _MB, + 2 * _MB, 1 * _MB, + 3 * _MB, 1 * _MB ], MEMSTATE_REDUCED_CACHE() => # Initial chips may have 2MB bad cache diff --git a/src/build/debug/fsp-memdump.sh b/src/build/debug/fsp-memdump.sh index d02b11ff8..d4313d671 100755 --- a/src/build/debug/fsp-memdump.sh +++ b/src/build/debug/fsp-memdump.sh @@ -6,7 +6,7 @@ # # OpenPOWER HostBoot Project # -# Contributors Listed Below - COPYRIGHT 2013,2016 +# Contributors Listed Below - COPYRIGHT 2013,2017 # [+] International Business Machines Corp. # # @@ -121,24 +121,18 @@ echo "NODE: ${NODE} - HRMOR is: ${HRMOR}" # appropriate memory sections. while [[ ${STATE} != BREAK ]] do + # *** NOTE: Keep in sync with Dump.pm and bootloaderif.H (MAX_HBB_SIZE) case ${STATE} in 00|0) - dump 0 520192 + # Size of HBB PNOR partition without ECC, page algined down, minus 4K header + dump 0 925696 STATE=BREAK ;; - ff|FF) - dump 520192 4096 - dump 1048576 524288 - dump 2097152 524288 - dump 3145728 262144 - dump 3473408 196608 - STATE=00 - ;; 04|4) - dump 524288 524288 - dump 1572864 524288 - dump 2621440 524288 - dump 3670016 524288 + dump 925696 122880 + dump 1048576 1048576 + dump 2097152 1048576 + dump 3145728 1048576 STATE=ff ;; 08|8) diff --git a/src/build/simics/standalone.simics b/src/build/simics/standalone.simics index 81b56f328..71bd375d0 100755 --- a/src/build/simics/standalone.simics +++ b/src/build/simics/standalone.simics @@ -19,9 +19,17 @@ if ($hb_skip_vpd_preload == 0) { echo "Preload VPD into PNOR" run-python-file (lookup-file hbfw/hb-pnor-vpd-preload.py) - ($hb_pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x229000 - ($hb_pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x1E1000 - ($hb_pnor).sfc_master_mem.load-file ./sysmemvpd.dat.ecc 0x2B9000 + # Must match pnor layout used (see eyecatch in layout) + echo "PNOR layout offset for VPD:" + # PNOR eyecatch MVPD + echo " - MVPD at 0x79000" + ($hb_pnor).sfc_master_mem.load-file ./sysmvpd.dat.ecc 0x79000 + # PNOR eyecatch DJVPD + echo " - DJVPD at 0x31000" + ($hb_pnor).sfc_master_mem.load-file ./sysspd.dat.ecc 0x31000 + # PNOR eyecatch CVPD + echo " - CVPD at 0x109000" + ($hb_pnor).sfc_master_mem.load-file ./sysmemvpd.dat.ecc 0x109000 } except { echo "ERROR: Failed to preload VPD into PNOR." } } |
