diff options
16 files changed, 168 insertions, 94 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C index 5d7698656..2dbacb2ae 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_omi_setup.C @@ -38,6 +38,7 @@ #include <lib/exp_attribute_accessors_manual.H> #include <lib/omi/exp_omi_utils.H> #include <generic/memory/mss_git_data_helper.H> +#include <generic/memory/lib/mss_generic_attribute_getters.H> extern "C" { @@ -53,12 +54,15 @@ extern "C" // Declares variables fapi2::buffer<uint64_t> l_data; + fapi2::buffer<uint64_t> dlx_config1_data; + uint8_t l_edpl_disable = 0; bool l_is_enterprise = false; bool l_is_half_dimm = false; // Gets the configuration information from attributes FAPI_TRY(mss::enterprise_mode(i_target, l_is_enterprise)); FAPI_TRY(mss::half_dimm_mode(i_target, l_is_half_dimm)); + FAPI_TRY(mss::attr::get_mss_omi_edpl_disable(l_edpl_disable)); // Prints out the data FAPI_INF("%s is %s enterprise mode, and %s-DIMM mode", mss::c_str(i_target), l_is_enterprise ? "" : "non", @@ -75,6 +79,12 @@ extern "C" FAPI_TRY(mss::exp::omi::read_enterprise_config(i_target, l_data)); FAPI_TRY(mss::exp::omi::check_enterprise_mode(i_target, l_is_enterprise, l_data)); + // Set the EDPL according the attribute + FAPI_TRY(mss::exp::omi::read_dlx_config1(i_target, dlx_config1_data)); + mss::exp::omi::set_edpl_enable_bit(dlx_config1_data, l_edpl_disable); + FAPI_TRY(mss::exp::omi::write_dlx_config1(i_target, dlx_config1_data)); + FAPI_INF("%s EDPL enable: ", mss::c_str(i_target), l_edpl_disable ? "false" : "true"); + fapi_try_exit: return fapi2::current_err; } diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H index 1faf02014..3658100b1 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/omi/exp_omi_utils.H @@ -103,6 +103,27 @@ inline bool get_enterprise_config( const fapi2::buffer<uint64_t>& i_data ) return i_data.getBit<EXPLR_MMIO_MENTERP_CFG_ENTERPRISE_MODE>(); } + +/// +/// @brief Get edpl enable bit +/// @param[in] i_data the register data +/// @return The register's EDPL_ENA bit +/// +inline bool get_edpl_enable_bit( const fapi2::buffer<uint64_t>& i_data ) +{ + return i_data.getBit<EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_ENA>(); +} + +/// +/// @brief Set edpl enable bit +/// @param[in,out] io_data the register data +/// @param[in] i_enable The register's EDPL_ENA bit +/// +inline void set_edpl_enable_bit( fapi2::buffer<uint64_t>& io_data, const bool i_enable ) +{ + io_data.writeBit<EXPLR_DLX_DL0_CONFIG1_CFG_EDPL_ENA>(i_enable); +} + /// /// @brief Checks if the enterprise config bit is in the correct mode /// @param[in] i_target target on which we are operating - for logging @@ -157,6 +178,30 @@ inline fapi2::ReturnCode write_enterprise_config( const fapi2::Target<fapi2::TAR return fapi2::putScom(i_target, EXPLR_MMIO_MENTERP, i_data); } +/// +/// @brief Reads the EXPLR_DLX_DL0_CONFIG1 register using I2C +/// @param[in] i_target the OCMB target on which to operate +/// @param[out] o_data the register contents +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// +inline fapi2::ReturnCode read_dlx_config1( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + fapi2::buffer<uint64_t>& o_data ) +{ + return fapi2::getScom(i_target, EXPLR_DLX_DL0_CONFIG1, o_data); +} + +/// +/// @brief Writes the EXPLR_DLX_DL0_CONFIG1 register using I2C +/// @param[in] i_target the OCMB target on which to operate +/// @param[in] i_data the register contents +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// +inline fapi2::ReturnCode write_dlx_config1( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + const fapi2::buffer<uint64_t>& i_data ) +{ + return fapi2::putScom(i_target, EXPLR_DLX_DL0_CONFIG1, i_data); +} + namespace train { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.C deleted file mode 100644 index 9db02eff0..000000000 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.C +++ /dev/null @@ -1,84 +0,0 @@ -/* IBM_PROLOG_BEGIN_TAG */ -/* This is an automatically generated prolog. */ -/* */ -/* $Source: src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.C $ */ -/* */ -/* OpenPOWER HostBoot Project */ -/* */ -/* Contributors Listed Below - COPYRIGHT 2019 */ -/* [+] International Business Machines Corp. */ -/* */ -/* */ -/* Licensed under the Apache License, Version 2.0 (the "License"); */ -/* you may not use this file except in compliance with the License. */ -/* You may obtain a copy of the License at */ -/* */ -/* http://www.apache.org/licenses/LICENSE-2.0 */ -/* */ -/* Unless required by applicable law or agreed to in writing, software */ -/* distributed under the License is distributed on an "AS IS" BASIS, */ -/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ -/* implied. See the License for the specific language governing */ -/* permissions and limitations under the License. */ -/* */ -/* IBM_PROLOG_END_TAG */ - -/// -/// @file kind.C -/// @brief Encapsulation for dimms of all types -/// -// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com> -// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> -// *HWP Team: Memory -// *HWP Level: 3 -// *HWP Consumed by: HB:FSP - - - -#include <fapi2.H> - -#include <lib/shared/nimbus_defaults.H> -#include <lib/shared/mss_const.H> -#include <lib/mss_attribute_accessors.H> -#include <generic/memory/lib/utils/c_str.H> -#include <generic/memory/lib/utils/dimm/kind.H> - -namespace mss -{ - -namespace dimm -{ - -/// -/// @class mss::dimm::kind specilization for NIMBUS -/// @brief A class containing information about a dimm like ranks, density, configuration - what kind of dimm is it? -/// -template<> -kind<mss::mc_type::NIMBUS>::kind(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) : - iv_target(i_target), - iv_module_height(0) -{ - FAPI_TRY( mss::eff_dram_gen(i_target, iv_dram_generation) ); - FAPI_TRY( mss::eff_dimm_type(i_target, iv_dimm_type) ); - FAPI_TRY( mss::eff_dram_density(i_target, iv_dram_density) ); - FAPI_TRY( mss::eff_dram_width(i_target, iv_dram_width) ); - FAPI_TRY( mss::eff_num_master_ranks_per_dimm(i_target, iv_master_ranks) ); - FAPI_TRY( mss::eff_num_ranks_per_dimm(i_target, iv_total_ranks) ); - FAPI_TRY( mss::eff_dram_row_bits(i_target, iv_rows) ); - FAPI_TRY( mss::eff_dimm_size(i_target, iv_size) ); - FAPI_TRY( mss::eff_dram_mfg_id(i_target, iv_mfgid) ); - FAPI_TRY( mss::eff_prim_stack_type( i_target, iv_stack_type) ); - FAPI_TRY( mss::eff_hybrid( i_target, iv_hybrid )); - FAPI_TRY( mss::eff_hybrid_memory_type( i_target, iv_hybrid_memory_type )); - FAPI_TRY( mss::eff_rcd_mfg_id(i_target, iv_rcd_mfgid) ); - return; - -fapi_try_exit: - // Not 100% sure what to do here ... - FAPI_ERR("error initializing DIMM structure: %s 0x%016lx", mss::c_str(i_target), uint64_t(fapi2::current_err)); - fapi2::Assert(false); -} - - -} //ns dimm -} //ns mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.H b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.H index 31163355d..6c8d16bc0 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/nimbus_kind.H @@ -22,3 +22,64 @@ /* permissions and limitations under the License. */ /* */ /* IBM_PROLOG_END_TAG */ + +/// +/// @file nimbus_kind.H +/// @brief Encapsulation for dimms of all types +/// +// *HWP HWP Owner: Louis Stermole <stermole@us.ibm.com> +// *HWP HWP Backup: Andre Marin <aamarin@us.ibm.com> +// *HWP Team: Memory +// *HWP Level: 3 +// *HWP Consumed by: HB:FSP + +#ifndef _MSS_NIMBUS_KIND_H_ +#define _MSS_NIMBUS_KIND_H_ + +#include <fapi2.H> + +#include <lib/shared/mss_const.H> +#include <lib/mss_attribute_accessors.H> +#include <generic/memory/lib/utils/c_str.H> +#include <generic/memory/lib/utils/dimm/kind.H> + +namespace mss +{ + +namespace dimm +{ + +/// +/// @class mss::dimm::kind specilization for NIMBUS +/// @brief A class containing information about a dimm like ranks, density, configuration - what kind of dimm is it? +/// +template<> +inline kind<mss::mc_type::NIMBUS>::kind(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) : + iv_target(i_target), + iv_module_height(0) +{ + FAPI_TRY( mss::eff_dram_gen(i_target, iv_dram_generation) ); + FAPI_TRY( mss::eff_dimm_type(i_target, iv_dimm_type) ); + FAPI_TRY( mss::eff_dram_density(i_target, iv_dram_density) ); + FAPI_TRY( mss::eff_dram_width(i_target, iv_dram_width) ); + FAPI_TRY( mss::eff_num_master_ranks_per_dimm(i_target, iv_master_ranks) ); + FAPI_TRY( mss::eff_num_ranks_per_dimm(i_target, iv_total_ranks) ); + FAPI_TRY( mss::eff_dram_row_bits(i_target, iv_rows) ); + FAPI_TRY( mss::eff_dimm_size(i_target, iv_size) ); + FAPI_TRY( mss::eff_dram_mfg_id(i_target, iv_mfgid) ); + FAPI_TRY( mss::eff_prim_stack_type( i_target, iv_stack_type) ); + FAPI_TRY( mss::eff_hybrid( i_target, iv_hybrid )); + FAPI_TRY( mss::eff_hybrid_memory_type( i_target, iv_hybrid_memory_type )); + FAPI_TRY( mss::eff_rcd_mfg_id(i_target, iv_rcd_mfgid) ); + return; + +fapi_try_exit: + // Not 100% sure what to do here ... + FAPI_ERR("error initializing DIMM structure: %s 0x%016lx", mss::c_str(i_target), uint64_t(fapi2::current_err)); + fapi2::Assert(false); +} + + +} //ns dimm +} //ns mss +#endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H index 9463db39a..24da77869 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/plug_rules.H @@ -38,7 +38,7 @@ #include <fapi2.H> #include <cstdint> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> namespace mss { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H index 77f419d7a..b589c0479 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/mc.H @@ -41,7 +41,7 @@ #include <p9_mc_scom_addresses.H> #include <p9_mc_scom_addresses_fld.H> #include <lib/mss_attribute_accessors.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> #include <lib/shared/mss_const.H> #include <generic/memory/lib/utils/scom.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C index 39394c9f6..e57e593fa 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.C @@ -45,7 +45,7 @@ #include <lib/mc/xlate.H> #include <generic/memory/lib/utils/scom.H> #include <generic/memory/lib/utils/find.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> using fapi2::TARGET_TYPE_MCA; using fapi2::TARGET_TYPE_DIMM; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H index 759c302e3..5b7db7076 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/xlate.H @@ -44,7 +44,7 @@ #include <lib/shared/mss_const.H> #include <generic/memory/lib/utils/scom.H> #include <generic/memory/lib/utils/c_str.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> namespace mss { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H index 64ca161d1..a76c3ea76 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.H @@ -46,7 +46,7 @@ #include <lib/mc/port.H> #include <lib/utils/mss_nimbus_conversions.H> #include <lib/utils/bit_count.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> #include <lib/mcbist/mcbist_traits.H> #include <generic/memory/lib/utils/num.H> #include <generic/memory/lib/utils/poll.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.C b/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.C index dc13963eb..981432a30 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.C @@ -46,7 +46,7 @@ #include <generic/memory/lib/utils/c_str.H> #include <generic/memory/lib/utils/count_dimm.H> #include <generic/memory/lib/utils/power_thermal/gen_decoder.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> namespace mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.H b/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.H index 993c887b8..f6f9bf5ea 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/power_thermal/decoder.H @@ -37,7 +37,7 @@ #include <fapi2.H> #include <lib/shared/mss_const.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> #include <generic/memory/lib/utils/count_dimm.H> #include <generic/memory/lib/utils/power_thermal/gen_decoder.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mcbist_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mcbist_workarounds.C index 9aec9173f..e172dfbdb 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mcbist_workarounds.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/mcbist_workarounds.C @@ -43,7 +43,7 @@ #include <lib/mss_attribute_accessors.H> #include <generic/memory/lib/utils/scom.H> #include <generic/memory/lib/utils/pos.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> #include <lib/workarounds/mcbist_workarounds.H> #include <lib/mcbist/mcbist.H> #include <lib/fir/fir.H> diff --git a/src/import/chips/p9/procedures/hwp/memory/mss.H b/src/import/chips/p9/procedures/hwp/memory/mss.H index 2c4294c1f..9f291c73c 100644 --- a/src/import/chips/p9/procedures/hwp/memory/mss.H +++ b/src/import/chips/p9/procedures/hwp/memory/mss.H @@ -68,7 +68,7 @@ #include <lib/dimm/rcd_load.H> #include <lib/dimm/mrs_load.H> #include <lib/dimm/rank.H> -#include <generic/memory/lib/utils/dimm/kind.H> +#include <lib/dimm/nimbus_kind.H> #include <lib/phy/ddr_phy.H> #include <lib/phy/dp16.H> diff --git a/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H b/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H index 7a11c0863..7bb473659 100644 --- a/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H +++ b/src/import/chips/p9a/procedures/hwp/memory/lib/mc/omi.H @@ -47,6 +47,7 @@ #include <generic/memory/lib/utils/buffer_ops.H> #include <generic/memory/lib/utils/find.H> #include <generic/memory/lib/mss_generic_system_attribute_getters.H> +#include <generic/memory/lib/mss_generic_attribute_getters.H> namespace mss { @@ -600,6 +601,7 @@ fapi2::ReturnCode setup_mc_config1_helper(const fapi2::Target<T>& i_target) fapi2::buffer<uint64_t> l_val; uint8_t l_sim = 0; + uint8_t l_edpl_disable = 0; FAPI_TRY( mss::attr::get_is_simulation( l_sim) ); // CFG_DL0_CFG1_PREIPL_PRBS @@ -687,7 +689,8 @@ fapi2::ReturnCode setup_mc_config1_helper(const fapi2::Target<T>& i_target) TT::MC_REG2_DL0_CONFIG1_CFG_EDPL_THRESHOLD_LEN>(EDPL_ERR_THRES_16); // CFG_DL0_EDPL_ENA: dl0 error detection per lane "edpl" enable - l_val.template writeBit<TT::MC_REG2_DL0_CONFIG1_CFG_EDPL_ENA>(1); + FAPI_TRY(mss::attr::get_mss_omi_edpl_disable(l_edpl_disable)); + l_val.template writeBit<TT::MC_REG2_DL0_CONFIG1_CFG_EDPL_ENA>(l_edpl_disable ? 0 : 1); FAPI_TRY( mss::putScom(i_target, TT::MC_REG2_DL0_CONFIG1, l_val) ); diff --git a/src/import/generic/memory/lib/mss_generic_attribute_getters.H b/src/import/generic/memory/lib/mss_generic_attribute_getters.H index 97fa34867..fd953e84e 100644 --- a/src/import/generic/memory/lib/mss_generic_attribute_getters.H +++ b/src/import/generic/memory/lib/mss_generic_attribute_getters.H @@ -987,6 +987,29 @@ fapi_try_exit: /// +/// @brief ATTR_MSS_OMI_EDPL_DISABLE getter +/// @param[out] uint8_t& reference to store the value +/// @note Generated by gen_accessors.pl generate_other_attr_params +/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK +/// @note EDPL (Error Detection Per Lane) is a feature in the DL that adds some additional +/// checks to the traffic going across the OpenCAPI link in order to better track which +/// lanes are having issues. Note: EDPL must be set the same on both sides of the link. +/// This attribute affects both the proc/mc side and the OCMB side. +/// +inline fapi2::ReturnCode get_mss_omi_edpl_disable(uint8_t& o_value) +{ + + FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_MSS_OMI_EDPL_DISABLE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(), o_value) ); + return fapi2::current_err; + +fapi_try_exit: + FAPI_ERR("failed getting ATTR_MSS_OMI_EDPL_DISABLE: 0x%lx", + uint64_t(fapi2::current_err)); + return fapi2::current_err; +} + + +/// /// @brief ATTR_MEM_EFF_DRAM_GEN getter /// @param[in] const ref to the TARGET_TYPE_DIMM /// @param[out] uint8_t& reference to store the value diff --git a/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml b/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml index 48c351b5f..0bdae9438 100644 --- a/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml +++ b/src/import/generic/procedures/xml/attribute_info/generic_memory_attributes.xml @@ -388,4 +388,20 @@ <mssAccessorName>dimm_type_metadata</mssAccessorName> </attribute> + <attribute> + <id>ATTR_MSS_OMI_EDPL_DISABLE</id> + <targetType>TARGET_TYPE_SYSTEM</targetType> + <description> + EDPL (Error Detection Per Lane) is a feature in the DL that adds some additional checks to + the traffic going across the OpenCAPI link in order to better track which lanes are having issues. + Note: EDPL must be set the same on both sides of the link. This attribute affects both the proc/mc + side and the OCMB side. + </description> + <valueType>uint8</valueType> + <enum>FALSE = 0, TRUE = 1</enum> + <platInit/> + <initToZero/> + <mssAccessorName>mss_omi_edpl_disable</mssAccessorName> + </attribute> + </attributes> |
