diff options
4 files changed, 62 insertions, 0 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit_mc.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit_mc.C index 24ecaee7e..b2647eb34 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit_mc.C +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit_mc.C @@ -84,6 +84,10 @@ extern "C" FAPI_TRY( mss::change_refresh_enable(i_target, mss::HIGH), "%s Failed change_refresh_enable", mss::c_str(i_target) ); + // Trigger the MC to take the DRAMs out of self refresh + FAPI_TRY( mss::change_force_str<mss::mc_type::EXPLORER>(i_target, mss::LOW), "%s Failed change_force_str", + mss::c_str(i_target) ); + // Enable periodic short zq cal FAPI_TRY( mss::enable_zq_cal(i_target), "%s Failed enable_zq_cal", mss::c_str(i_target) ); diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H index cf990c94d..4136f4b28 100644 --- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H +++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/mc/exp_port.H @@ -71,6 +71,7 @@ class portTraits< mss::mc_type::EXPLORER > static constexpr uint64_t FARB6Q_REG = EXPLR_SRQ_MBA_FARB6Q; static constexpr uint64_t FARB9Q_REG = EXPLR_SRQ_MBA_FARB9Q; static constexpr uint64_t REFRESH_REG = EXPLR_SRQ_MBAREF0Q; + static constexpr uint64_t STR0Q_REG = EXPLR_SRQ_MBASTR0Q; static constexpr uint64_t ECC_REG = EXPLR_RDF_RECR; static constexpr uint64_t DSM0Q_REG = EXPLR_SRQ_MBA_DSM0Q; static constexpr uint64_t FWMS_REG = EXPLR_RDF_FWMS0; @@ -94,6 +95,8 @@ class portTraits< mss::mc_type::EXPLORER > REFRESH_ENABLE = EXPLR_SRQ_MBAREF0Q_CFG_REFRESH_ENABLE, + CFG_FORCE_STR = EXPLR_SRQ_MBASTR0Q_CFG_FORCE_STR, + ECC_CHECK_DISABLE = EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CHECK_CORRECT, ECC_CORRECT_DISABLE = EXPLR_RDF_RECR_MBSECCQ_DISABLE_MEMORY_ECC_CORRECT, ECC_USE_ADDR_HASH = EXPLR_RDF_RECR_MBSECCQ_USE_ADDRESS_HASH, @@ -154,6 +157,31 @@ inline fapi2::ReturnCode reorder_queue_setting<mss::mc_type::EXPLORER>( return mss::attr::get_reorder_queue_setting(i_target, o_value); } +/// +/// @brief Change the state of the force_str bit - mc_type::EXPLORER specialization +/// @tparam MC the memory controller type +/// @param[in] i_target the target +/// @param[in] i_state the state +/// @return FAPI2_RC_SUCCESS if and only if ok +/// +template< > +inline fapi2::ReturnCode change_force_str<DEFAULT_MC_TYPE>( + const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, + const states i_state ) +{ + using TT = portTraits<mss::mc_type::EXPLORER>; + fapi2::buffer<uint64_t> l_data; + + FAPI_DBG("Change force_str to %s %s", (i_state == HIGH ? "high" : "low"), mss::c_str(i_target)); + FAPI_TRY( mss::getScom(i_target, TT::STR0Q_REG, l_data) ); + l_data.writeBit<TT::CFG_FORCE_STR>(i_state); + FAPI_TRY( mss::putScom(i_target, TT::STR0Q_REG, l_data) ); + +fapi_try_exit: + return fapi2::current_err; +} + + }// mss #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H index aeddf0277..e2fc56ca7 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.H @@ -818,6 +818,23 @@ template<> fapi2::ReturnCode enable_periodic_cal( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target ); +/// +/// @brief Change the state of the force_str bit - mc_type::NIMBUS specialization +/// @tparam MC the memory controller type +/// @param[in] i_target the target +/// @param[in] i_state the state +/// @return FAPI2_RC_SUCCESS if and only if ok +/// @note This bit doesn't exist on Nimbus, so this is a no-op +/// +template<> +inline fapi2::ReturnCode change_force_str<DEFAULT_MC_TYPE>( + const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, + const states i_state ) +{ + return fapi2::FAPI2_RC_SUCCESS; +} + + // // We expect to come in to draminit with the following setup: // 1. ENABLE_RESET_N (FARB5Q(6)) 0 diff --git a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H index 94e3fa6bf..1e776b49e 100644 --- a/src/import/generic/memory/lib/utils/mc/gen_mss_port.H +++ b/src/import/generic/memory/lib/utils/mc/gen_mss_port.H @@ -294,6 +294,19 @@ fapi_try_exit: /// +/// @brief Change the state of the force_str bit +/// @tparam MC the memory controller type +/// @tparam T the fapi2 target type of the target +/// @tparam TT the class traits for the port +/// @param[in] i_target the target +/// @param[in] i_state the state +/// @return FAPI2_RC_SUCCESS if and only if ok +/// +template< mss::mc_type MC = DEFAULT_MC_TYPE, fapi2::TargetType T, typename TT = portTraits<MC> > +fapi2::ReturnCode change_force_str( const fapi2::Target<T>& i_target, const states i_state ); + + +/// /// @brief Change the state of the MC Refresh enable bit /// @tparam MC the memory controller type /// @tparam T the fapi2 target type of the target |
