diff options
| -rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml | 49 | ||||
| -rw-r--r-- | src/import/chips/p9/procedures/xml/error_info/p9_pm_stop_gpe_init_errors.xml | 60 |
2 files changed, 109 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml new file mode 100644 index 000000000..090f5bb0b --- /dev/null +++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml @@ -0,0 +1,49 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: chips/p9/procedures/xml/attribute_info/pm_hwp_attributes.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- EKB Project --> +<!-- --> +<!-- COPYRIGHT 2015,2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- pm_plat_attributes.xml --> +<!-- --> +<!-- XML file specifying Power Management HWPF attributes. --> +<!-- These attributes are initialized by the platform. --> +<attributes> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_STOPGPE_BOOT_COPIER_IVPR_OFFSET</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Set by p9_hcode_image build with the offset value from + the HOMER base where the SGPE Boot Copier interrupt vectors reside. This + value must be 512B aligned. The HOMER base address will be pre-establish + in PBABAR0 so the address needs to be off the form 0x8XXXXX00. The SGPE + will be Sreset after this value is established. + </description> + <valueType>uint32</valueType> + </attribute> + <!-- ********************************************************************* --> + <attribute> + <id>ATTR_PSTATEGPE_BOOT_COPIER_IVPR_OFFSET</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description>Set by p9_hcode_image build with the offset value from + the HOMER base where the PGPE Boot Copier interrupt vectors reside. This + value must be 512B aligned. The HOMER base address will be pre-establish + in PBABAR0 so the address needs to be off the form 0x8XXXXX00. The PGPE + will be Sreset after this value is established + </description> + <valueType>uint32</valueType> + </attribute> + <!-- ********************************************************************* --> +</attributes> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_pm_stop_gpe_init_errors.xml b/src/import/chips/p9/procedures/xml/error_info/p9_pm_stop_gpe_init_errors.xml new file mode 100644 index 000000000..79f755381 --- /dev/null +++ b/src/import/chips/p9/procedures/xml/error_info/p9_pm_stop_gpe_init_errors.xml @@ -0,0 +1,60 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: chips/p9/procedures/xml/error_info/p9_pm_stop_gpe_init_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- EKB Project --> +<!-- --> +<!-- COPYRIGHT 2015,2016 --> +<!-- [+] International Business Machines Corp. --> +<!-- --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- Error definitions for p9_pm_ocb_init procedure --> +<hwpErrors> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_STOP_GPE_BAD_MODE</rc> + <description>Unknown mode passed to p9_pm_stop_gpe_init. + </description> + <ffdc>BADMODE</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_STOP_GPE_INIT_TIMEOUT</rc> + <description> Stop GPE init timedout while waiting for SGPE ACtive in OCCFLG register. + </description> + <ffdc>OCCFLGSTAT</ffdc> + <ffdc>XSR</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_STOP_GPE_RESET_TIMEOUT</rc> + <description> Stop GPE init timedout while waiting for HALT status in XSR register. + </description> + <ffdc>SGPEXSRNOTHALT</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_STOP_GPE_PFETS_FAILED</rc> + <description> Stop GPE called to p9_pm_pfet_init failed. + </description> + <ffdc>TARGET</ffdc> + <ffdc>MODE</ffdc> + </hwpError> + <!-- ******************************************************************** --> + <hwpError> + <rc>RC_STOP_GPE_PBA_INIT_FAILED</rc> + <description> Stop GPE called to p9_pm_pba_init failed. + </description> + <ffdc>TARGET</ffdc> + <ffdc>MODE</ffdc> + </hwpError> + <!-- ******************************************************************** --> +</hwpErrors> |
