diff options
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule | 4 | ||||
-rw-r--r-- | src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule index a77dd959a..12c54db9a 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_cumulus.rule @@ -6707,7 +6707,7 @@ rule rNPU0FIR NPU0FIR & ~NPU0FIR_MASK & NPU0FIR_ACT0 & NPU0FIR_ACT1; }; -group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 40, 42, 44, 45 ) +group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 42, 44 ) { /** NPU0FIR[0] * NTL array CE @@ -6980,7 +6980,7 @@ rule rNPU1FIR NPU1FIR & ~NPU1FIR_MASK & NPU1FIR_ACT0 & NPU1FIR_ACT1; }; -group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 22, 25, 27, 28, 29, 31, 32, 33, 34, 35 ) +group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 25, 27, 28, 29, 31, 32, 33, 34, 35 ) { /** NPU1FIR[0] * NDL Brick0 stall diff --git a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule index bd653e65c..3a9811320 100644 --- a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule +++ b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule @@ -6687,7 +6687,7 @@ rule rNPU0FIR NPU0FIR & ~NPU0FIR_MASK & NPU0FIR_ACT0 & NPU0FIR_ACT1; }; -group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 40, 42, 44, 45 ) +group gNPU0FIR filter singlebit, cs_root_cause( 1, 2, 3, 4, 5, 6, 7, 9, 10, 16, 18, 29, 31, 42, 44 ) { /** NPU0FIR[0] * NTL array CE @@ -6960,7 +6960,7 @@ rule rNPU1FIR NPU1FIR & ~NPU1FIR_MASK & NPU1FIR_ACT0 & NPU1FIR_ACT1; }; -group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 22, 25, 27, 28, 29, 31, 32, 33, 34, 35 ) +group gNPU1FIR filter singlebit, cs_root_cause( 0, 2, 4, 6, 8, 10, 13, 14, 15, 20, 25, 27, 28, 29, 31, 32, 33, 34, 35 ) { /** NPU1FIR[0] * NDL Brick0 stall |