diff options
10 files changed, 305 insertions, 117 deletions
diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C index 59df7825a..63207af42 100644 --- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_mem_pll_initf.C,v 1.8 2013/10/02 16:09:38 mfred Exp $ +// $Id: cen_mem_pll_initf.C,v 1.9 2013/11/15 16:29:56 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/cen_mem_pll_initf.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -90,9 +90,7 @@ const uint64_t CLK_REGION_FOR_SETPULSE = 0x0010040000000000ull; // Pervasive LFIR Register field/bit definitions const uint8_t PERV_LFIR_SCAN_COLLISION_BIT = 3; -const bool i_mask_scan_collision = true; -const uint32_t i_chiplet_base_scom_addr = TP_CHIPLET_0x01000000; - +const bool MASK_SCAN_COLLISION = true; extern "C" { @@ -107,7 +105,6 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, ecmdDataBufferBase i_scan_ring_data ) { - // Target is centaur fapi::ReturnCode rc; @@ -122,7 +119,7 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, // Mask Pervasive LFIR //------------------------------------------ - if (i_mask_scan_collision) + if (MASK_SCAN_COLLISION) { FAPI_DBG("Masking Pervasive LFIR scan collision bit ..."); rc_ecmd |= scom_data.setBit(PERV_LFIR_SCAN_COLLISION_BIT); @@ -132,7 +129,7 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, rc.setEcmdError(rc_ecmd); break; } - rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_MASK_OR_0x0004000F, scom_data); + rc = fapiPutScom(i_target, TP_PERV_LFIR_MASK_OR_0x0104000F, scom_data); if (!rc.ok()) { FAPI_ERR("Error writing Pervasive LFIR Mask OR Register."); @@ -207,8 +204,6 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, break; } - - //------------------------------------------------ // Scan new ring data into tp_pll_bndy scan ring. //------------------------------------------------ @@ -220,7 +215,6 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, } FAPI_DBG("Loading of the scan ring data for ring tp_pll_bndy is done.\n"); - //------------------------------------------- // Set the OPCG back to a good state //------------------------------------------ @@ -256,12 +250,10 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, break; } - //------------------------------------------- // Clear & Unmask Pervasive LFIR //------------------------------------------ - - if (i_mask_scan_collision) + if (MASK_SCAN_COLLISION) { FAPI_DBG("Clearing Pervasive LFIR scan collision bit ..."); rc_ecmd |= scom_data.flushTo1(); @@ -272,7 +264,7 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, rc.setEcmdError(rc_ecmd); break; } - rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_AND_0x0004000B, scom_data); + rc = fapiPutScom(i_target, TP_PERV_LFIR_AND_0x0104000B, scom_data); if (!rc.ok()) { FAPI_ERR("Error writing Pervasive LFIR AND Register."); @@ -280,7 +272,7 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, } FAPI_DBG("Unmasking Pervasive LFIR scan collision bit ..."); - rc = fapiPutScom(i_target, i_chiplet_base_scom_addr | GENERIC_PERV_LFIR_MASK_AND_0x0004000E, scom_data); + rc = fapiPutScom(i_target, TP_PERV_LFIR_MASK_AND_0x0104000E, scom_data); if (!rc.ok()) { FAPI_ERR("Error writing Pervasive LFIR Mask And Register."); @@ -294,18 +286,12 @@ fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target & i_target, return rc; } - - - - - //------------------------------------------------------------------------------ // cen_mem_pll_initf //------------------------------------------------------------------------------ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) { // Target is centaur - fapi::ReturnCode rc; uint32_t rc_ecmd = 0; uint8_t is_simulation = 0; @@ -315,27 +301,24 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) uint8_t attrRingData[80]={0}; // Set to 80 bytes to match length in XML file, not actual scan ring length. ecmdDataBufferBase ring_data; - FAPI_INF("********* cen_mem_pll_initf start *********"); do { - FAPI_DBG("Setting up the Centaur MEM PLL."); - //------------------------------------------ // Read attributes for setting the PLL data //------------------------------------------ // The code that loads the PLL scan ring data should choose the correct data to load based on // the DDR frequency and voltage settings and a lab override value. - // The supported frequencies are 800, 1066, 1333, 1600, 1866, and 2133 MHz (These are the DDR frequencies and the PLL output B frequencies.) + // The supported frequencies are 800, 1066, 1333, 1600, 1866, and 2133 MHz + // (These are the DDR frequencies and the PLL output B frequencies.) // The DDR frequency can be determined from attribute ATTR_MSS_FREQ (in MHz) // The DDR voltage can be determined from attribute ATTR_MSS_VOLT (in millivolts) // Get another attribute for selecting the "override" ring. Use CQ to request an attribute. // (The selection of rings should include an "override ring that can be used in the lab") - // Read the attributes rc = FAPI_ATTR_GET( ATTR_IS_SIMULATION, NULL, is_simulation); if (rc) @@ -361,7 +344,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) FAPI_DBG("DDR frequency is set to : %d.", mss_freq); FAPI_DBG("NEST frequency is set to : %d.", nest_freq); - // Read in the PLL Ring LENGTH based on the frequency attributes. if ( is_simulation ) { @@ -370,31 +352,53 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) else if ( nest_freq == 2000 ) { switch (mss_freq) { - case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_LENGTH, &i_target, ring_length); break; - case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_LENGTH, &i_target, ring_length); break; - case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_LENGTH, &i_target, ring_length); break; - case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_LENGTH, &i_target, ring_length); break; - default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); - FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + case 1066 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_LENGTH, &i_target, ring_length); + break; + case 1333 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_LENGTH, &i_target, ring_length); + break; + case 1600 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_LENGTH, &i_target, ring_length); + break; + case 1866 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_LENGTH, &i_target, ring_length); + break; + default : + FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + uint32_t & MSS_FREQ = mss_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ); } } else if ( nest_freq == 2400 ) { switch (mss_freq) { - case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_LENGTH, &i_target, ring_length); break; - case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_LENGTH, &i_target, ring_length); break; - case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_LENGTH, &i_target, ring_length); break; - case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_LENGTH, &i_target, ring_length); break; - default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); - FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + case 1066 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_LENGTH, &i_target, ring_length); + break; + case 1333 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_LENGTH, &i_target, ring_length); + break; + case 1600 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_LENGTH, &i_target, ring_length); + break; + case 1866 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_LENGTH, &i_target, ring_length); + break; + default : + FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + uint32_t & MSS_FREQ = mss_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ); } } else { FAPI_ERR("Un-Supported NEST frequency detected: %d.", nest_freq); FAPI_ERR("NEST frequency of 2000 or 2400 expected."); + uint32_t & NEST_FREQ = nest_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_NEST_FREQ); break; } if (rc) @@ -404,7 +408,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) } FAPI_DBG("PLL ring LENGTH attribute is set to : %d.", ring_length); - // Read in the PLL Ring DATA based on the frequency attributes. if ( is_simulation ) { @@ -413,31 +416,53 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) else if ( nest_freq == 2000 ) { switch (mss_freq) { - case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_DATA, &i_target, attrRingData); break; - case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_DATA, &i_target, attrRingData); break; - case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_DATA, &i_target, attrRingData); break; - case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_DATA, &i_target, attrRingData); break; - default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); - FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + case 1066 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1066_DATA, &i_target, attrRingData); + break; + case 1333 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1333_DATA, &i_target, attrRingData); + break; + case 1600 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1600_DATA, &i_target, attrRingData); + break; + case 1866 : + rc = FAPI_ATTR_GET(ATTR_MEMB_TP_BNDY_PLL_NEST4000_MEM1866_DATA, &i_target, attrRingData); + break; + default : + FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + uint32_t & MSS_FREQ = mss_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ); } } else if ( nest_freq == 2400 ) { switch (mss_freq) { - case 1066 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_DATA, &i_target, attrRingData); break; - case 1333 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_DATA, &i_target, attrRingData); break; - case 1600 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_DATA, &i_target, attrRingData); break; - case 1866 : rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_DATA, &i_target, attrRingData); break; - default : FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); - FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLACE_HOLDER_ERROR); return rc; + case 1066 : + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1066_DATA, &i_target, attrRingData); + break; + case 1333 : + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1333_DATA, &i_target, attrRingData); + break; + case 1600 : + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1600_DATA, &i_target, attrRingData); + break; + case 1866 : + rc = FAPI_ATTR_GET( ATTR_MEMB_TP_BNDY_PLL_NEST4800_MEM1866_DATA, &i_target, attrRingData); + break; + default : + FAPI_ERR("Un-Supported DDR frequency detected: %d.", mss_freq); + FAPI_ERR("DDR frequency of 1066, 1333, 1600, or 1866 expected."); + uint32_t & MSS_FREQ = mss_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ); } } else { FAPI_ERR("Un-Supported NEST frequency detected: %d.", nest_freq); FAPI_ERR("NEST frequency of 2000 or 2400 expected."); + uint32_t & NEST_FREQ = nest_freq; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_INITF_UNSUPPORTED_NEST_FREQ); break; } if (rc) @@ -446,8 +471,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) break; } - - // Set the ring_data buffer to the right length for the ring data rc_ecmd |= ring_data.setBitLength(ring_length); // This length needs to match the real scan length in the scandef file (Required for hostboot.) if (rc_ecmd) @@ -457,7 +480,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) break; } - // Put the ring data from the attribute into the buffer rc_ecmd |= ring_data.insert(attrRingData, 0, ring_length, 0); if (rc_ecmd) @@ -467,7 +489,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) break; } - // Call the subroutine to load the data into the simulation or HW model rc = cen_load_pll_ring_from_buffer ( i_target, ring_data ); if (rc) @@ -476,8 +497,6 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) break; } - - } while(0); FAPI_INF("********* cen_mem_pll_initf complete *********"); @@ -493,6 +512,9 @@ fapi::ReturnCode cen_mem_pll_initf(const fapi::Target & i_target) This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: cen_mem_pll_initf.C,v $ +Revision 1.9 2013/11/15 16:29:56 mfred +Changes made by Mike Jones for gerrit review, mostly for improved error handling. + Revision 1.8 2013/10/02 16:09:38 mfred Mask FIR bit during scanning to resolve HW255774. Add code to load desired MEM PLL freq after determining DDR freq. diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.H b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.H index f69cbdb48..bde61be7e 100644 --- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.H +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf.H @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_mem_pll_initf.H,v 1.2 2013/01/29 21:50:56 mfred Exp $ +// $Id: cen_mem_pll_initf.H,v 1.3 2013/11/15 16:29:59 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/cen_mem_pll_initf.H,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 @@ -43,9 +43,10 @@ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- // 1.0 | mfred | 08/09/12| Initial creation +// 1.3 | mjjones | 11/12/13| Deleted internal func prototype -#ifndef CEN_MEM_PLL_INITFHWPB_H_ -#define CEN_MEM_PLL_INITFHWPB_H_ +#ifndef CEN_MEM_PLL_INITF_H_ +#define CEN_MEM_PLL_INITF_H_ #include <fapi.H> @@ -53,34 +54,18 @@ typedef fapi::ReturnCode (*cen_mem_pll_initf_FP_t)(const fapi::Target& i_target) extern "C" { - // Target is centaur - /** - * @brief cen_load_pll_ring_from_attribute procedure. The purpose of this procedure is to scan the right values in to the Centaur PLL scan chain. + * @brief cen_mem_pll_initf procedure. * - * @param[in] i_target Reference to centaur target - * @return ReturnCode - */ - fapi::ReturnCode cen_load_pll_ring_from_buffer(const fapi::Target& i_target, - ecmdDataBufferBase i_scan_ring_data - ); - - // Target is centaur - - -/** - * @brief cen_mem_pll_initf procedure. The purpose of this procedure is to scan the right values in to the Centaur MEM PLL controller.. + * The purpose of this procedure is to scan the right values in to the Centaur + * MEM PLL controller.. * * @param[in] i_target Reference to centaur target * @return ReturnCode */ - fapi::ReturnCode cen_mem_pll_initf(const fapi::Target& i_target); - // Target is centaur - - - +fapi::ReturnCode cen_mem_pll_initf(const fapi::Target& i_target); } // extern "C" -#endif // CEN_MEM_PLL_INITFHWPB_H_ +#endif // CEN_MEM_PLL_INITF_H_ diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml new file mode 100644 index 000000000..ed4bdb8ca --- /dev/null +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml @@ -0,0 +1,52 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- $Id: cen_mem_pll_initf_errors.xml,v 1.1 2013/11/15 16:30:43 mfred Exp $ --> +<!-- Error definitions for cen_mem_pll_initf --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MEM_PLL_INITF_UNSUPPORTED_MSS_FREQ</rc> + <description> + cen_mem_pll_initf found unsupported memory channel frequency in + ATTR_MSS_FREQ attribute. + </description> + <ffdc>MSS_FREQ</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MEM_PLL_INITF_UNSUPPORTED_NEST_FREQ</rc> + <description> + cen_mem_pll_initf found unsupported nest frequency in + ATTR_FREQ_PB attribute. + </description> + <ffdc>NEST_FREQ</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> +</hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup.C b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup.C index c55062091..b2dd7ed34 100644 --- a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup.C +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_mem_pll_setup.C,v 1.24 2013/03/04 17:56:26 mfred Exp $ +// $Id: cen_mem_pll_setup.C,v 1.25 2013/11/15 16:30:00 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/cen_mem_pll_setup.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -44,19 +44,14 @@ #include <cen_scom_addresses.H> #include <cen_mem_pll_setup.H> - - // Constants const uint64_t DELAY_100NS = 100; // General purpose 100 ns delay for HW mode (2000 sim cycles if simclk - 20ghz) const uint64_t DELAY_2000SIMCYCLES = 2000; // General purpose 2000 sim cycle delay for sim mode (100 ns if simclk = 20Ghz) const uint16_t POLL_COUNT_MAX = 50; // Number of times to poll for PLL lock before timing out. - // CFAM FSI STATUS register bit/field definitions const uint8_t FSI_STATUS_MEM_PLL_LOCK_BIT = 25; - - extern "C" { using namespace fapi; @@ -64,18 +59,15 @@ using namespace fapi; fapi::ReturnCode cen_mem_pll_setup(const fapi::Target & i_target) { // Target is centaur - fapi::ReturnCode rc; ecmdDataBufferBase cfam_data(32); uint32_t poll_count = 0; uint32_t done_polling = 0; - FAPI_INF("********* cen_mem_pll_setup start *********"); do { - //--------------------------------------- // Poll for PLL lock bit //--------------------------------------- @@ -105,11 +97,12 @@ fapi::ReturnCode cen_mem_pll_setup(const fapi::Target & i_target) } while ((done_polling == 0) && (poll_count < POLL_COUNT_MAX)); // Poll until PLL is locked or max count is reached. if (rc) break; // Go to end of proc if error found inside polling loop. - if ( (poll_count == POLL_COUNT_MAX) && ( done_polling != 1 ) ) { FAPI_ERR("Centaur MEM PLL failed to lock! Polling timed out after %d loops.",POLL_COUNT_MAX); - FAPI_SET_HWP_ERROR(rc, RC_MSS_PLL_LOCK_TIMEOUT); + ecmdDataBufferBase & CFAM_FSI_STATUS = cfam_data; + const fapi::Target & MEMBUF_CHIP_IN_ERROR = i_target; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_PLL_SETUP_PLL_LOCK_TIMEOUT); break; } else @@ -117,8 +110,6 @@ fapi::ReturnCode cen_mem_pll_setup(const fapi::Target & i_target) FAPI_INF("Centaur MEM PLL is now locked."); } - - } while(0); FAPI_INF("********* cen_mem_pll_setup complete *********"); @@ -134,6 +125,9 @@ fapi::ReturnCode cen_mem_pll_setup(const fapi::Target & i_target) This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: cen_mem_pll_setup.C,v $ +Revision 1.25 2013/11/15 16:30:00 mfred +Changes made by Mike Jones for gerrit review, mostly for improved error handling. + Revision 1.24 2013/03/04 17:56:26 mfred Add some header comments for BACKUP and SCREEN. diff --git a/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml new file mode 100644 index 000000000..0475402f2 --- /dev/null +++ b/src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml @@ -0,0 +1,52 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- $Id: cen_mem_pll_setup_errors.xml,v 1.2 2013/11/21 15:47:19 mjjones Exp $ --> +<!-- Error definitions for cen_mem_pll_setup --> +<hwpErrors> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_CEN_MEM_PLL_SETUP_PLL_LOCK_TIMEOUT</rc> + <description> + cen_mem_pll_setup timed out waiting for PLL lock. + Membuf chip is most likely bad, but could be reference clock. + </description> + <ffdc>CFAM_FSI_STATUS</ffdc> + <callout> + <target>MEMBUF_CHIP_IN_ERROR</target> + <priority>HIGH</priority> + </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MEMBUF_CHIP_IN_ERROR</target> + </deconfigure> + <gard> + <target>MEMBUF_CHIP_IN_ERROR</target> + </gard> + </hwpError> +</hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks.C b/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks.C index 7dffc80c6..106543e9b 100644 --- a/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks.C +++ b/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: cen_mem_startclocks.C,v 1.11 2013/07/08 13:38:27 mfred Exp $ +// $Id: cen_mem_startclocks.C,v 1.12 2013/11/15 16:30:02 mfred Exp $ // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/centaur/working/procedures/ipl/fapi/cen_mem_startclocks.C,v $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2012 @@ -277,7 +277,9 @@ fapi::ReturnCode cen_mem_startclocks(const fapi::Target & i_target) if ( scom_data.getDoubleWord(0) != MEM_CLK_STATUS_REG_EXP_DATA ) { FAPI_ERR("Unexpected clock status! Clk Status Reg 0x03030008 = %16llX, but %16llX was expected.",scom_data.getDoubleWord(0),MEM_CLK_STATUS_REG_EXP_DATA); - FAPI_SET_HWP_ERROR(rc, RC_MSS_UNEXPECTED_MEM_CLK_STATUS); + uint64_t MEM_CLK_STATUS_REG = scom_data.getDoubleWord(0); + const fapi::Target & MEMBUF_CHIP_IN_ERROR = i_target; + FAPI_SET_HWP_ERROR(rc, RC_CEN_MEM_STARTCLOCKS_UNEXPECTED_CLOCK_STATUS); break; } @@ -393,6 +395,9 @@ fapi::ReturnCode cen_mem_startclocks(const fapi::Target & i_target) This section is automatically updated by CVS when you check in this file. Be sure to create CVS comments when you commit so that they can be included here. $Log: cen_mem_startclocks.C,v $ +Revision 1.12 2013/11/15 16:30:02 mfred +Changes made by Mike Jones for gerrit review, mostly for improved error handling. + Revision 1.11 2013/07/08 13:38:27 mfred Change one hwp_error usage from RC_MSS_UNEXPECTED_CLOCK_STATUS to RC_MSS_UNEXPECTED_MEM_CLK_STATUS. diff --git a/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml b/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml new file mode 100644 index 000000000..6e945d3ba --- /dev/null +++ b/src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml @@ -0,0 +1,53 @@ +<!-- IBM_PROLOG_BEGIN_TAG --> +<!-- This is an automatically generated prolog. --> +<!-- --> +<!-- $Source: src/usr/hwpf/hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml $ --> +<!-- --> +<!-- IBM CONFIDENTIAL --> +<!-- --> +<!-- COPYRIGHT International Business Machines Corp. 2013 --> +<!-- --> +<!-- p1 --> +<!-- --> +<!-- Object Code Only (OCO) source materials --> +<!-- Licensed Internal Code Source Materials --> +<!-- IBM HostBoot Licensed Internal Code --> +<!-- --> +<!-- The source code for this program is not published or otherwise --> +<!-- divested of its trade secrets, irrespective of what has been --> +<!-- deposited with the U.S. Copyright Office. --> +<!-- --> +<!-- Origin: 30 --> +<!-- --> +<!-- IBM_PROLOG_END_TAG --> +<!-- $Id: cen_mem_startclocks_errors.xml,v 1.2 2013/11/21 15:47:35 mjjones Exp $ --> +<!-- Error definitions for cen_mem_startclocks --> +<hwpErrors> + <hwpError> + <rc>RC_CEN_MEM_STARTCLOCKS_UNEXPECTED_CLOCK_STATUS</rc> + <description> + cen_mem_startclocks got unexpected clock status in the + MEM_CLK_STATUS register. + Membuf chip is most likely bad, but could be reference clock. + </description> + <ffdc>MEM_CLK_STATUS_REG</ffdc> + <ffdc>MEM_CLK_STATUS_REG_EXP_DATA</ffdc> + <callout> + <target>MEMBUF_CHIP_IN_ERROR</target> + <priority>HIGH</priority> + </callout> + <callout> + <hw> + <hwid>MEM_REF_CLOCK</hwid> + <refTarget>MEMBUF_CHIP_IN_ERROR</refTarget> + </hw> + <priority>MEDIUM</priority> + </callout> + <deconfigure> + <target>MEMBUF_CHIP_IN_ERROR</target> + </deconfigure> + <gard> + <target>MEMBUF_CHIP_IN_ERROR</target> + </gard> + </hwpError> +</hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml b/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml index 98d384bf9..d0b5d14ae 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml +++ b/src/usr/hwpf/hwp/dram_training/mss_scominit/memory_mss_scominit.xml @@ -20,17 +20,36 @@ <!-- Origin: 30 --> <!-- --> <!-- IBM_PROLOG_END_TAG --> -<hwpErrors> -<!-- $Id: memory_mss_scominit.xml,v 1.1 2013/06/19 18:28:26 bellows Exp $ --> +<!-- $Id: memory_mss_scominit.xml,v 1.2 2013/11/18 22:32:03 mwuu Exp $ --> <!-- For file ../../ipl/fapi/mss_scominit.C --> <!-- // *! OWNER NAME : Menlo Wuu Email: menlowuu@us.ibm.com --> <!-- // *! BACKUP NAME : Mark Bellows Email: bellows@us.ibm.com --> -<!-- Original Source for RC_MSS_NUM_MBA_ERROR memory_errors.xml --> +<hwpErrors> + <!-- *********************************************************************** --> <hwpError> - <rc>RC_MSS_NUM_MBA_ERROR</rc> - <description>Less than 2 MBA's returned by fapiGetChildChiplets</description> -</hwpError> - - + <rc>RC_MSS_SCOMINIT_NUM_MBA_ERROR</rc> + <description> + mss_scominit did not see 2 present membuf child MBAs returned by + fapiGetChildChiplets + </description> + <ffdc>NUM_MBAS</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> + <!-- *********************************************************************** --> + <hwpError> + <rc>RC_MSS_SCOMINIT_NUM_L4_ERROR</rc> + <description> + mss_scominit did not see 1 present membuf child L4 returned by + fapiGetChildChiplets + </description> + <ffdc>NUM_L4S</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> + </hwpError> </hwpErrors> diff --git a/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C b/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C index 689dc7672..f168f4ad0 100644 --- a/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C +++ b/src/usr/hwpf/hwp/dram_training/mss_scominit/mss_scominit.C @@ -20,7 +20,7 @@ /* Origin: 30 */ /* */ /* IBM_PROLOG_END_TAG */ -// $Id: mss_scominit.C,v 1.17 2013/07/02 21:05:23 mwuu Exp $ +// $Id: mss_scominit.C,v 1.18 2013/11/18 21:49:25 mwuu Exp $ //------------------------------------------------------------------------------ // *! (C) Copyright International Business Machines Corp. 2011 // *! All Rights Reserved -- Property of IBM @@ -41,6 +41,7 @@ //------------------------------------------------------------------------------ // Version:| Author: | Date: | Comment: //---------|----------|---------|----------------------------------------------- +// 1.18 | menlowuu |14-NOV-13| Added Mike Jones changes for callouts // 1.17 | menlowuu |02-JUL-13| Fixed vector insert for L4 targets // 1.16 | menlowuu |02-JUL-13| Added L4 targets for MBS initfile // 1.15 | menlowuu |11-NOV-12| Removed include of dimmBadDqBitmapFuncs.H> @@ -121,10 +122,10 @@ ReturnCode mss_scominit(const Target & i_target) { } else if (vector_targets.size() != 2) { - FAPI_ERR("fapiGetChildChiplets returned present MBAs != 2"); - FAPI_SET_HWP_ERROR(rc, RC_MSS_NUM_MBA_ERROR); - FAPI_ERR("Present MBAs = %i, generating RC_MSS_NUM_MBA_ERROR = 0x%x", - vector_targets.size(), static_cast<uint32_t>(rc)); + FAPI_ERR("fapiGetChildChiplets returned %d present MBAs, expected 2", + vector_targets.size()); + uint32_t NUM_MBAS = vector_targets.size(); + FAPI_SET_HWP_ERROR(rc, RC_MSS_SCOMINIT_NUM_MBA_ERROR); return (rc); } else @@ -146,8 +147,10 @@ ReturnCode mss_scominit(const Target & i_target) { if (vector_l4_targets.size() != 1) { - FAPI_ERR("Error target does not have L4!"); - FAPI_ERR("RC = 0x%x", static_cast<uint32_t>(rc)); + FAPI_ERR("fapiGetChildChiplets returned %d present L4s, expected 1", + vector_l4_targets.size()); + uint32_t NUM_L4S = vector_l4_targets.size(); + FAPI_SET_HWP_ERROR(rc, RC_MSS_SCOMINIT_NUM_L4_ERROR); return (rc); } diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile index 291d99074..979afb3a7 100644 --- a/src/usr/hwpf/makefile +++ b/src/usr/hwpf/makefile @@ -125,7 +125,10 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml \ hwp/proc_otprom_registers.xml \ hwp/runtime_errors/p8_gpe_registers.xml \ hwp/runtime_errors/p8_pmc_deconfig_setup_errors.xml \ - hwp/runtime_errors/p8_pss_registers.xml + hwp/runtime_errors/p8_pss_registers.xml \ + hwp/dram_training/mem_startclocks/cen_mem_startclocks_errors.xml \ + hwp/dram_training/mem_pll_setup/cen_mem_pll_initf_errors.xml \ + hwp/dram_training/mem_pll_setup/cen_mem_pll_setup_errors.xml ## these get generated into obj/genfiles/AttributeIds.H HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \ |