diff options
| -rw-r--r-- | src/include/arch/ppc.H | 7 | ||||
| -rw-r--r-- | src/include/kernel/syscalls.H | 4 | ||||
| -rw-r--r-- | src/include/sys/misc.h | 7 | ||||
| -rw-r--r-- | src/include/usr/isteps/istep_reasoncodes.H | 1 | ||||
| -rw-r--r-- | src/kernel/syscall.C | 22 | ||||
| -rw-r--r-- | src/lib/syscall_misc.C | 8 | ||||
| -rw-r--r-- | src/usr/isteps/istep21/call_host_start_payload.C | 51 | ||||
| -rw-r--r-- | src/usr/isteps/istep21/makefile | 1 |
8 files changed, 100 insertions, 1 deletions
diff --git a/src/include/arch/ppc.H b/src/include/arch/ppc.H index a4c3afbed..36b514f04 100644 --- a/src/include/arch/ppc.H +++ b/src/include/arch/ppc.H @@ -364,6 +364,13 @@ inline uint64_t getHID() } ALWAYS_INLINE +inline void setHID(uint64_t _hid) +{ + register uint64_t hid = _hid; + asm volatile("mtspr 1008, %0; isync" :: "r" (hid)); +} + +ALWAYS_INLINE inline size_t getCacheLineBytes() { return 128; diff --git a/src/include/kernel/syscalls.H b/src/include/kernel/syscalls.H index 951f55fac..35c6a5fe8 100644 --- a/src/include/kernel/syscalls.H +++ b/src/include/kernel/syscalls.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2010,2014 */ +/* Contributors Listed Below - COPYRIGHT 2010,2017 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -93,6 +93,8 @@ namespace Systemcalls MISC_CPUSTARTCORE, /** cpu_spr_value() */ MISC_CPUSPRVALUE, + /** cpu_spr_set() */ + MISC_CPUSPRSET, /** cpu_nap() - Hidden syscall */ MISC_CPUNAP, /** cpu_master_winkle() */ diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h index 8255aa3b5..6b57e7e4e 100644 --- a/src/include/sys/misc.h +++ b/src/include/sys/misc.h @@ -202,6 +202,13 @@ enum CpuSprNames */ uint64_t cpu_spr_value(CpuSprNames spr); +/** @fn cpu_spr_set + * @brief Writes an SPR. + * + * @return rc: true = success, false = unsupported SPR. + */ +uint64_t cpu_spr_set(CpuSprNames spr, uint64_t newValue ); + /** @fn cpu_master_winkle * @brief Winkle the master core so runtime SLW image can be applied. * diff --git a/src/include/usr/isteps/istep_reasoncodes.H b/src/include/usr/isteps/istep_reasoncodes.H index 5895c11ee..1b661f17c 100644 --- a/src/include/usr/isteps/istep_reasoncodes.H +++ b/src/include/usr/isteps/istep_reasoncodes.H @@ -125,6 +125,7 @@ namespace ISTEP RC_RETURNED_FFDC = ISTEP_COMP_ID | 0x34, RC_P9N_DD1_NOT_SUPPORTED = ISTEP_COMP_ID | 0x35, RC_PREVENT_REBOOT_IN_MFG_TERM_MODE = ISTEP_COMP_ID | 0x36, + RC_FAILED_WRITE_SPR = ISTEP_COMP_ID | 0x37, }; }; diff --git a/src/kernel/syscall.C b/src/kernel/syscall.C index 5245705d4..c50bae001 100644 --- a/src/kernel/syscall.C +++ b/src/kernel/syscall.C @@ -119,6 +119,7 @@ namespace Systemcalls void CpuDDLevel(task_t *t); void CpuStartCore(task_t *t); void CpuSprValue(task_t *t); + void CpuSprSet(task_t *t); void CpuNap(task_t *t); void CpuWinkle(task_t *t); void MmAllocBlock(task_t *t); @@ -160,6 +161,7 @@ namespace Systemcalls &CpuDDLevel, // MISC_CPUDDLEVEL &CpuStartCore, // MISC_CPUSTARTCORE &CpuSprValue, // MISC_CPUSPRVALUE + &CpuSprSet, // MISC_CPUSPRSET &CpuNap, // MISC_CPUNAP &CpuWinkle, // MISC_CPUWINKLE @@ -745,6 +747,26 @@ namespace Systemcalls } }; + /** Set SPR values. */ + void CpuSprSet(task_t *t) + { + uint64_t spr = TASK_GETARG0(t); + uint64_t newValue = TASK_GETARG1(t); + + switch (spr) + { + case CPU_SPR_HID: + setHID( newValue ); + TASK_SETRTN(t, true); + break; + + default: + // unsupported SPR for write + TASK_SETRTN(t, false); + break; + } + }; + /** * Allow a task to request privilege escalation to execute the 'nap' * instruction. diff --git a/src/lib/syscall_misc.C b/src/lib/syscall_misc.C index fd8d76b62..dff702ddd 100644 --- a/src/lib/syscall_misc.C +++ b/src/lib/syscall_misc.C @@ -93,6 +93,14 @@ uint64_t cpu_spr_value(CpuSprNames spr) _syscall1(MISC_CPUSPRVALUE, reinterpret_cast<void*>(spr))); } +uint64_t cpu_spr_set(CpuSprNames spr, uint64_t newValue) +{ + return reinterpret_cast<uint64_t>( + _syscall2( MISC_CPUSPRSET, + reinterpret_cast<void*>(spr), + reinterpret_cast<void*>(newValue) )); +} + int cpu_master_winkle(bool i_fusedCores) { task_affinity_pin(); diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C index 251983324..772011864 100644 --- a/src/usr/isteps/istep21/call_host_start_payload.C +++ b/src/usr/isteps/istep21/call_host_start_payload.C @@ -50,6 +50,7 @@ #include <fapi2/target.H> #include <fapi2/plat_hwp_invoker.H> #include <p9_cpu_special_wakeup.H> +#include <p9n2_quad_scom_addresses_fld.H> #include <ipmi/ipmiwatchdog.H> #include <config.h> #include <errno.h> @@ -466,6 +467,56 @@ errlHndl_t callShutdown ( uint64_t i_masterInstance, } } + if ( is_sapphire_load() ) + { + // opal load, Set the ATTN enable bit in the HID register + uint64_t l_enblAttnMask = + 0x8000000000000000ull >> P9N2_C_HID_EN_ATTN; + + uint64_t l_curHidVal = cpu_spr_value( CPU_SPR_HID ); + uint64_t l_newHidVal = l_curHidVal | l_enblAttnMask; + + uint64_t rc = cpu_spr_set( CPU_SPR_HID, l_newHidVal); + + if ( rc == false ) + { + // Error writing the SPR or + // SPR is unsupported/restricted from being written + // We will create an error to be passed back. + // This will cause the istep to fail. + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + ERR_MRK"call_host_start_payload()::" + "callShutdown() -" + " Write of HID SPR failed" ); + + /*@ + * @errortype + * @reasoncode RC_FAILED_WRITE_SPR + * @severity ERRORLOG::ERRL_SEV_CRITICAL_SYS_TERM + * @moduleid MOD_START_PAYLOAD_CALL_SHUTDOWN + * @userdata1 current value of HID + * @userdata2 write value attempted to HID + * @devdesc Write of HID SPR failed + * @custdesc A problem occurred during the IPL + * of the system. + */ + err = + new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_CRITICAL_SYS_TERM, + MOD_START_PAYLOAD_CALL_SHUTDOWN, + RC_FAILED_WRITE_SPR, + l_curHidVal, + l_newHidVal ); + + err->collectTrace(ISTEP_COMP_NAME); + + break; + } + } // end opal load + else + { + // PHYP load, do not enable ATTN + } + // do the shutdown. TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "callShutdown finished, shutdown = 0x%x.", diff --git a/src/usr/isteps/istep21/makefile b/src/usr/isteps/istep21/makefile index 25ff7be19..c905b60ae 100644 --- a/src/usr/isteps/istep21/makefile +++ b/src/usr/isteps/istep21/makefile @@ -25,6 +25,7 @@ ROOTPATH = ../../../.. MODULE = istep21 +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/initfiles/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/ |
