diff options
| -rw-r--r-- | src/include/usr/scom/centaurScomCache.H | 10 | ||||
| -rw-r--r-- | src/usr/scom/centaurScomCache.C | 53 |
2 files changed, 35 insertions, 28 deletions
diff --git a/src/include/usr/scom/centaurScomCache.H b/src/include/usr/scom/centaurScomCache.H index 013976384..94f345694 100644 --- a/src/include/usr/scom/centaurScomCache.H +++ b/src/include/usr/scom/centaurScomCache.H @@ -184,9 +184,10 @@ class ScomCache * @par Detailed Description: * Builds a SCOM register cache seeded with expected hardware * initialization values for each security sensitive register, and - * clones it to every Centaur + * clones it to every Centaur. Also instantiates the register + * definitions. */ - void init() const; + void init(); /** * @brief Globally enables caching of read/write SCOM requests for every @@ -210,9 +211,10 @@ class ScomCache bool cacheEnabled() const; /** - * @brief Delete all Centaurs' SCOM register cache + * @brief Delete all Centaurs' SCOM register cache and the + * global register definitions */ - void destroy() const; + void destroy(); /** * @brief If caching enabled and register is sensitive, writes the diff --git a/src/usr/scom/centaurScomCache.C b/src/usr/scom/centaurScomCache.C index 99ccc73fd..17199b549 100644 --- a/src/usr/scom/centaurScomCache.C +++ b/src/usr/scom/centaurScomCache.C @@ -56,34 +56,14 @@ const bool ADD_HI_PRI_HB_SW_CALLOUT=true; const bool NO_HB_SW_CALLOUT=false; ScomCache::ScomCache() - : iv_pScomRegDefs(_initScomRegDefs()), + : iv_pScomRegDefs(nullptr), iv_cacheEnabled(false) { - // Sort SCOM register defintion records by register address so that we - // can look up a given register using std::lower_bound in O(log n) - // algorithmic complexity and then jump to same index within local - // Centaur SCOM cache to find the current value, yielding overall - // algorithmic complexity of O(log n) for lookup of any given Centaur's - // cached SCOM register - std::sort( - iv_pScomRegDefs->begin(), - iv_pScomRegDefs->end(), - [](const ScomRegDef& i_lhs,const ScomRegDef &i_rhs) - { - return (i_lhs.addr<i_rhs.addr); - }); - - _enforceScomRegDefUniqueness(); - - _validateScomRegDefs(); - - _optimizeScomRegDefs(); } ScomCache::~ScomCache() { - delete iv_pScomRegDefs; - iv_pScomRegDefs=nullptr; + destroy(); } void ScomCache::_enforceScomRegDefUniqueness() const @@ -196,10 +176,32 @@ void ScomCache::_optimizeScomRegDefs() } } -void ScomCache::init() const +void ScomCache::init() { destroy(); + iv_pScomRegDefs = _initScomRegDefs(); + + // Sort SCOM register defintion records by register address so that we + // can look up a given register using std::lower_bound in O(log n) + // algorithmic complexity and then jump to same index within local + // Centaur SCOM cache to find the current value, yielding overall + // algorithmic complexity of O(log n) for lookup of any given Centaur's + // cached SCOM register + std::sort( + iv_pScomRegDefs->begin(), + iv_pScomRegDefs->end(), + [](const ScomRegDef& i_lhs,const ScomRegDef &i_rhs) + { + return (i_lhs.addr<i_rhs.addr); + }); + + _enforceScomRegDefUniqueness(); + + _validateScomRegDefs(); + + _optimizeScomRegDefs(); + std::vector<uint64_t> registerCache(iv_pScomRegDefs->size(),0); auto registerCacheItr = registerCache.begin(); for (const auto& scomRegDef : *iv_pScomRegDefs) @@ -235,7 +237,7 @@ void ScomCache::init() const } } -void ScomCache::destroy() const +void ScomCache::destroy() { // Grab all blueprint Centaurs in case a Centaur got deconfigured after // Hostboot configured its cache @@ -258,6 +260,9 @@ void ScomCache::destroy() const _setCachePtr(pCentaur,pCache); } } + + delete iv_pScomRegDefs; + iv_pScomRegDefs=nullptr; } errlHndl_t ScomCache::write( |
