diff options
27 files changed, 804 insertions, 331 deletions
diff --git a/src/build/simics/startup.simics b/src/build/simics/startup.simics index 6da417c5a..409526589 100755 --- a/src/build/simics/startup.simics +++ b/src/build/simics/startup.simics @@ -34,13 +34,12 @@ echo "Master PNOR is: "+$hb_pnor $hb_cpu = "system_cmp0.cpu0_0_00_0" echo "Defaulting to CPU "+$hb_cpu+" for Hostboot tools" -# @todo RTC 130184 Simics P9 SBE # Prevent SBE Updates from happening on an IPL -#echo "Altering SBE SEEPROM Versions to disable Update in IPL" -#foreach $cc in (get-object-list p9_proc) { -# ($cc).procSBE0Primary_eeprom_image.set 0x300 0x5A5A5A5A 8 -l -# ($cc).procSBE0Backup_eeprom_image.set 0x300 0x5A5A5A5A 8 -l -#} +echo "Altering SBE SEEPROM Versions to disable Update in IPL" +foreach $cc in (get-object-list p9_proc) { + ($cc).seeprom1.seeprom1_image.set 0x3FED9 0x5A5A5A5A 8 -l + ($cc).seeprom3.seeprom3_image.set 0x3FED9 0x5A5A5A5A 8 -l +} # Load HB debug tools. try { diff --git a/src/include/usr/i2c/eepromif.H b/src/include/usr/i2c/eepromif.H index d4d847777..6371e6da5 100644 --- a/src/include/usr/i2c/eepromif.H +++ b/src/include/usr/i2c/eepromif.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2013,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -65,10 +65,11 @@ struct EepromInfo_t uint64_t port; //< I2C port (relative to engine) uint64_t busFreq; //< Bus speed in Hz uint64_t devAddr; //< I2C device address (relative to port) - uint64_t sizeKB; //< Size in KB + uint64_t sizeKB; //< Total eeprom size in KB + uint64_t chipCount; //< Number of chips making up eeprom device uint64_t addrBytes; //< Number of bytes required for addressing eeprom_chip_types_t device; //< Identifies role of eeprom - TARGETING::Target* assocTarg; //< Target associated with this device + TARGETING::Target* assocTarg; //< Target associated with this device }; /** diff --git a/src/include/usr/isteps/istep08list.H b/src/include/usr/isteps/istep08list.H index 1b80bcd91..a0c9d31e4 100644 --- a/src/include/usr/isteps/istep08list.H +++ b/src/include/usr/isteps/istep08list.H @@ -408,6 +408,7 @@ namespace INITSERVICE const DepModInfo g_istep08Dependancies = { { DEP_LIB(libistep08.so), + DEP_LIB(libsbe.so), NULL } }; diff --git a/src/include/usr/isteps/istep10list.H b/src/include/usr/isteps/istep10list.H index 932367961..b9da2a4eb 100644 --- a/src/include/usr/isteps/istep10list.H +++ b/src/include/usr/isteps/istep10list.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2012,2015 */ +/* Contributors Listed Below - COPYRIGHT 2012,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -111,6 +111,7 @@ const TaskInfo g_istep10[] = { const DepModInfo g_istep10Dependancies = { { DEP_LIB(libistep10.so), + DEP_LIB(libsbe.so), NULL } }; diff --git a/src/include/usr/sbe/sbereasoncodes.H b/src/include/usr/sbe/sbereasoncodes.H index effb69ee3..b11afef24 100644 --- a/src/include/usr/sbe/sbereasoncodes.H +++ b/src/include/usr/sbe/sbereasoncodes.H @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2013,2015 */ +/* Contributors Listed Below - COPYRIGHT 2013,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -60,6 +60,7 @@ enum sbeModuleId SBE_READ_SBE_IMAGE = 0x0F, SBE_WRITE_SBE_IMAGE = 0x10, SBE_GET_SBE_IMAGE_SIZE = 0x11, + HBBL_FIND_IN_PNOR = 0x12, }; /** @@ -99,6 +100,9 @@ enum sbeReasonCode SBE_MASTER_VERSION_DOWNLEVEL = SBE_COMP_ID | 0x15, SBE_IMAGE_GET_SET_SCALAR_FAIL = SBE_COMP_ID | 0x16, + HBBL_INVALID_INPUT = SBE_COMP_ID | 0x17, + HBBL_INVALID_INSTRUCTION = SBE_COMP_ID | 0x18, + }; }; // end SBE diff --git a/src/include/usr/vmmconst.h b/src/include/usr/vmmconst.h index 701b02240..b155d894f 100644 --- a/src/include/usr/vmmconst.h +++ b/src/include/usr/vmmconst.h @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2011,2015 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -87,9 +87,9 @@ /** PNOR Resource Provider is at 2GB */ #define VMM_VADDR_PNOR_RP (2 * GIGABYTE) -/** SBE Update process is at 3GB, uses 256KB */ +/** SBE Update process is at 3GB, uses 512KB */ #define VMM_VADDR_SBE_UPDATE (3 * GIGABYTE) -#define VMM_SBE_UPDATE_SIZE (256*KILOBYTE) +#define VMM_SBE_UPDATE_SIZE (512 * KILOBYTE) #define VMM_VADDR_SBE_UPDATE_END (VMM_VADDR_SBE_UPDATE + VMM_SBE_UPDATE_SIZE) /** Attribute Resource Provider */ diff --git a/src/makefile b/src/makefile index 3a8c6b585..bb312ddf0 100644 --- a/src/makefile +++ b/src/makefile @@ -170,6 +170,7 @@ EXTENDED_MODULES += $(if $(CONFIG_VPO_COMPILE),,runtime) EXTENDED_MODULES += secureboot_ext EXTENDED_MODULES += $(if $(CONFIG_TPMDD),secureboot_trusted,) EXTENDED_MODULES += devtree +EXTENDED_MODULES += sbe EXTENDED_MODULES += sbeio EXTENDED_MODULES += $(if $(CONFIG_HTMGT),htmgt) EXTENDED_MODULES += $(if $(CONFIG_GPIODD),gpio,) diff --git a/src/usr/devicefw/associator.C b/src/usr/devicefw/associator.C index 399c8fdd2..8d34d9554 100644 --- a/src/usr/devicefw/associator.C +++ b/src/usr/devicefw/associator.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2011,2014 */ +/* Contributors Listed Below - COPYRIGHT 2011,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -252,6 +254,8 @@ namespace DeviceFW // Follow first level (access type), verify. if (0 == routeMap[i_accessType].offset) { + TRACDCOMP(g_traceBuffer, "findDeviceRoute did not verify first " + "level: i_accessType=%d", i_accessType ); break; } @@ -280,6 +284,9 @@ namespace DeviceFW targets[i_devType].offset]; break; } + + TRACDCOMP(g_traceBuffer, "findDeviceRoute did not find " + "wildcard registration match" ); } // Check op type = i_opType registrations. @@ -304,6 +311,9 @@ namespace DeviceFW targets[i_devType].offset]; break; } + + TRACDCOMP(g_traceBuffer, "findDeviceRoute did not find " + "i_opType=%d registration match", i_opType ); } } while(0); diff --git a/src/usr/i2c/eepromdd.C b/src/usr/i2c/eepromdd.C index 5dc99a869..3a2808d93 100755 --- a/src/usr/i2c/eepromdd.C +++ b/src/usr/i2c/eepromdd.C @@ -65,8 +65,8 @@ trace_desc_t* g_trac_eepromr = NULL; TRAC_INIT( & g_trac_eepromr, "EEPROMR", KILOBYTE ); // Easy macro replace for unit testing -//#define TRACUCOMP(args...) TRACFCOMP(args) -#define TRACUCOMP(args...) +#define TRACUCOMP(args...) TRACFCOMP(args) // @TODO RTC: 138226 +//#define TRACUCOMP(args...) // ---------------------------------------------- // Defines @@ -134,6 +134,10 @@ errlHndl_t eepromPerformOp( DeviceFW::OperationType i_opType, bool scacDisabled = false; #endif //__HOSTBOOT_RUNTIME + void * l_pBuffer = io_buffer; + size_t l_currentOpLen = io_buflen; + size_t l_remainingOpLen = io_buflen; + do { // Read Attributes needed to complete the operation @@ -145,6 +149,9 @@ errlHndl_t eepromPerformOp( DeviceFW::OperationType i_opType, break; } + size_t l_snglChipSize = (i2cInfo.devSize_KB * KILOBYTE) + / i2cInfo.chipCount; + // Check to see if we need to find a new target for // the I2C Master err = eepromGetI2CMasterTarget( i_target, @@ -194,6 +201,27 @@ errlHndl_t eepromPerformOp( DeviceFW::OperationType i_opType, break; } + // Adjust offset and devAddr to the correct starting chip + while( i2cInfo.offset >= l_snglChipSize ) + { + i2cInfo.offset -= l_snglChipSize; + i2cInfo.devAddr += EEPROM_DEVADDR_INC; + } + + // Keep first op length within a chip + if( ( i2cInfo.offset + io_buflen ) > l_snglChipSize ) + { + l_currentOpLen = l_snglChipSize - i2cInfo.offset; + } + + TRACFCOMP( g_trac_eeprom, + "eepromPerformOp(): i_opType=%d " + "C-p/e/dA=%d-%d/%d/0x%X, offset=0x%X, len=0x%X, " + "snglChipKB=0x%X, chipCount=0x%X, devSizeKB=0x%X", i_opType, + i2cInfo.chip, i2cInfo.port, i2cInfo.engine, i2cInfo.devAddr, + i2cInfo.offset, io_buflen, l_snglChipSize, + i2cInfo.chipCount, i2cInfo.devSize_KB); + #ifdef __HOSTBOOT_RUNTIME // Disable Sensor Cache if the I2C master target is MEMBUF if( i2cMasterTarget->getAttr<TARGETING::ATTR_TYPE>() == @@ -208,57 +236,77 @@ errlHndl_t eepromPerformOp( DeviceFW::OperationType i_opType, #endif //__HOSTBOOT_RUNTIME // Do the read or write - if( i_opType == DeviceFW::READ ) + while(l_remainingOpLen > 0) { - err = eepromRead( i2cMasterTarget, - io_buffer, - io_buflen, - i2cInfo ); - - if ( err ) + if( i_opType == DeviceFW::READ ) { - break; + err = eepromRead( i2cMasterTarget, + l_pBuffer, + l_currentOpLen, + i2cInfo ); + } + else if( i_opType == DeviceFW::WRITE ) + { + err = eepromWrite( i2cMasterTarget, + l_pBuffer, + l_currentOpLen, + i2cInfo ); } + else + { + TRACFCOMP( g_trac_eeprom, + ERR_MRK"eepromPerformOp(): " + "Invalid EEPROM Operation!"); - } - else if( i_opType == DeviceFW::WRITE ) - { - err = eepromWrite( i2cMasterTarget, - io_buffer, - io_buflen, - i2cInfo ); + /*@ + * @errortype + * @reasoncode EEPROM_INVALID_OPERATION + * @severity ERRL_SEV_UNRECOVERABLE + * @moduleid EEPROM_PERFORM_OP + * @userdata1 Operation Type + * @userdata2 Chip to Access + * @devdesc Invalid operation type. + */ + err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, + EEPROM_PERFORM_OP, + EEPROM_INVALID_OPERATION, + i_opType, + i2cInfo.chip, + true /*Add HB SW Callout*/ ); + + err->collectTrace( EEPROM_COMP_NAME ); + } if ( err ) { break; } - } - else - { - TRACFCOMP( g_trac_eeprom, - ERR_MRK"eepromPerformOp(): Invalid EEPROM Operation!"); - - /*@ - * @errortype - * @reasoncode EEPROM_INVALID_OPERATION - * @severity ERRL_SEV_UNRECOVERABLE - * @moduleid EEPROM_PERFORM_OP - * @userdata1 Operation Type - * @userdata2 Chip to Access - * @devdesc Invalid operation type. - */ - err = new ERRORLOG::ErrlEntry( ERRORLOG::ERRL_SEV_UNRECOVERABLE, - EEPROM_PERFORM_OP, - EEPROM_INVALID_OPERATION, - i_opType, - i2cInfo.chip, - true /*Add HB SW Callout*/ ); + // Adjust the buffer pointer and remaining op length + l_pBuffer = (void *)(reinterpret_cast<uint64_t>(l_pBuffer) + + l_currentOpLen); + l_remainingOpLen -= l_currentOpLen; - err->collectTrace( EEPROM_COMP_NAME ); + if( l_remainingOpLen > l_snglChipSize ) + { + // Keep next op length within a chip + l_currentOpLen = l_snglChipSize; + } + else if( l_remainingOpLen > 0 ) + { + // Set next op length to what is left to do + l_currentOpLen = l_remainingOpLen; + } + else + { + // Break if there is nothing left to do + break; + } - break; - } + // Prepare the address at the start of next EEPROM + i2cInfo.offset = 0; + i2cInfo.devAddr += EEPROM_DEVADDR_INC; + } // Do the read or write } while( 0 ); #ifdef __HOSTBOOT_RUNTIME @@ -527,7 +575,7 @@ errlHndl_t eepromRead ( TARGETING::Target * i_target, l_pageTwoBuflen, i_i2cInfo ); - // Set addressing parameters + // Set addressing parameters err = eepromPrepareAddress( i_target, &byteAddr, byteAddrSize, @@ -632,11 +680,9 @@ errlHndl_t eepromRead ( TARGETING::Target * i_target, } - - TRACUCOMP( g_trac_eepromr, "EEPROM READ END : Chip: %02d : Offset %.2X : Len %d : %016llx", - i_i2cInfo.chip, l_originalOffset, i_buflen, + i_i2cInfo.chip, i_i2cInfo.offset, i_buflen, *((uint64_t*)o_buffer) ); } while( 0 ); @@ -1046,12 +1092,13 @@ errlHndl_t eepromWrite ( TARGETING::Target * i_target, } - + if(0 == total_bytes_written) { // @TODO RTC:138226 TRACUCOMP(g_trac_eeprom,"eepromWrite() Loop: %d/%d/0x%X " - "loop=%d, writeBuflen=%d, offset=0x%X, bAS=%d, diffs=%d/%d", + "writeBuflen=%d, offset=0x%X, bAS=%d, diffs=%d/%d", i_i2cInfo.port, i_i2cInfo.engine, i_i2cInfo.devAddr, - i, l_writeBuflen, i_i2cInfo.offset, byteAddrSize, + l_writeBuflen, i_i2cInfo.offset, byteAddrSize, data_left, diff_wps); + } // @TODO RTC:138226 // Perform the requested write operation @@ -1068,7 +1115,7 @@ errlHndl_t eepromWrite ( TARGETING::Target * i_target, // there was an error, so no update to total_bytes_written // for this loop TRACFCOMP(g_trac_eeprom, - "Failed writing data: original eeprom write"); + "Failed writing data: original eeprom write"); break; } @@ -1082,11 +1129,12 @@ errlHndl_t eepromWrite ( TARGETING::Target * i_target, // Update offset i_i2cInfo.offset += l_writeBuflen; - TRACUCOMP(g_trac_eeprom,"eepromWrite() Loop %d End: " + if(total_bytes_written >= io_buflen) { // @TODO RTC:138226 + TRACUCOMP(g_trac_eeprom,"eepromWrite() Loop End: " "writeBuflen=%d, offset=0x%X, t_b_w=%d, io_buflen=%d", - i, l_writeBuflen, i_i2cInfo.offset, + l_writeBuflen, i_i2cInfo.offset, total_bytes_written, io_buflen); - + } // @TODO RTC:138226 } // end of write for-loop // Release mutex lock @@ -1545,6 +1593,7 @@ errlHndl_t eepromReadAttributes ( TARGETING::Target * i_target, o_i2cInfo.i2cMasterPath = eepromData.i2cMasterPath; o_i2cInfo.writePageSize = eepromData.writePageSize; o_i2cInfo.devSize_KB = eepromData.maxMemorySizeKB; + o_i2cInfo.chipCount = eepromData.chipCount; o_i2cInfo.writeCycleTime = eepromData.writeCycleTime; // Convert attribute info to eeprom_addr_size_t enum @@ -1597,12 +1646,12 @@ errlHndl_t eepromReadAttributes ( TARGETING::Target * i_target, } while( 0 ); TRACUCOMP(g_trac_eeprom,"eepromReadAttributes() tgt=0x%X, %d/%d/0x%X " - "wpw=0x%X, dsKb=0x%X, aS=%d (%d), wct=%d", + "wpw=0x%X, dsKb=0x%X, chpCnt=%d, aS=%d (%d), wct=%d", TARGETING::get_huid(i_target), o_i2cInfo.port, o_i2cInfo.engine, o_i2cInfo.devAddr, o_i2cInfo.writePageSize, o_i2cInfo.devSize_KB, - o_i2cInfo.addrSize, eepromData.byteAddrOffset, - o_i2cInfo.writeCycleTime); + o_i2cInfo.chipCount, o_i2cInfo.addrSize, + eepromData.byteAddrOffset, o_i2cInfo.writeCycleTime); TRACDCOMP( g_trac_eeprom, @@ -1882,6 +1931,7 @@ void add_to_list( std::list<EepromInfo_t>& i_list, eep_info.devAddr = eepromData.devAddr; eep_info.device = eep_type; eep_info.assocTarg = i_targ; + eep_info.chipCount = eepromData.chipCount; eep_info.sizeKB = eepromData.maxMemorySizeKB; eep_info.addrBytes = eepromData.byteAddrOffset; //one more lookup for the speed diff --git a/src/usr/i2c/eepromdd.H b/src/usr/i2c/eepromdd.H index 19eb0a7e3..b184f2b38 100755 --- a/src/usr/i2c/eepromdd.H +++ b/src/usr/i2c/eepromdd.H @@ -68,6 +68,7 @@ typedef struct TARGETING::EntityPath i2cMasterPath; uint64_t writePageSize; // in bytes uint64_t devSize_KB; // in kilobytes + uint64_t chipCount; // number of chips making up eeprom device uint64_t writeCycleTime; // in milliseconds } eeprom_addr_t; @@ -76,7 +77,8 @@ typedef struct */ enum { - EEPROM_PAGE_SIZE = 0x100 + EEPROM_PAGE_SIZE = 0x100, + EEPROM_DEVADDR_INC = 2 }; /** diff --git a/src/usr/i2c/errlud_i2c.C b/src/usr/i2c/errlud_i2c.C index 37787c789..0cdf97808 100644 --- a/src/usr/i2c/errlud_i2c.C +++ b/src/usr/i2c/errlud_i2c.C @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2013,2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -177,7 +179,7 @@ UdEepromParms::UdEepromParms( uint8_t i_opType, { // Set up Ud instance variables iv_CompId = EEPROM_COMP_ID; - iv_Version = 1; + iv_Version = 2; iv_SubSection = EEPROM_UDT_PARAMETERS; //***** Memory Layout ***** @@ -193,6 +195,7 @@ UdEepromParms::UdEepromParms( uint8_t i_opType, // 1 byte : Address Size // 8 bytes : Write Page Size // 8 bytes : Device Size (in KB) + // 8 bytes : Chip Count // 8 bytes : Write Cycle Time char * l_pBuf = reinterpret_cast<char *>( @@ -200,7 +203,7 @@ UdEepromParms::UdEepromParms( uint8_t i_opType, +sizeof(uint32_t) +sizeof(uint64_t)*6 +sizeof(uint8_t) - +sizeof(uint64_t)*3 )); + +sizeof(uint64_t)*4 )); uint64_t tmp64 = 0; uint32_t tmp32 = 0; @@ -265,6 +268,10 @@ UdEepromParms::UdEepromParms( uint8_t i_opType, memcpy(l_pBuf, &tmp64, sizeof(tmp64)); l_pBuf += sizeof(tmp64); + tmp64 = i_i2cInfo.chipCount; + memcpy(l_pBuf, &tmp64, sizeof(tmp64)); + l_pBuf += sizeof(tmp64); + tmp64 = i_i2cInfo.writeCycleTime; memcpy(l_pBuf, &tmp64, sizeof(tmp64)); l_pBuf += sizeof(tmp64); diff --git a/src/usr/i2c/plugins/errludP_i2c.H b/src/usr/i2c/plugins/errludP_i2c.H index e04edf252..efbd2fa6d 100644 --- a/src/usr/i2c/plugins/errludP_i2c.H +++ b/src/usr/i2c/plugins/errludP_i2c.H @@ -5,7 +5,9 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* COPYRIGHT International Business Machines Corp. 2014 */ +/* Contributors Listed Below - COPYRIGHT 2014,2016 */ +/* [+] International Business Machines Corp. */ +/* */ /* */ /* Licensed under the Apache License, Version 2.0 (the "License"); */ /* you may not use this file except in compliance with the License. */ @@ -203,6 +205,7 @@ public: // 1 byte : Address Size // 8 bytes : Write Page Size // 8 bytes : Device Size (in KB) + // 8 bytes : Chip Count // 8 bytes : Write Cycle Time uint8_t op = TO_UINT8(l_databuf); @@ -244,6 +247,12 @@ public: i_parser.PrintNumber("Device Size (in KB)","%.16lX", TO_UINT64(l_databuf)); l_databuf += sizeof(uint64_t); + if(i_version >= 2) + { + i_parser.PrintNumber("Chip Count","%.16lX", + TO_UINT64(l_databuf)); + l_databuf += sizeof(uint64_t); + } i_parser.PrintNumber("Write Cycle Time","%.16lX",TO_UINT64(l_databuf)); l_databuf += sizeof(uint64_t); diff --git a/src/usr/isteps/istep08/call_host_slave_sbe_config.C b/src/usr/isteps/istep08/call_host_slave_sbe_config.C index cf0300ba5..b7241a162 100644 --- a/src/usr/isteps/istep08/call_host_slave_sbe_config.C +++ b/src/usr/isteps/istep08/call_host_slave_sbe_config.C @@ -161,8 +161,6 @@ void* call_host_slave_sbe_config(void *io_pArgs) } // end of cycling through all processor chips // Resolve the side characteristics of the Processor SBE Seeproms -#if 0 - //@TODO-RTC:138226 errlHndl_t err = SBE::resolveProcessorSbeSeeproms(); if ( err ) { @@ -172,7 +170,7 @@ void* call_host_slave_sbe_config(void *io_pArgs) // Commit Error errlCommit( err, ISTEP_COMP_ID ); } -#endif + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_host_slave_sbe_config exit" ); diff --git a/src/usr/isteps/istep08/call_proc_check_slave_sbe_seeprom_complete.C b/src/usr/isteps/istep08/call_proc_check_slave_sbe_seeprom_complete.C index 3f2d99956..614386367 100644 --- a/src/usr/isteps/istep08/call_proc_check_slave_sbe_seeprom_complete.C +++ b/src/usr/isteps/istep08/call_proc_check_slave_sbe_seeprom_complete.C @@ -108,21 +108,10 @@ void* call_proc_check_slave_sbe_seeprom_complete( void *io_pArgs ) continue; } - // TODO-RTC:138226 - /* TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "Processor target HUID %.8X", TARGETING::get_huid(l_cpu_target)); - l_errl = SBE::findSBEInPnor(l_cpu_target,sbeImgPtr,sbeImgSize); - if (l_errl) - { - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : proc_check_slave_sbe_seeprom_complete " - "Can't find SBE image in pnor"); - } */ - - const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapi2ProcTarget( const_cast<TARGETING::Target*> (l_cpu_target)); @@ -208,35 +197,6 @@ void* call_proc_check_slave_sbe_seeprom_complete( void *io_pArgs ) errlCommit(l_errl,ISTEP_COMP_ID); } -/* TODO-RTC:138226 - // check for re ipl request - if(static_cast<uint32_t>(rc_fapi) == - fapi::RC_PROC_EXTRACT_SBE_RC_ENGINE_RETRY) - { - l_errl = fapi::fapiRcToErrl(rc_fapi); - - // capture the target data in the elog - ErrlUserDetailsTarget(l_cpu_target).addToLog( l_errl ); - - l_errl->setSev(ERRL_SEV_INFORMATIONAL); - - errlCommit( l_errl, HWPF_COMP_ID ); - - TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : proc_extract_sbe_rc requesting reIPL:" - " Calling INITSERVICE::doShutdown() with " - "SBE_EXTRACT_RC_REQUEST_REIPL = 0x%x", - INITSERVICE::SBE_EXTRACT_RC_REQUEST_REIPL); - - INITSERVICE::doShutdown - ( INITSERVICE::SBE_EXTRACT_RC_REQUEST_REIPL); - // doShutdown does not return - } - else - { - l_errl = fapi::fapiRcToErrl(rc_fapi); - } -*/ if (l_errl) { TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, diff --git a/src/usr/isteps/istep09/call_fabric_erepair.C b/src/usr/isteps/istep09/call_fabric_erepair.C index d6b6c61cd..3d8a031a0 100644 --- a/src/usr/isteps/istep09/call_fabric_erepair.C +++ b/src/usr/isteps/istep09/call_fabric_erepair.C @@ -111,33 +111,6 @@ void* call_fabric_erepair( void *io_pArgs ) do { - // Check if the system can support multiple nest frequencies - // and if so, see if an SBE Update is required - TARGETING::Target* l_sys = NULL; - targetService().getTopLevelTarget(l_sys); - assert( l_sys != NULL, "call_fabric_erepair: sys target is NULL" ); - MRW_NEST_CAPABLE_FREQUENCIES_SYS l_mrw_nest_capable; - l_mrw_nest_capable = - l_sys->getAttr<ATTR_MRW_NEST_CAPABLE_FREQUENCIES_SYS>(); - if ( l_mrw_nest_capable == - MRW_NEST_CAPABLE_FREQUENCIES_SYS_2000_MHZ_OR_2400_MHZ ) - { - // Call to check Processor SBE SEEPROM Images against NEST_FREQ_MHZ - // attributes and make any necessary updates - // TODO-RTC:138226 - add it after SBE is ported to fapi2 - //l_errl = SBE::updateProcessorSbeSeeproms( - // SBE::SBE_UPDATE_ONLY_CHECK_NEST_FREQ); - - if (l_errl) - { - // Create IStep error log and cross reference error that occurred - l_StepError.addErrorDetails( l_errl ); - // Commit error - errlCommit( l_errl, HWPF_COMP_ID ); - break; - } - } - std::vector<uint8_t> l_endp1_txFaillanes; std::vector<uint8_t> l_endp1_rxFaillanes; std::vector<uint8_t> l_endp2_txFaillanes; diff --git a/src/usr/isteps/istep10/call_host_slave_sbe_update.C b/src/usr/isteps/istep10/call_host_slave_sbe_update.C index 2e65f2446..147749da1 100644 --- a/src/usr/isteps/istep10/call_host_slave_sbe_update.C +++ b/src/usr/isteps/istep10/call_host_slave_sbe_update.C @@ -69,8 +69,7 @@ void* call_host_slave_sbe_update (void *io_pArgs) // Call to check state of Processor SBE SEEPROMs and // make any necessary updates - // @TODO RTC:138226 add it after SBE is ported to fapi2 - //l_errl = SBE::updateProcessorSbeSeeproms(); + l_errl = SBE::updateProcessorSbeSeeproms(); if (l_errl) { diff --git a/src/usr/isteps/istep10/call_proc_build_smp.C b/src/usr/isteps/istep10/call_proc_build_smp.C index 01a96e573..6fdb2f74f 100644 --- a/src/usr/isteps/istep10/call_proc_build_smp.C +++ b/src/usr/isteps/istep10/call_proc_build_smp.C @@ -27,6 +27,8 @@ #include <errl/errlmanager.H> #include <isteps/hwpisteperror.H> #include <initservice/isteps_trace.H> +#include <fsi/fsiif.H> + // targeting support #include <targeting/common/commontargeting.H> @@ -156,21 +158,76 @@ void* call_proc_build_smp (void *io_pArgs) const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapi2_master_proc (l_masterProc); + do + { - FAPI_INVOKE_HWP( l_errl, p9_build_smp, - l_procList, - l_fapi2_master_proc, - SMP_ACTIVATE_PHASE1 ); + FAPI_INVOKE_HWP( l_errl, p9_build_smp, + l_procList, + l_fapi2_master_proc, + SMP_ACTIVATE_PHASE1 ); - if(l_errl) - { - TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, - "ERROR : call p9_build_smp, PLID=0x%x", l_errl->plid() ); - // Create IStep error log and cross reference error that occurred - l_StepError.addErrorDetails(l_errl); - // Commit error - errlCommit( l_errl, HWPF_COMP_ID ); - } + if(l_errl) + { + TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR : call p9_build_smp, PLID=0x%x", l_errl->plid() ); + // Create IStep error log and cross reference error that occurred + l_StepError.addErrorDetails(l_errl); + // Commit error + errlCommit( l_errl, HWPF_COMP_ID ); + + break; + } + + // At the point where we can now change the proc chips to use + // XSCOM rather than SBESCOM which is the default. + + TARGETING::TargetHandleList procChips; + getAllChips(procChips, TYPE_PROC); + + TARGETING::TargetHandleList::iterator curproc = procChips.begin(); + + // Loop through all proc chips + while(curproc != procChips.end()) + { + TARGETING::Target* l_proc_target = *curproc; + + // If the proc chip supports xscom.. + if (l_proc_target->getAttr<ATTR_PRIMARY_CAPABILITIES>() + .supportsXscom) + { + ScomSwitches l_switches = + l_proc_target->getAttr<ATTR_SCOM_SWITCHES>(); + + // If Xscom is not already enabled. + if ((l_switches.useXscom != 1) || (l_switches.useSbeScom != 0)) + { + l_switches.useSbeScom = 0; + l_switches.useXscom = 1; + + // Turn off SBE scom and turn on Xscom. + l_proc_target->setAttr<ATTR_SCOM_SWITCHES>(l_switches); + + // Reset the FSI2OPB logic on the new chips + l_errl = FSI::resetPib2Opb(l_proc_target); + if(l_errl) + { + TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, + "ERROR : resetPib2Opb on %.8X", + TARGETING::get_huid(l_proc_target)); + // Create IStep error log and + // cross reference error that occurred + l_StepError.addErrorDetails(l_errl); + // Commit error + errlCommit( l_errl, HWPF_COMP_ID ); + break; + } + } + } + + ++curproc; + } + + } while (0); TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_proc_build_smp exit" ); diff --git a/src/usr/sbe/makefile b/src/usr/sbe/makefile index c07fd9507..3a2c7e8f5 100644 --- a/src/usr/sbe/makefile +++ b/src/usr/sbe/makefile @@ -33,14 +33,29 @@ EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/accessors/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/utils/stopreg/ -EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc -EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/customize +HWP_CUSTOMIZE_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/customize +EXTRAINCDIR += ${HWP_CUSTOMIZE_PATH}/ +HWP_ACCESSORS_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/accessors +EXTRAINCDIR += ${HWP_ACCESSORS_PATH}/ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip +UTILS_PATH += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs +EXTRAINCDIR += ${UTILS_PATH}/ OBJS += sbe_update.o OBJS += sbe_resolve_sides.o SUBDIRS += test.d +## NOTE: add a new directory onto the vpaths when you add a new HWP +VPATH += ${HWP_CUSTOMIZE_PATH} ${HWP_ACCESSORS_PATH} ${UTILS_PATH} + +include ${ROOTPATH}/procedure.rules.mk + +#include ${HWP_CUSTOMIZE_PATH}/p9_xip_customize.mk @TODO RTC:158044 +#include ${HWP_ACCESSORS_PATH}/p9_get_mvpd_ring.mk @TODO RTC:158044 +#include ${HWP_ACCESSORS_PATH}/p9_mvpd_ring_funcs.mk @TODO RTC:158044 +#include ${UTILS_PATH}/p9_scan_compression.mk @TODO RTC:158044 + include ${ROOTPATH}/config.mk diff --git a/src/usr/sbe/sbe_resolve_sides.C b/src/usr/sbe/sbe_resolve_sides.C index 02dd1b3f7..f659bce19 100644 --- a/src/usr/sbe/sbe_resolve_sides.C +++ b/src/usr/sbe/sbe_resolve_sides.C @@ -676,7 +676,7 @@ errlHndl_t readSbeImage(TARGETING::Target* i_target, /*****************************************/ /* Do Actual Read */ /*****************************************/ - image_size_ECC = (o_image_size*9)/8; + image_size_ECC = setECCSize(o_image_size); assert(image_size_ECC <= SBE_ECC_IMG_MAX_SIZE, "getSetSbeImage() SBE Image with ECC too large"); @@ -713,11 +713,11 @@ errlHndl_t readSbeImage(TARGETING::Target* i_target, memset( o_imgPtr, 0, MAX_SEEPROM_IMAGE_SIZE ); // Remove ECC - eccStatus = PNOR::ECC::removeECC(reinterpret_cast<uint8_t*> - (SBE_ECC_IMG_VADDR), - reinterpret_cast<uint8_t*> - (o_imgPtr), - o_image_size); + eccStatus = removeECC(reinterpret_cast<uint8_t*>(SBE_ECC_IMG_VADDR), + reinterpret_cast<uint8_t*>(o_imgPtr), + o_image_size, + SBE_IMAGE_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE); // Fail if uncorrectable ECC if ( eccStatus == PNOR::ECC::UNCORRECTABLE ) @@ -884,15 +884,16 @@ errlHndl_t writeSbeImage(TARGETING::Target* i_target, } // Inject ECC - PNOR::ECC::injectECC(reinterpret_cast<uint8_t*>(i_imgPtr), - i_image_size, - reinterpret_cast<uint8_t*> - (SBE_ECC_IMG_VADDR)); + injectECC(reinterpret_cast<uint8_t*>(i_imgPtr), + i_image_size, + SBE_IMAGE_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE, + reinterpret_cast<uint8_t*>(SBE_ECC_IMG_VADDR)); /*****************************************/ /* Do Actual Write of Image */ /*****************************************/ - image_size_ECC = (i_image_size*9)/8; + image_size_ECC = setECCSize(i_image_size); assert(image_size_ECC <= SBE_ECC_IMG_MAX_SIZE, "writeSbeImage() SBE Image with ECC too large"); @@ -934,8 +935,11 @@ errlHndl_t writeSbeImage(TARGETING::Target* i_target, // Inject ECC memset( sbeInfo_data_ECC, 0, sbeInfoSize_ECC); - PNOR::ECC::injectECC(reinterpret_cast<uint8_t*>(&io_version), - sbeInfoSize, sbeInfo_data_ECC); + injectECC(reinterpret_cast<uint8_t*>(&io_version), + sbeInfoSize, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE, + sbeInfo_data_ECC); TRACDBIN( g_trac_sbe, "writeSbeImage: Version with ECC", sbeInfo_data_ECC, sbeInfoSize_ECC); @@ -999,7 +1003,7 @@ errlHndl_t getSbeImageSize(TARGETING::Target* i_target, size_t hdr_size = ALIGN_8(sizeof(P9XipHeader)); - size_t hdr_size_ECC = (hdr_size * 9)/8; + size_t hdr_size_ECC = setECCSize(hdr_size); uint8_t* hdr_ptr = reinterpret_cast<uint8_t*>(i_imgPtr) + hdr_size_ECC; @@ -1037,10 +1041,11 @@ errlHndl_t getSbeImageSize(TARGETING::Target* i_target, hdr_size_ECC ); // Remove ECC - eccStatus = PNOR::ECC::removeECC( - reinterpret_cast<uint8_t*>(i_imgPtr), - hdr_ptr, - hdr_size); + eccStatus = removeECC(reinterpret_cast<uint8_t*>(i_imgPtr), + hdr_ptr, + hdr_size, + SBE_IMAGE_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE); // Fail if uncorrectable ECC if ( eccStatus == PNOR::ECC::UNCORRECTABLE ) diff --git a/src/usr/sbe/sbe_update.C b/src/usr/sbe/sbe_update.C index 868b776d5..5de3968a0 100644 --- a/src/usr/sbe/sbe_update.C +++ b/src/usr/sbe/sbe_update.C @@ -65,12 +65,12 @@ // Trace definitions // ---------------------------------------------- trace_desc_t* g_trac_sbe = NULL; -TRAC_INIT( & g_trac_sbe, SBE_COMP_NAME, KILOBYTE ); +TRAC_INIT( & g_trac_sbe, SBE_COMP_NAME, 4*KILOBYTE ); // ------------------------ // Macros for unit testing -//#define TRACUCOMP(args...) TRACFCOMP(args) -#define TRACUCOMP(args...) +#define TRACUCOMP(args...) TRACFCOMP(args) // @TODO RTC: 138226 +//#define TRACUCOMP(args...) // ---------------------------------------- // Global Variables for MBOX Ipl Query @@ -160,7 +160,9 @@ namespace SBE { TRACFCOMP(g_trac_sbe, ERR_MRK"updateProcessorSbeSeeproms::isGoldenSide " - "returned an error"); + "returned an error, RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); errlCommit( l_err, SBE_COMP_ID ); l_isGoldenSide = true; } @@ -239,7 +241,10 @@ namespace SBE TRACFCOMP( g_trac_sbe, ERR_MRK"updateProcessorSbeSeeproms() - " "queryMasterProcChipTargetHandle returned error. " "Commit here and continue. Check below against " - "masterProcChipTargetHandle=NULL is ok"); + "masterProcChipTargetHandle=NULL is ok, " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); errlCommit( err, SBE_COMP_ID ); err = NULL; } @@ -346,7 +351,7 @@ namespace SBE // flag, if necessary if (sbeState.update_actions & IPL_RESTART) { - l_restartNeeded = true; + l_restartNeeded = true; } } @@ -521,7 +526,7 @@ namespace SBE } else { - // Unsopported target type was passed in + // Unsupported target type was passed in TRACFCOMP( g_trac_sbe, ERR_MRK"findSBEInPnor: Unsupported " "target type was passed in: uid=0x%X, type=0x%X", TARGETING::get_huid(i_target), @@ -728,7 +733,6 @@ namespace SBE } - ///////////////////////////////////////////////////////////////////// errlHndl_t procCustomizeSbeImg(TARGETING::Target* i_target, void* i_sbePnorPtr, @@ -753,17 +757,25 @@ namespace SBE const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapiTarg(i_target); -#if 0 //temporary removal to allow ekb merge +#if 0 //temporary removal p9_xip_customize HWP fails + uint8_t l_ringSectionBuf[MAX_SEEPROM_IMAGE_SIZE]; + uint32_t l_bootCoreMask = 0xFFFFFFFF; + uint32_t l_ringSectionBufSize = MAX_SEEPROM_IMAGE_SIZE; FAPI_INVOKE_HWP( err, p9_xip_customize, l_fapiTarg, i_sbePnorPtr, //image in tmpImgSize, - 0, //IPL + (void*)l_ringSectionBuf, + l_ringSectionBufSize, + SYSPHASE_HB_SBE, + MODEBUILD_IPL, (void*)RING_BUF1_VADDR, - (uint32_t)FIXED_RING_BUF_SIZE, + (uint32_t)MAX_RING_BUF_SIZE, (void*)RING_BUF2_VADDR, - (uint32_t)FIXED_RING_BUF_SIZE ); + (uint32_t)MAX_RING_BUF_SIZE, + l_bootCoreMask ); + /* @TODO RTC:138226 */ #endif if ( err ) @@ -824,8 +836,8 @@ namespace SBE if(vpdSize != MVPD_SB_RECORD_SIZE) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSetMVPDVersion() - MVPD SB " - "keyword wrong length HUID=0x%.8X, length=0x.2X, " - "expected=0x.2x", + "keyword wrong length HUID=0x%.8X, length=0x%.2X, " + "expected=0x%.2x", TARGETING::get_huid(i_target), vpdSize, MVPD_SB_RECORD_SIZE); /*@ @@ -1016,9 +1028,11 @@ namespace SBE { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeBootSeeprom() -Error " "reading SBE VITAL REG (0x%.8X) from Target :" - "HUID=0x%.8X", + "HUID=0x%.8X, RC=0x%X, PLID=0x%lX", SBE_VITAL_REG_0x0005001C, - TARGETING::get_huid(l_target)); + TARGETING::get_huid(l_target), + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } if(scomData & SBE_BOOT_SELECT_MASK) @@ -1061,21 +1075,24 @@ namespace SBE /* Get SEEPROM A SBE Version Information */ /*******************************************/ err = getSeepromSideVersion(io_sbeState.target, - EEPROM::SBE_PRIMARY, - io_sbeState.seeprom_0_ver, - io_sbeState.seeprom_0_ver_ECC_fail); + EEPROM::SBE_PRIMARY, + io_sbeState.seeprom_0_ver, + io_sbeState.seeprom_0_ver_ECC_fail); if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - Error " - "getting SBE Information from SEEPROM A (0x%X)", - EEPROM::SBE_PRIMARY); + "getting SBE Information from SEEPROM A (0x%X), " + "RC=0x%X, PLID=0x%lX", + EEPROM::SBE_PRIMARY, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } - TRACDBIN(g_trac_sbe, "getSbeInfoState-spA", + TRACFBIN(g_trac_sbe, "getSbeInfoState-spA", &(io_sbeState.seeprom_0_ver), - sizeof(sbeSeepromVersionInfo_t)); + sizeof(sbeSeepromVersionInfo_t)); // @TODO RTC:138226 D->F /*******************************************/ @@ -1089,14 +1106,17 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - Error " - "getting SBE Information from SEEPROM B (0x%X)", - EEPROM::SBE_BACKUP); + "getting SBE Information from SEEPROM B (0x%X), " + "RC=0x%X, PLID=0x%lX", + EEPROM::SBE_BACKUP, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } - TRACDBIN(g_trac_sbe, "getSbeInfoState-spB", + TRACFBIN(g_trac_sbe, "getSbeInfoState-spB", &(io_sbeState.seeprom_1_ver), - sizeof(sbeSeepromVersionInfo_t)); + sizeof(sbeSeepromVersionInfo_t)); // @TODO RTC:138226 D->F // Check NEST_FREQ settings @@ -1105,7 +1125,10 @@ namespace SBE if (err) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - " - "Error returned from checkNestFreqSettings() "); + "Error returned from checkNestFreqSettings(), " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } else if ((i_check_type == SBE_UPDATE_ONLY_CHECK_NEST_FREQ) && @@ -1124,7 +1147,6 @@ namespace SBE skip_customization = true; } - /*******************************************/ /* Get PNOR SBE Version Information */ /*******************************************/ @@ -1140,9 +1162,18 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - " - "Error getting SBE Version from PNOR"); + "Error getting SBE Version from PNOR, " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } + else + { + TRACFCOMP( g_trac_sbe, "getSbeInfoState() - " + "sbePnorPtr=%p, sbePnorImageSize=0x%08X (%d)", + sbePnorPtr, sbePnorImageSize, sbePnorImageSize); + } // copy tmp_pnorVersion to the main structure memcpy ( &io_sbeState.pnorVersion, @@ -1168,7 +1199,10 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - " - "Error from procCustomizeSbeImg()"); + "Error from procCustomizeSbeImg(), " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } @@ -1183,8 +1217,6 @@ namespace SBE FIXED_SEEPROM_WORK_SPACE, sbeImgSize, io_sbeState.customizedImage_crc); - - /*******************************************/ /* Get MVPD SBE Version Information */ /*******************************************/ @@ -1195,7 +1227,10 @@ namespace SBE { //If MVPD is bad, commit the error and move to the next proc TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - " - "Error reading version from MVPD"); + "Error reading version from MVPD, " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } @@ -1220,9 +1255,14 @@ namespace SBE err = getSbeBootSeeprom(io_sbeState.target, tmp_cur_side); if(err) { - TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - Error returned from getSbeBootSeeprom()"); + TRACFCOMP( g_trac_sbe, ERR_MRK"getSbeInfoState() - " + "Error returned from getSbeBootSeeprom(), " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } + io_sbeState.cur_seeprom_side = tmp_cur_side; if (io_sbeState.cur_seeprom_side == SBE_SEEPROM0) { @@ -1308,14 +1348,17 @@ namespace SBE if(err) { - TRACFCOMP( g_trac_sbe, ERR_MRK"getSeepromSideVersion() - Error " - "reading SBE Version from Seeprom 0x%X, HUID=0x%.8X", - i_seepromSide, TARGETING::get_huid(i_target)); + TRACFCOMP( g_trac_sbe, ERR_MRK"getSeepromSideVersion() - " + "Error reading SBE Version from Seeprom 0x%X, " + "HUID=0x%.8X, RC=0x%X, PLID=0x%lX", + i_seepromSide, TARGETING::get_huid(i_target), + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } TRACDBIN(g_trac_sbe, - "getSeepromSideVersion()- tmp_data_ECC", + "getSeepromSideVersion() - tmp_data_ECC", tmp_data_ECC, sbeInfoSize_ECC); @@ -1324,14 +1367,14 @@ namespace SBE memset( &o_info, 0, sizeof(o_info) ); - // Initially only look at the first 8-Bytes which should include // the struct version value // Remove ECC - eccStatus = PNOR::ECC::removeECC( - tmp_data_ECC, - reinterpret_cast<uint8_t*>(&o_info), - 8); + eccStatus = removeECC(tmp_data_ECC, + reinterpret_cast<uint8_t*>(&o_info), + 8, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE); TRACUCOMP( g_trac_sbe, "getSeepromSideVersion(): First 8-Bytes: " "eccStatus=%d, version=0x%X, data_crc=0x%X", @@ -1351,16 +1394,17 @@ namespace SBE TRACFCOMP( g_trac_sbe, "getSeepromSideVersion(): Unsupported " "Struct Version=0x%X, ignoring any eccStatus=%d", o_info.struct_version, eccStatus); + break; } - // Remove ECC for full SBE Version struct eccStatus = PNOR::ECC::CLEAN; - eccStatus = PNOR::ECC::removeECC( - tmp_data_ECC, - reinterpret_cast<uint8_t*>(&o_info), - sbeInfoSize); + eccStatus = removeECC(tmp_data_ECC, + reinterpret_cast<uint8_t*>(&o_info), + sbeInfoSize, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE); TRACFCOMP( g_trac_sbe, "getSeepromSideVersion(): eccStatus=%d, " "sizeof o_info/sI=%d, sI_ECC=%d, origin golden=%i", @@ -1456,7 +1500,11 @@ namespace SBE // Inject ECC to Data memset( sbeInfo_data_ECC, 0, sbeInfoSize_ECC); - PNOR::ECC::injectECC(sbeInfo_data, sbeInfoSize, sbeInfo_data_ECC); + injectECC(sbeInfo_data, + sbeInfoSize, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE, + sbeInfo_data_ECC); TRACDBIN( g_trac_sbe, "updateSeepromSide: Invalid Info", sbeInfo_data, sbeInfoSize); @@ -1472,9 +1520,12 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - Error " - "Writing SBE Version Info: HUID=0x%.8X, side=%d", + "Writing SBE Version Info: HUID=0x%.8X, side=%d, " + "RC=0x%X, PLID=0x%lX", TARGETING::get_huid(io_sbeState.target), - io_sbeState.seeprom_side_to_update); + io_sbeState.seeprom_side_to_update, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } @@ -1496,9 +1547,11 @@ namespace SBE { TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - Error " "Reading Back SBE Version Info: HUID=0x%.8X, " - "side=%d", + "side=%d, RC=0x%X, PLID=0x%lX", TARGETING::get_huid(io_sbeState.target), - io_sbeState.seeprom_side_to_update); + io_sbeState.seeprom_side_to_update, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } @@ -1508,9 +1561,11 @@ namespace SBE sbeInfoSize_ECC); // Remove ECC - eccStatus = PNOR::ECC::removeECC( sbeInfo_data_ECC_readBack, - sbeInfo_data_readBack, - sbeInfoSize); + eccStatus = removeECC( sbeInfo_data_ECC_readBack, + sbeInfo_data_readBack, + sbeInfoSize, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE); TRACUCOMP( g_trac_sbe, "updateSeepromSide(): eccStatus=%d, " "sizeof sI=%d, sI_ECC=%d, rc_ECC=%d", @@ -1584,47 +1639,20 @@ namespace SBE // The Customized Image For This Target Still Resides In // The SBE Update VMM Space: SBE_IMG_VADDR = VMM_VADDR_SBE_UPDATE -#ifdef CONFIG_SBE_UPDATE_INDEPENDENT - // Ensure HBB address value in the customized image is correct - // for this side - bool imageWasUpdated=false; - - err = resolveImageHBBaddr ( io_sbeState.target, - reinterpret_cast<void*>(SBE_IMG_VADDR), - ((io_sbeState.seeprom_side_to_update == - EEPROM::SBE_PRIMARY ) ? - SBE_SEEPROM0 : - SBE_SEEPROM1 ), -#ifdef CONFIG_PNOR_TWO_SIDE_SUPPORT - ((io_sbeState.seeprom_side_to_update == - EEPROM::SBE_PRIMARY ) ? - PNOR::WORKING : - PNOR::ALTERNATE ), -#else - PNOR::WORKING, -#endif - imageWasUpdated ); - - if (imageWasUpdated == true ) - { - TRACUCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - " - "HBB Address's MMIO Offset Updated in Image"); - } - -#endif - // Inject ECC // clear out back half of page block to use as temp space // for ECC injected SBE Image. rc = mm_remove_pages(RELEASE, - reinterpret_cast<void*> - (SBE_ECC_IMG_VADDR), + reinterpret_cast<void*>(SBE_ECC_IMG_VADDR), SBE_ECC_IMG_MAX_SIZE); if( rc ) { TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - Error " - "from mm_remove_pages : rc=%d, HUID=0x%.8X.", - rc, TARGETING::get_huid(io_sbeState.target) ); + "from mm_remove_pages : rc=%d, HUID=0x%.8X, " + "ECC_VADDR=0x%.16X, eccSize=0x%.8X.", + rc, TARGETING::get_huid(io_sbeState.target), + SBE_ECC_IMG_VADDR, + SBE_ECC_IMG_MAX_SIZE ); /*@ * @errortype * @moduleid SBE_UPDATE_SEEPROMS @@ -1654,24 +1682,35 @@ namespace SBE //align size, calculate ECC size size_t sbeImgSize = ALIGN_8(io_sbeState.customizedImage_size); - size_t sbeEccImgSize = static_cast<size_t>(sbeImgSize*9/8); + size_t sbeEccImgSize = setECCSize(sbeImgSize); + // Check if assert below will fail and values should be traced + if(sbeEccImgSize > SBE_ECC_IMG_MAX_SIZE) + { + TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide(): assert " + "values eccSize=0x%.8X <= ECC_MAX_SIZE=0x%.8X", + sbeEccImgSize, + SBE_ECC_IMG_MAX_SIZE ); + } assert(sbeEccImgSize <= SBE_ECC_IMG_MAX_SIZE, "updateSeepromSide() SBE Image with ECC too large"); TRACUCOMP( g_trac_sbe, INFO_MRK"updateSeepromSide(): " "SBE_VADDR=0x%.16X, ECC_VADDR=0x%.16X, size=0x%.8X, " - "eccSize=0x%.8X", + "eccSize=0x%.8X, UPDATE_END=0x%.16X, UPDATE_SIZE=0x%.8X", SBE_IMG_VADDR, SBE_ECC_IMG_VADDR, sbeImgSize, - sbeEccImgSize ); + sbeEccImgSize, + VMM_VADDR_SBE_UPDATE_END, + VMM_SBE_UPDATE_SIZE ); - PNOR::ECC::injectECC(reinterpret_cast<uint8_t*>(SBE_IMG_VADDR), - sbeImgSize, - reinterpret_cast<uint8_t*> - (SBE_ECC_IMG_VADDR)); + injectECC(reinterpret_cast<uint8_t*>(SBE_IMG_VADDR), + sbeImgSize, + SBE_IMAGE_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE, + reinterpret_cast<uint8_t*>(SBE_ECC_IMG_VADDR)); TRACDBIN(g_trac_sbe,"updateSeepromSide()-start of IMG - no ECC", reinterpret_cast<void*>(SBE_IMG_VADDR), 0x80); @@ -1687,8 +1726,7 @@ namespace SBE //Write image to indicated side err = deviceWrite(io_sbeState.target, - reinterpret_cast<void*> - (SBE_ECC_IMG_VADDR), + reinterpret_cast<void*>(SBE_ECC_IMG_VADDR), sbeEccImgSize, DEVICE_EEPROM_ADDRESS( io_sbeState.seeprom_side_to_update, @@ -1699,15 +1737,16 @@ namespace SBE TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - Error " "writing new SBE image to size=%d. HUID=0x%.8X." "SBE_VADDR=0x%.16X, ECC_VADDR=0x%.16X, size=0x%.8X, " - "eccSize=0x%.8X, EEPROM offset=0x%X", + "eccSize=0x%.8X, EEPROM offset=0x%X, " + "RC=0x%X, PLID=0x%lX", io_sbeState.seeprom_side_to_update, TARGETING::get_huid(io_sbeState.target), SBE_IMG_VADDR, SBE_ECC_IMG_VADDR, sbeImgSize, - sbeEccImgSize, SBE_IMAGE_SEEPROM_ADDRESS); + sbeEccImgSize, SBE_IMAGE_SEEPROM_ADDRESS, + ERRL_GETRC_SAFE(err), ERRL_GETPLID_SAFE(err)); break; } - /*******************************************/ /* Update SBE Version Information */ /*******************************************/ @@ -1717,7 +1756,11 @@ namespace SBE // Inject ECC to Data memset( sbeInfo_data_ECC, 0, sbeInfoSize_ECC); - PNOR::ECC::injectECC(sbeInfo_data, sbeInfoSize, sbeInfo_data_ECC); + injectECC(sbeInfo_data, + sbeInfoSize, + SBE_VERSION_SEEPROM_ADDRESS, + SBE_SEEPROM_SIZE, + sbeInfo_data_ECC); TRACDBIN( g_trac_sbe, "updateSeepromSide: Info", sbeInfo_data, sbeInfoSize); @@ -1733,9 +1776,12 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"updateSeepromSide() - Error " - "Writing SBE Version Info: HUID=0x%.8X, side=%d", + "Writing SBE Version Info: HUID=0x%.8X, side=%d, " + "RC=0x%X, PLID=0x%lX", TARGETING::get_huid(io_sbeState.target), - io_sbeState.seeprom_side_to_update); + io_sbeState.seeprom_side_to_update, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); break; } @@ -3093,8 +3139,11 @@ namespace SBE o_reIplRequest = false; TRACFCOMP(g_trac_sbe, ERR_MRK"isIplFromReIplRequest(): " "Error sending MBOX msg. Commit error, and assume " - "IPL wasn't requested from us: o_reIplRequest=%d", - o_reIplRequest); + "IPL wasn't requested from us: o_reIplRequest=%d, " + "RC=0x%X, PLID=0x%lX", + o_reIplRequest, + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); errlCommit(err, SBE_COMP_ID); break; @@ -3807,7 +3856,7 @@ namespace SBE ///////////////////////////////////////////////////////////////////// errlHndl_t checkNestFreqSettings(sbeTargetState_t& io_sbeState) { - TRACDCOMP( g_trac_sbe, + TRACFCOMP( g_trac_sbe, ENTER_MRK"checkNestFreqSettings(): HUID:0x%08X", TARGETING::get_huid(io_sbeState.target)); @@ -3823,8 +3872,9 @@ namespace SBE // Get MRW DEFAULT_PROC_MODULE_NEST_FREQ_MHZ attribute // @TODO RTC:138226 "We need to investigate if we can avoid needing // this hack in P9" - default_nest_freq = io_sbeState.target->getAttr< - TARGETING::ATTR_DEFAULT_PROC_MODULE_NEST_FREQ_MHZ>(); + default_nest_freq = 2400 /* io_sbeState.target->getAttr< + TARGETING::ATTR_DEFAULT_PROC_MODULE_NEST_FREQ_MHZ>() + @TODO RTC:157890 */ ; TRACUCOMP( g_trac_sbe,"checkNestFreqSettings(): ATTR_NEST_FREQ_MHZ" "=%d, ATTR_DEFAULT_PROC_MODULE_NEST_FREQ_MHZ=%d", @@ -3861,7 +3911,10 @@ namespace SBE if(err) { TRACFCOMP( g_trac_sbe, ERR_MRK"checkNestFreqSettings() - " - "Error returned from getSbeBootSeeprom()"); + "Error returned from getSbeBootSeeprom(), " + "RC=0x%X, PLID=0x%lX", + ERRL_GETRC_SAFE(err), + ERRL_GETPLID_SAFE(err)); // Assume it was default frequency for this module io_sbeState.mproc_nest_freq_mhz = default_nest_freq; @@ -3916,7 +3969,7 @@ namespace SBE }while(0); - TRACDCOMP( g_trac_sbe, + TRACFCOMP( g_trac_sbe, EXIT_MRK"checkNestFreqSettings"); return err; @@ -3924,5 +3977,152 @@ namespace SBE } +///////////////////////////////////////////////////////////////////// + size_t setECCSize(size_t i_srcSz, + const uint64_t i_offset, + const uint64_t i_boundary) + { + // Assert that source size is a multiple of 8 + assert((i_srcSz % 8) == 0); + + // Calculate size with ECC. but without padding + size_t l_eccSz = (i_srcSz * 9) / 8; + + // Determine padding at each boundary + size_t l_padSz = i_boundary % 9; + + // Calculate number of boundary crossings + // Only use portion of offset beyond last boundary it crosses + // Exactly reaching a boundary is not counted as a crossing + uint64_t l_boundaryCrossings = + (l_eccSz + (i_offset % i_boundary) - 1) / (i_boundary - l_padSz); + + // Calculate total padding + size_t l_totalPadding = l_boundaryCrossings * l_padSz; + + return (l_eccSz + l_totalPadding); + } + + +///////////////////////////////////////////////////////////////////// + void injectECC(const uint8_t* i_src, + size_t i_srcSz, + const uint64_t i_offset, + const uint64_t i_boundary, + uint8_t* o_dst) + { + // Initialize local size variables for inject loop + size_t l_completeSz = 0; + size_t l_completeEccSz = 0; + size_t l_padSz = i_boundary % 9; + size_t l_injectSz = + ((i_boundary - l_padSz - (i_offset % i_boundary)) * 8) / 9; + if(l_injectSz > i_srcSz) + { + l_injectSz = i_srcSz; + } + + // Loop through injection of ECC + while(l_completeSz < i_srcSz) + { + // Assert that injection size is a multiple of 8 + assert((l_injectSz % 8) == 0); + + // Inject ECC + PNOR::ECC::injectECC(i_src + l_completeSz, + l_injectSz, + o_dst + l_completeEccSz); + + // Adjust local size variables + l_completeSz += l_injectSz; + l_completeEccSz += ((l_injectSz * 9) / 8); + + // Determine next size for ECC injection + if((i_srcSz - l_completeSz) >= (((i_boundary - l_padSz) * 8) / 9)) + { + // Set up size to go to next device boundary + l_injectSz = ((i_boundary - l_padSz) * 8) / 9; + } + else + { + // Set up size to finish ECC injection + l_injectSz = i_srcSz - l_completeSz; + } + + // Determine if ECC injection is not finished + if(l_injectSz > 0) + { + // Pad to device boundary if some ECC injection is left + memset(o_dst + l_completeEccSz, + '\0', + l_padSz); + l_completeEccSz += l_padSz; + } + } // while (l_completeSz < i_srcSz) + } + + +///////////////////////////////////////////////////////////////////// + PNOR::ECC::eccStatus removeECC(uint8_t* io_src, + uint8_t* o_dst, + size_t i_dstSz, + const uint64_t i_offset, + const uint64_t i_boundary) + { + PNOR::ECC::eccStatus l_status = PNOR::ECC::CLEAN; + + // Initialize local size variables for remove loop + size_t l_completeSz = 0; + size_t l_completeEccSz = 0; + size_t l_padSz = i_boundary % 9; + size_t l_removeSz = + ((i_boundary - l_padSz - (i_offset % i_boundary)) * 8) / 9; + if(l_removeSz > i_dstSz) + { + l_removeSz = i_dstSz; + } + + // Loop through removal of ECC + while(l_completeSz < i_dstSz) + { + // Assert that removal size is a multiple of 8 + assert((l_removeSz % 8) == 0); + + // remove ECC + l_status = PNOR::ECC::removeECC(io_src + l_completeEccSz, + o_dst + l_completeSz, + l_removeSz); + if (l_status == PNOR::ECC::UNCORRECTABLE) + { + break; + } + + // Adjust local size variables + l_completeSz += l_removeSz; + l_completeEccSz += ((l_removeSz * 9) / 8); + + // Determine next size for ECC removal + if((i_dstSz - l_completeSz) >= (((i_boundary - l_padSz) * 8) / 9)) + { + // Set up size to go to next device boundary + l_removeSz = ((i_boundary - l_padSz) * 8) / 9; + } + else + { + // Set up size to finish ECC removal + l_removeSz = i_dstSz - l_completeSz; + } + + // Determine if ECC removal is not finished + if(l_removeSz > 0) + { + // Skip pad at device boundary if some ECC removal is left + l_completeEccSz += l_padSz; + } + } // while (l_completeSz < i_dstSz) + + return l_status; + } + } //end SBE Namespace diff --git a/src/usr/sbe/sbe_update.H b/src/usr/sbe/sbe_update.H index ae9b6e6e1..18fb8e10e 100644 --- a/src/usr/sbe/sbe_update.H +++ b/src/usr/sbe/sbe_update.H @@ -30,9 +30,11 @@ #include <builtins.h> #include <errl/errlentry.H> #include <pnor/pnorif.H> +#include <pnor/ecc.H> #include <vmmconst.h> #include <targeting/common/targetservice.H> #include <i2c/eepromif.H> +#include <p9_infrastruct_help.H> namespace SBE { @@ -73,8 +75,15 @@ namespace SBE const uint64_t SBE_SEEPROM_STRUCT_INVALID = 0x494E56414C494400; // Used for locations of SBE_Version and SBE Image on a SEEPROM - const uint64_t SBE_IMAGE_SEEPROM_ADDRESS = 0x400; // 1KB - const uint64_t SBE_VERSION_SEEPROM_ADDRESS = 0x300; // 1KB - 256B + const uint64_t SBE_IMAGE_SEEPROM_ADDRESS = 0x00; // 0 + const uint64_t SBE_VERSION_SPACE_WITH_ECC = (256 * 9) / 8; // 256B + ECC + const uint64_t SBE_SEEPROM_SIZE = 64*KILOBYTE; // 64KB + const uint64_t SBE_SEEPROM_ECC_PAD = SBE_SEEPROM_SIZE % 9; + // SBE Version (with ECC) kept at end of fourth 64KB memory + // Adjust end of usable memory with ECC to be a multiple of 9 bytes + const uint64_t SBE_VERSION_SEEPROM_ADDRESS = 4*SBE_SEEPROM_SIZE + - SBE_SEEPROM_ECC_PAD + - SBE_VERSION_SPACE_WITH_ECC; //Used to read SBE Boot Side from processor const uint64_t SBE_VITAL_REG_0x0005001C = 0x005001C; @@ -87,7 +96,7 @@ namespace SBE const uint32_t SUPPORTED_TOC_VER = 0x00000001; // MVPD SB Keyword contants - const size_t MVPD_SB_RECORD_SIZE = 49; + const size_t MVPD_SB_RECORD_SIZE = 129; // PERMANENT FLAG - bit 0: 0x0 -> indicates 0 is permanent. const uint8_t PERMANENT_FLAG_MASK = 0x80; @@ -123,15 +132,13 @@ namespace SBE /******************************************/ enum { FIXED_SEEPROM_WORK_SPACE = 128 * 1024, - FIXED_RING_BUF_SIZE = 60000, - MAX_SEEPROM_IMAGE_SIZE = 56 * 1024, SBE_IMG_VADDR = VMM_VADDR_SBE_UPDATE, RING_BUF1_VADDR = FIXED_SEEPROM_WORK_SPACE + SBE_IMG_VADDR, RING_BUF2_VADDR = RING_BUF1_VADDR + FIXED_RING_BUF_SIZE, //NOTE: recycling the same memory space for different //steps in the process. - SBE_ECC_IMG_VADDR = RING_BUF1_VADDR, - SBE_ECC_IMG_MAX_SIZE = VMM_VADDR_SBE_UPDATE_END - SBE_ECC_IMG_VADDR, + SBE_ECC_IMG_VADDR = VMM_VADDR_SBE_UPDATE + (VMM_SBE_UPDATE_SIZE / 2), + SBE_ECC_IMG_MAX_SIZE = (MAX_SEEPROM_IMAGE_SIZE * 9 / 8), }; // Used for MVPD function @@ -233,6 +240,10 @@ namespace SBE uint32_t seeprom_1_data_crc; uint8_t seeprom_1_short_version[SBE_MVPD_SHORT_IMAGE_VERSION_SIZE]; + uint8_t mvpdSbPad[MVPD_SB_RECORD_SIZE - sizeof(flags) + - sizeof(seeprom_0_data_crc) + - sizeof(seeprom_1_data_crc) + - (SBE_MVPD_SHORT_IMAGE_VERSION_SIZE * 2)]; } PACKED; @@ -543,5 +554,72 @@ namespace SBE errlHndl_t checkNestFreqSettings(sbeTargetState_t& io_sbeState); + /** + * @brief Calculates ECC size for a block of code or data allowing for + * padding at device boundaries so 9-byte segment (8 bytes of code + * or data and 1 byte of ECC) does not straddle the boundary. + * + * @param[in] i_srcSz Size of source code or data + * + * @param[in] i_offset Offset into device for storing destination + * + * @param[in] i_boundary Device boundary + * + * @return Size of source code or data with ECC and padding + */ + size_t setECCSize(size_t i_srcSz, + const uint64_t i_offset = SBE_IMAGE_SEEPROM_ADDRESS, + const uint64_t i_boundary = SBE_SEEPROM_SIZE); + + + /** + * @brief Injects ECC into a block of code or data. Pads output at device + * boundaries so 9-byte segment (8 bytes of code or data and 1 byte + * of ECC) does not straddle the boundary. + * + * @param[in] i_src Location of source code or data without ECC + * + * @param[in] i_srcSz Size of source code or data + * + * @param[in] i_offset Offset into device for storing destination + * + * @param[in] i_boundary Device boundary + * + * @param[out] o_dst Location of destination code or data with ECC + * + * @return void + */ + void injectECC(const uint8_t* i_src, + size_t i_srcSz, + const uint64_t i_offset, + const uint64_t i_boundary, + uint8_t* o_dst); + + + /** + * @brief Removes ECC from a block of code or data. Removes padding at + * device boundaries where 9-byte segment (8 bytes of code or data + * and 1 byte of ECC) was moved to next device so as to not straddle + * the boundary. + * + * @param[in/out] io_src Location of source code or data with ECC + * + * @param[out] o_dst Location of destination code or data without ECC + * + * @param[in] i_dstSz Size of destination code or data + * + * @param[in] i_offset Offset into device where source was stored + * + * @param[in] i_boundary Device boundary + * + * @return eccStatus ECC status from removing ECC. + */ + PNOR::ECC::eccStatus removeECC(uint8_t* io_src, + uint8_t* o_dst, + size_t i_dstSz, + const uint64_t i_offset, + const uint64_t i_boundary); + + } //end namespace SBE #endif diff --git a/src/usr/sbe/test/makefile b/src/usr/sbe/test/makefile index ff3b28f5a..3ee51b1f4 100644 --- a/src/usr/sbe/test/makefile +++ b/src/usr/sbe/test/makefile @@ -5,7 +5,9 @@ # # OpenPOWER HostBoot Project # -# COPYRIGHT International Business Machines Corp. 2013,2014 +# Contributors Listed Below - COPYRIGHT 2013,2016 +# [+] International Business Machines Corp. +# # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -25,4 +27,12 @@ ROOTPATH = ../../../.. MODULE = testsbe TESTS = *.H +## support for fapi2 +EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/ +EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/ + +## pointer to common HWP files +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/ +EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/ + include ${ROOTPATH}/config.mk diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 85317d39f..9fb372f11 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -1512,6 +1512,18 @@ my @I2CHotPlug; foreach my $i (@{$i2cBus->{'i2c-device'}}) { + my $dev_addr = $i->{'address'}; + my $max_mem_size = "0x80"; + my $chip_count = "0x02"; + + if( ($i->{'content-type'} eq 'PRIMARY_SBE_VPD') || + ($i->{'content-type'} eq 'REDUNDANT_SBE_VPD') ) + { + $dev_addr = "A8"; + $max_mem_size = "0x100"; + $chip_count = "0x04"; + } + push @I2Cdevices, { 'i2cm_name'=>$i->{'i2c-master'}->{target}->{name}, 'i2cm_node'=>$i->{'i2c-master'}->{target}->{node}, @@ -1520,13 +1532,14 @@ foreach my $i (@{$i2cBus->{'i2c-device'}}) 'i2c_content_type'=>$i->{'content-type'}, 'i2c_part_id'=>$i->{'part-id'}, 'i2c_port'=>$i->{'i2c-master'}->{'i2c-port'}, - 'i2c_devAddr'=>$i->{'address'}, + 'i2c_devAddr'=>$dev_addr, 'i2c_engine'=>$i->{'i2c-master'}->{'i2c-engine'}, 'i2c_speed'=>$i->{'speed'}, 'i2c_size'=>$i->{'size'}, # @todo RTC 119382 - will eventually read these values from this file 'i2c_byte_addr_offset'=> "0x02", - 'i2c_max_mem_size' => "0x40", + 'i2c_max_mem_size' => $max_mem_size, + 'i2c_chip_count' => $chip_count, 'i2c_write_page_size' =>"0x80", 'i2c_write_cycle_time' => "0x05" }; @@ -6299,6 +6312,9 @@ sub addEepromsProc print " <field><id>maxMemorySizeKB</id><value>", "$I2Cdevices[$i]{i2c_max_mem_size}", "</value></field>\n"; + print " <field><id>chipCount</id><value>", + "$I2Cdevices[$i]{i2c_chip_count}", + "</value></field>\n"; print " <field><id>writePageSize</id><value>", "$I2Cdevices[$i]{i2c_write_page_size}", "</value></field>\n"; @@ -6477,6 +6493,9 @@ sub addEepromsCentaur print " <field><id>maxMemorySizeKB</id><value>", "$I2Cdevices[$i]{i2c_max_mem_size}", "</value></field>\n"; + print " <field><id>chipCount</id><value>", + "$I2Cdevices[$i]{i2c_chip_count}", + "</value></field>\n"; print " <field><id>writePageSize</id><value>", "$I2Cdevices[$i]{i2c_write_page_size}", "</value></field>\n"; @@ -6595,7 +6614,8 @@ sub addI2cBusSpeedArray $tmp_offset = ($tmp_engine * 3) + $tmp_port; # @todo RTC 153696 - Default everything off except TPM until MRW is correct and simics model is complete - if ($tmp_engine == 2 && $tmp_port == 0) { + # @todo RTC 138226 - Also except SBE SEEPROM until MRW is correct and simics model is complete + if (($tmp_engine == 2 || $tmp_engine == 0) && $tmp_port == 0) { $tmp_speed = 400; } else { $tmp_speed = 0; diff --git a/src/usr/targeting/common/processMrw.pl b/src/usr/targeting/common/processMrw.pl index 766497b18..75f1d4fe7 100644 --- a/src/usr/targeting/common/processMrw.pl +++ b/src/usr/targeting/common/processMrw.pl @@ -1245,6 +1245,7 @@ sub setEepromAttributes "PHYS_PATH"); my $mem = $targetObj->getAttribute($conn_target->{DEST_PARENT}, "MEMORY_SIZE_IN_KB"); + my $count = 4; # @TODO RTC: 138226 Need place to get a chip count my $cycle = $targetObj->getAttribute($conn_target->{DEST_PARENT}, "WRITE_CYCLE_TIME"); my $page = $targetObj->getAttribute($conn_target->{DEST_PARENT}, @@ -1258,6 +1259,7 @@ sub setEepromAttributes $targetObj->setAttributeField($target, $name, "engine", $engine); $targetObj->setAttributeField($target, $name, "byteAddrOffset", $offset); $targetObj->setAttributeField($target, $name, "maxMemorySizeKB", $mem); + $targetObj->setAttributeField($target, $name, "chipCount", $count); $targetObj->setAttributeField($target, $name, "writePageSize", $page); $targetObj->setAttributeField($target, $name, "writeCycleTime", $cycle); diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 7a23a05a1..2feb53005 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -1583,6 +1583,13 @@ <default>0x0</default> </field> <field> + <name>chipCount</name> + <description>The number of chips making up an eeprom device. + </description> + <type>uint8_t</type> + <default>0x01</default> + </field> + <field> <name>writePageSize</name> <description>The maximum number of bytes that can be written to a device at one time. 'Zero' value means no maximum @@ -1652,6 +1659,13 @@ <default>0x0</default> </field> <field> + <name>chipCount</name> + <description>The number of chips making up an eeprom device. + </description> + <type>uint8_t</type> + <default>0x01</default> + </field> + <field> <name>writePageSize</name> <description>The maximum number of bytes that can be written to a device at one time. 'Zero' value means no maximum @@ -1718,7 +1732,14 @@ <description>The number of kilobytes a device can hold. 'Zero' value possible for some devices.</description> <type>uint64_t</type> - <default>0x0</default> + <default>0x100</default> + </field> + <field> + <name>chipCount</name> + <description>The number of chips making up an eeprom device. + </description> + <type>uint8_t</type> + <default>0x04</default> </field> <field> <name>writePageSize</name> @@ -1787,7 +1808,14 @@ <description>The number of kilobytes a device can hold. 'Zero' value possible for some devices.</description> <type>uint64_t</type> - <default>0x0</default> + <default>0x100</default> + </field> + <field> + <name>chipCount</name> + <description>The number of chips making up an eeprom device. + </description> + <type>uint8_t</type> + <default>0x04</default> </field> <field> <name>writePageSize</name> @@ -18647,22 +18675,6 @@ DEPRECATED!!!! </attribute> <attribute> - <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id> - <description> - Default Nest frequency in MHz for Processor Modules - Default to 2000 MHz for Murano-based Modules - Default to 2400 MHz for Venice- and Naples-based Modules - </description> - <simpleType> - <uint32_t> - <default>2000</default> - </uint32_t> - </simpleType> - <persistency>non-volatile</persistency> - <readable/> -</attribute> - -<attribute> <id>EFF_DRAM_TCCD_S</id> <description>tccd_l. This is for DDR4 MRS6. Computed in mss_eff_cnfg. Each memory channel will have a value. Creator: mss_eff_cnfg diff --git a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml index f756e868f..ec8e642d9 100644 --- a/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml +++ b/src/usr/targeting/common/xmltohb/simics_NIMBUS.system.xml @@ -269,6 +269,62 @@ </attribute> <!-- End FSI connections --> <attribute> + <id>EEPROM_SBE_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xA8</value></field> + <field><id>engine</id><value>0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>chipCount</id><value>0x04</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + <field><id>writeCycleTime</id><value>0x05</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_SBE_BACKUP_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>0</value></field> + <field><id>devAddr</id><value>0xA8</value></field> + <field><id>engine</id><value>0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>chipCount</id><value>0x04</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + <field><id>writeCycleTime</id><value>0x05</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_BACKUP_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>maxMemorySizeKB</id><value>0x80</value></field> + <field><id>chipCount</id><value>0x02</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + <field><id>writeCycleTime</id><value>0x05</value></field> + </default> + </attribute> + <attribute> + <id>EEPROM_VPD_PRIMARY_INFO</id> + <default> + <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field> + <field><id>port</id><value>1</value></field> + <field><id>devAddr</id><value>0xA0</value></field> + <field><id>engine</id><value>0</value></field> + <field><id>byteAddrOffset</id><value>0x02</value></field> + <field><id>maxMemorySizeKB</id><value>0x80</value></field> + <field><id>chipCount</id><value>0x02</value></field> + <field><id>writePageSize</id><value>0x80</value></field> + <field><id>writeCycleTime</id><value>0x05</value></field> + </default> + </attribute> + <attribute> <id>FABRIC_GROUP_ID</id> <default>0</default> </attribute> @@ -308,7 +364,7 @@ <attribute> <id>I2C_BUS_SPEED_ARRAY</id> <default> - 0, 0, 0, + 400, 0, 0, 0, 0, 0, 400, 0, 0, 0, 0, 0 @@ -4823,10 +4879,11 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xAC</value></field> + <field><id>devAddr</id><value>0xA8</value></field> <field><id>engine</id><value>0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>chipCount</id><value>0x04</value></field> <field><id>writePageSize</id><value>0x80</value></field> <field><id>writeCycleTime</id><value>0x05</value></field> </default> @@ -4836,10 +4893,11 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>port</id><value>0</value></field> - <field><id>devAddr</id><value>0xAE</value></field> + <field><id>devAddr</id><value>0xA8</value></field> <field><id>engine</id><value>0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>maxMemorySizeKB</id><value>0x100</value></field> + <field><id>chipCount</id><value>0x04</value></field> <field><id>writePageSize</id><value>0x80</value></field> <field><id>writeCycleTime</id><value>0x05</value></field> </default> @@ -4849,10 +4907,11 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xA6</value></field> + <field><id>devAddr</id><value>0xA0</value></field> <field><id>engine</id><value>0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>maxMemorySizeKB</id><value>0x80</value></field> + <field><id>chipCount</id><value>0x02</value></field> <field><id>writePageSize</id><value>0x80</value></field> <field><id>writeCycleTime</id><value>0x05</value></field> </default> @@ -4862,10 +4921,11 @@ <default> <field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-1</value></field> <field><id>port</id><value>1</value></field> - <field><id>devAddr</id><value>0xA4</value></field> + <field><id>devAddr</id><value>0xA0</value></field> <field><id>engine</id><value>0</value></field> <field><id>byteAddrOffset</id><value>0x02</value></field> - <field><id>maxMemorySizeKB</id><value>0x40</value></field> + <field><id>maxMemorySizeKB</id><value>0x80</value></field> + <field><id>chipCount</id><value>0x02</value></field> <field><id>writePageSize</id><value>0x80</value></field> <field><id>writeCycleTime</id><value>0x05</value></field> </default> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 4dfd20009..5292578ca 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -688,7 +688,6 @@ <attribute><id>PAYLOAD_KIND</id></attribute> <attribute><id>PAYLOAD_BASE</id></attribute> <attribute><id>PAYLOAD_ENTRY</id></attribute> - <attribute><id>NEST_FREQ_MHZ</id></attribute> <attribute><id>MFG_TRACE_ENABLE</id></attribute> <attribute><id>ENABLED_THREADS</id></attribute> <attribute><id>ISTEP_MODE</id></attribute> |