diff options
8 files changed, 224 insertions, 357 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C index 0f4c9560b..77eb285d8 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/eff_config.C @@ -435,29 +435,40 @@ fapi_try_exit: /// fapi2::ReturnCode eff_config::refresh_interval_time(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { + uint8_t l_temp_refresh_range = 0; uint8_t l_refresh_mode = 0; uint64_t l_trefi_in_ps = 0; - FAPI_TRY ( mss::mrw_fine_refresh_mode(l_refresh_mode) ); + FAPI_TRY( mss::mrw_temp_refresh_range(l_temp_refresh_range), "Failed mrw_temp_refresh_range()" ); + FAPI_TRY( mss::mrw_fine_refresh_mode(l_refresh_mode), "Failed mrw_fine_refresh_mode()" ); // Calculates appropriate tREFI based on fine refresh mode switch(l_refresh_mode) { case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_NORMAL: - FAPI_TRY( calc_trefi1(i_target, l_trefi_in_ps), - "Failed to calculate tREFI1" ); + + FAPI_TRY( calc_trefi( mss::refresh_rate::REF1X, + l_temp_refresh_range, + l_trefi_in_ps), + "Failed to calculate tREF1" ); break; case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_2X: case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_2X: - FAPI_TRY( calc_trefi2(i_target, l_trefi_in_ps), - "Failed to calculate tREFI2" ); + + FAPI_TRY( calc_trefi( mss::refresh_rate::REF2X, + l_temp_refresh_range, + l_trefi_in_ps), + "Failed to calculate tREF2" ); break; case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_4X: case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_4X: - FAPI_TRY( calc_trefi4(i_target, l_trefi_in_ps), - "Failed to calculate tREFI4" ); + + FAPI_TRY( calc_trefi( mss::refresh_rate::REF4X, + l_temp_refresh_range, + l_trefi_in_ps), + "Failed to calculate tREF4" ); break; default: @@ -477,10 +488,9 @@ fapi2::ReturnCode eff_config::refresh_interval_time(const fapi2::Target<TARGET_T { // Calculate clock period (tCK) from selected freq from mss_freq uint64_t l_tCK_in_ps = 0; - FAPI_TRY( clock_period(i_target, l_tCK_in_ps), - "Failed to calclate clock period"); + FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calclate clock period"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); { // Calculate refresh cycle time in nCK & set attribute @@ -495,15 +505,11 @@ fapi2::ReturnCode eff_config::refresh_interval_time(const fapi2::Target<TARGET_T // Calculate nck l_trefi_in_nck = calc_nck(l_trefi_in_ps, l_tCK_in_ps, uint64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated tREFI (nck): %d", l_trefi_in_ps); + FAPI_INF("Calculated tREFI (ps): %d, tREFI (nck): %d", l_trefi_in_ps, l_trefi_in_ps); // Update MCS attribute l_mcs_attrs_trefi[l_port_num] = l_trefi_in_nck; - // TK - RIT skeleton. Need to finish - BRS - // (note old calc resulted in 0x01 which seems really wrong in any event - l_mcs_attrs_trefi[l_port_num] = 0x1249; - // casts vector into the type FAPI_ATTR_SET is expecting by deduction FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TREFI, l_mcs, @@ -525,6 +531,7 @@ fapi_try_exit: fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE_DIMM>& i_target) { uint8_t l_refresh_mode = 0; + int64_t l_trfc_mtb = 0; int64_t l_trfc_in_ps = 0; FAPI_TRY ( mss::mrw_fine_refresh_mode(l_refresh_mode), @@ -534,19 +541,19 @@ fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE switch(l_refresh_mode) { case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_NORMAL: - FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_1(i_target, l_trfc_in_ps), + FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_1(i_target, l_trfc_mtb), "Failed to decode SPD for tRFC1" ); break; case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_2X: case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_2X: - FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_2(i_target, l_trfc_in_ps), + FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_2(i_target, l_trfc_mtb), "Failed to decode SPD for tRFC2" ); break; case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FIXED_4X: case fapi2::ENUM_ATTR_MRW_FINE_REFRESH_MODE_FLY_4X: - FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_4(i_target, l_trfc_in_ps), + FAPI_TRY( iv_pDecoder->min_refresh_recovery_delay_time_4(i_target, l_trfc_mtb), "Failed to decode SPD for tRFC4" ); break; @@ -565,20 +572,31 @@ fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE }// switch + // Calculate trfc (in ps) + { + constexpr int64_t l_trfc_ftb = 0; + int64_t l_ftb = 0; + int64_t l_mtb = 0; + + FAPI_TRY( iv_pDecoder->medium_timebase(i_target, l_mtb) ); + FAPI_TRY( iv_pDecoder->fine_timebase(i_target, l_ftb) ); + + l_trfc_in_ps = calc_timing_from_timebase(l_trfc_mtb, l_mtb, l_trfc_ftb, l_ftb); + } + { // Calculate clock period (tCK) from selected freq from mss_freq int64_t l_tCK_in_ps = 0; FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); { // Calculate refresh cycle time in nCK & set attribute const auto l_mcs = find_target<TARGET_TYPE_MCS>(i_target); const auto l_port_num = index( find_target<TARGET_TYPE_MCA>(i_target) ); - uint16_t l_trfc_in_nck = 0; std::vector<uint16_t> l_mcs_attrs_trfc(PORTS_PER_MCS, 0); @@ -588,14 +606,11 @@ fapi2::ReturnCode eff_config::refresh_cycle_time(const fapi2::Target<TARGET_TYPE // Calculate nck l_trfc_in_nck = calc_nck(l_trfc_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated tRFC (nck): %d", l_trfc_in_nck); + FAPI_INF("Calculated tRFC (ps): %d, tRFC (nck): %d", l_trfc_in_ps, l_trfc_in_nck); // Update MCS attribute l_mcs_attrs_trfc[l_port_num] = l_trfc_in_nck; - // TK - RIT skeleton. Need to finish - BRS - l_mcs_attrs_trfc[l_port_num] = 0x1A4; - // casts vector into the type FAPI_ATTR_SET is expecting by deduction FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_EFF_DRAM_TRFC, l_mcs, @@ -627,7 +642,7 @@ fapi2::ReturnCode eff_config::refresh_cycle_time_dlr(const fapi2::Target<TARGET_ // TK - RIT skeleton. Need to finish - BRS l_mcs_attrs_trfc_dlr[l_port_num] = 0x90; - FAPI_DBG("Hardwired tRFC_DLR: %d", l_mcs_attrs_trfc_dlr[l_port_num]); + FAPI_INF("Hardwired tRFC_DLR: %d", l_mcs_attrs_trfc_dlr[l_port_num]); // Update MCS attribute // casts vector into the type FAPI_ATTR_SET is expecting by deduction @@ -790,7 +805,7 @@ fapi2::ReturnCode eff_config::odt_read(const fapi2::Target<TARGET_TYPE_DIMM>& i_ FAPI_TRY( eff_odt_rd(l_mcs, &l_attrs_odt_rd[0][0][0]) ); FAPI_TRY( mss::ranks(i_target, l_ranks) ); - FAPI_DBG("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target)); + FAPI_INF("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target)); // Initialize all ranks on this DIMM to 0, then write values for ranks which exist. memset(&(l_attrs_odt_rd[l_port_num][l_dimm_num][0]), 0, MAX_RANK_PER_DIMM); @@ -798,7 +813,7 @@ fapi2::ReturnCode eff_config::odt_read(const fapi2::Target<TARGET_TYPE_DIMM>& i_ // Replace with proper ODT calculation. for(const auto& l_rank : l_ranks) { - FAPI_DBG("writing odt_rd[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target)); + FAPI_INF("writing odt_rd[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target)); l_attrs_odt_rd[l_port_num][l_dimm_num][index(l_rank)] = 0x00; } @@ -826,7 +841,7 @@ fapi2::ReturnCode eff_config::odt_write(const fapi2::Target<TARGET_TYPE_DIMM>& i FAPI_TRY( eff_odt_wr(l_mcs, &l_attrs_odt_wr[0][0][0]) ); FAPI_TRY( mss::ranks(i_target, l_ranks) ); - FAPI_DBG("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target)); + FAPI_INF("seeing %d ranks on %s", l_ranks.size(), mss::c_str(i_target)); // Initialize all ranks on this DIMM to 0, then write values for ranks which exist. memset(&(l_attrs_odt_wr[l_port_num][l_dimm_num][0]), 0, MAX_RANK_PER_DIMM); @@ -842,7 +857,7 @@ fapi2::ReturnCode eff_config::odt_write(const fapi2::Target<TARGET_TYPE_DIMM>& i l_value = (l_rank == 0) ? 0x40 : 0x80; } - FAPI_DBG("writing odt_wr[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target)); + FAPI_INF("writing odt_wr[%d][%d][%d] for %s", l_port_num, l_dimm_num, index(l_rank), mss::c_str(i_target)); l_attrs_odt_wr[l_port_num][l_dimm_num][index(l_rank)] = l_value; } @@ -2890,14 +2905,14 @@ fapi2::ReturnCode eff_config::dram_trp(const fapi2::Target<TARGET_TYPE_DIMM>& i_ // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_trp_in_nck = calc_nck(l_trp_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated tRP (nck): %d", l_trp_in_nck); + FAPI_INF("Calculated tRP (nck): %d", l_trp_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_trp(l_mcs, l_attrs_dram_trp.data()) ); @@ -2947,14 +2962,14 @@ fapi2::ReturnCode eff_config::dram_trcd(const fapi2::Target<TARGET_TYPE_DIMM>& i // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_trcd_in_nck = calc_nck(l_trcd_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated trcd (nck): %d", l_trcd_in_nck); + FAPI_INF("Calculated trcd (nck): %d", l_trcd_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_trcd(l_mcs, l_attrs_dram_trcd.data()) ); @@ -3003,14 +3018,14 @@ fapi2::ReturnCode eff_config::dram_twtr_l(const fapi2::Target<TARGET_TYPE_DIMM>& // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_twtr_l_in_nck = calc_nck(l_twtr_l_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated twtr_l (nck): %d", l_twtr_l_in_nck); + FAPI_INF("Calculated twtr_l (nck): %d", l_twtr_l_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_twtr_l(l_mcs, l_attrs_dram_twtr_l.data()) ); @@ -3058,14 +3073,14 @@ fapi2::ReturnCode eff_config::dram_twtr_s(const fapi2::Target<TARGET_TYPE_DIMM>& // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_twtr_s_in_nck = calc_nck(l_twtr_s_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated twtr_s (nck): %d", l_twtr_s_in_nck); + FAPI_INF("Calculated twtr_s (nck): %d", l_twtr_s_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_twtr_s(l_mcs, l_attrs_dram_twtr_s.data()) ); @@ -3114,14 +3129,14 @@ fapi2::ReturnCode eff_config::dram_trrd_s(const fapi2::Target<TARGET_TYPE_DIMM>& // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_trrd_s_in_nck = calc_nck(l_trrd_s_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated trrd_s (nck): %d", l_trrd_s_in_nck); + FAPI_INF("Calculated trrd_s (nck): %d", l_trrd_s_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_trrd_s(l_mcs, l_attrs_dram_trrd_s.data()) ); @@ -3170,14 +3185,14 @@ fapi2::ReturnCode eff_config::dram_trrd_l(const fapi2::Target<TARGET_TYPE_DIMM>& // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_trrd_l_in_nck = calc_nck(l_trrd_l_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated trrd_l (nck): %d", l_trrd_l_in_nck); + FAPI_INF("Calculated trrd_l (nck): %d", l_trrd_l_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_trrd_l(l_mcs, l_attrs_dram_trrd_l.data()) ); @@ -3225,14 +3240,14 @@ fapi2::ReturnCode eff_config::dram_tfaw(const fapi2::Target<TARGET_TYPE_DIMM>& i // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_tfaw_in_nck = calc_nck(l_tfaw_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated tfaw (nck): %d", l_tfaw_in_nck); + FAPI_INF("Calculated tfaw (nck): %d", l_tfaw_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_tfaw(l_mcs, l_attrs_dram_tfaw.data()) ); @@ -3281,14 +3296,14 @@ fapi2::ReturnCode eff_config::dram_tras(const fapi2::Target<TARGET_TYPE_DIMM>& i // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_tras_in_nck = calc_nck(l_tras_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated tras (nck): %d", l_tras_in_nck); + FAPI_INF("Calculated tras (nck): %d", l_tras_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_tras(l_mcs, l_attrs_dram_tras.data()) ); @@ -3326,14 +3341,14 @@ fapi2::ReturnCode eff_config::dram_trtp(const fapi2::Target<TARGET_TYPE_DIMM>& i // Calculate clock period (tCK) from selected freq from mss_freq FAPI_TRY( clock_period(i_target, l_tCK_in_ps), "Failed to calculate clock period (tCK)"); - FAPI_DBG("Calculated clock period (tCK): %d", l_tCK_in_ps); + FAPI_INF("Calculated clock period (tCK): %d", l_tCK_in_ps); // Calculate nck l_calc_trtp_in_nck = calc_nck(l_max_trtp_in_ps, l_tCK_in_ps, int64_t(INVERSE_DDR4_CORRECTION_FACTOR)); - FAPI_DBG("Calculated trtp (nck): %d", l_calc_trtp_in_nck); + FAPI_INF("Calculated trtp (nck): %d", l_calc_trtp_in_nck); // Get & update MCS attribute FAPI_TRY( eff_dram_trtp(l_mcs, l_attrs_dram_trtp.data()) ); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C index 5476b32b8..7e7f79c57 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C @@ -30,57 +30,11 @@ namespace mss { -// Proposed DDR4 Full spec update(79-4A) +// Proposed DDR4 Full spec update(79-4B) // Item No. 1716.78C // pg.46 -// Table 24 - tREFI and tRFC parameters -static const std::vector<std::pair<uint8_t, uint64_t> > TREFI_BASE = -{ - // { density in GBs, tREFI(base) in picoseconds } - {2, 7800000}, - {4, 7800000}, - {8, 7800000}, - // 16Gb - TBD -}; - -// Proposed DDR4 Full spec update(79-4A) -// Item No. 1716.78C -// pg.46 -// Table 24 - tREFI and tRFC parameters -static const std::vector<std::pair<uint8_t, uint64_t> > TRFC1_MIN = -{ - // { density in GBs, tRFC1(min) in picoseconds } - {2, 160000}, - {4, 260000}, - {8, 350000}, - // 16Gb - TBD -}; - -// Proposed DDR4 Full spec update(79-4A) -// Item No. 1716.78C -// pg.46 -// Table 24 - tREFI and tRFC parameters -static const std::vector<std::pair<uint8_t, uint64_t> > TRFC2_MIN = -{ - // { density in GBs, tRFC2(min) in picoseconds } - {2, 110000}, - {4, 160000}, - {8, 260000}, - // 16Gb - TBD -}; - -// Proposed DDR4 Full spec update(79-4A) -// Item No. 1716.78C -// pg.46 -// Table 24 - tREFI and tRFC parameters -static const std::vector<std::pair<uint8_t, uint64_t> > TRFC4_MIN = -{ - // { density in GBs, tRFC4(min) in picoseconds } - {2, 90000}, - {4, 110000}, - {8, 160000}, - // 16Gb - TBD -}; +// Table 24 - tREFI and tRFC parameters (in ps) +constexpr uint64_t TREFI_BASE = 7800000; // Proposed DDR4 3DS Addendum // Item No. 1727.58A @@ -118,193 +72,46 @@ static const std::vector<std::pair<uint8_t, uint64_t> > TRFC_DLR4 = // 16Gb - TBD }; -/// @brief Calculates refresh interval time 1 (tREFI 1) -/// @param[in] i_target FAPI2 target -/// @param[out] o_value timing val in ps -/// @return fapi2::ReturnCode -/// -fapi2::ReturnCode calc_trefi1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value) -{ - uint8_t l_quotient = 0; - uint8_t l_remainder = 0; - uint64_t l_output = 0; - uint8_t l_temp_refresh_range = 0; - uint8_t l_dram_density = 0; - bool l_found_value = true; - - FAPI_TRY( mss::eff_dram_density(i_target, l_dram_density) ); - FAPI_TRY( mss::mrw_temp_refresh_range(l_temp_refresh_range) ); - - l_found_value = mss::find_value_from_key(TREFI_BASE, l_dram_density, l_output); - - switch(l_temp_refresh_range) - { - case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_NORMAL: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "normal temp_refresh_range.") ); - break; - - case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_EXTEND: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "extended temp_refresh_range.") ); - l_quotient = l_output / 2; - l_remainder = l_output % 2; - o_value = l_quotient + (l_remainder == 0 ? 0 : 1); - break; - default: - // Temperature Refresh Range will be a platform attribute set by the MRW, - // which they "shouldn't" mess up as long as use "attribute" enums. - // if openpower messes this up we can at least catch it - FAPI_ASSERT(false, - fapi2::MSS_INVALID_TEMP_REF_RANGE(). - set_TEMP_REF_RANGE(l_temp_refresh_range), - "%s Incorrect Temperature Ref. Range received: %d ", - mss::c_str(i_target), - l_temp_refresh_range); - - break; - } - -fapi_try_exit: - return fapi2::current_err; -} - -/// @brief Calculates refresh interval time 2 (tREFI 2) -/// @param[in] i_target FAPI2 target +/// @brief Calculates refresh interval time +/// @param[in] i_mode fine refresh rate mode +/// @param[in] i_temp_refresh_range temperature refresh range /// @param[out] o_value timing val in ps /// @return fapi2::ReturnCode /// -fapi2::ReturnCode calc_trefi2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value) +fapi2::ReturnCode calc_trefi( const refresh_rate i_mode, + const uint8_t i_temp_refresh_range, + uint64_t& o_timing ) { - uint8_t l_quotient = 0; - uint8_t l_remainder = 0; - uint64_t l_output = 0; - uint8_t l_temp_refresh_range = 0; - uint8_t l_dram_density = 0; - bool l_found_value = true; + uint64_t l_multiplier = 0; - FAPI_TRY( mss::mrw_temp_refresh_range(l_temp_refresh_range) ); - FAPI_TRY( mss::eff_dram_density(i_target, l_dram_density) ); - - l_found_value = mss::find_value_from_key(TREFI_BASE, l_dram_density, l_output); - - switch(l_temp_refresh_range) + switch(i_temp_refresh_range) { case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_NORMAL: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "normal temp_refresh_range.") ); - - l_remainder = l_output % 2; - o_value = l_quotient + (l_remainder == 0 ? 0 : 1); + l_multiplier = temp_mode::NORMAL; break; case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_EXTEND: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "extended temp_refresh_range.") ); - l_quotient = l_output / 4; - l_remainder = l_output % 4; - o_value = l_quotient + (l_remainder == 0 ? 0 : 1); + l_multiplier = temp_mode::EXTENDED; break; default: // Temperature Refresh Range will be a platform attribute set by the MRW, // which they "shouldn't" mess up as long as use "attribute" enums. - // if openpower messes this up we can at least catch it - FAPI_ASSERT(false, - fapi2::MSS_INVALID_TEMP_REF_RANGE(). - set_TEMP_REF_RANGE(l_temp_refresh_range), - "%s Incorrect Temperature Ref. Range received: %d ", - mss::c_str(i_target), - l_temp_refresh_range); - + // if someone messes this up we can at least catch it + FAPI_ERR( "Incorrect Temperature Ref. Range received: %d ", i_temp_refresh_range); + return fapi2::FAPI2_RC_INVALID_PARAMETER; break; } -fapi_try_exit: - return fapi2::current_err; -} - -/// @brief Calculates refresh interval time 4 (tREFI 4) -/// @param[in] i_target FAPI2 target -/// @param[out] o_value timing val in ps -/// @return fapi2::ReturnCode -/// -fapi2::ReturnCode calc_trefi4( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value) -{ - uint8_t l_quotient = 0; - uint8_t l_remainder = 0; - uint64_t l_output = 0; - uint8_t l_temp_refresh_range = 0; - uint8_t l_dram_density = 0; - bool l_found_value = true; - - FAPI_TRY( mss::mrw_temp_refresh_range(l_temp_refresh_range) ); - FAPI_TRY( mss::eff_dram_density(i_target, l_dram_density) ); + const uint64_t l_quotient = TREFI_BASE / ( uint64_t(i_mode) * l_multiplier ); + const uint64_t l_remainder = TREFI_BASE % ( uint64_t(i_mode) * l_multiplier ); + o_timing = l_quotient + (l_remainder == 0 ? 0 : 1); - l_found_value = mss::find_value_from_key(TREFI_BASE, l_dram_density, l_output); - - switch(l_temp_refresh_range) - { - case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_NORMAL: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "normal temp_refresh_range.") ); - l_quotient = l_output / 4; - l_remainder = l_output % 4; - o_value = l_quotient + (l_remainder == 0 ? 0 : 1); - break; - - case fapi2::ENUM_ATTR_MRW_TEMP_REFRESH_RANGE_EXTEND: - FAPI_TRY( check::fail_for_invalid_map(i_target, - l_found_value, - l_dram_density, - l_temp_refresh_range, - "Could not find sdram density given " - "extended temp_refresh_range.") ); - l_quotient = l_output / 8; - l_remainder = l_output % 8; - o_value = l_quotient + (l_remainder == 0 ? 0 : 1); - break; - - default: - // Temperature Refresh Range will be a platform attribute set by the MRW, - // which they "shouldn't" mess up as long as use "attribute" enums. - // if openpower messes this up we can at least catch it - FAPI_ASSERT(false, - fapi2::MSS_INVALID_TEMP_REF_RANGE(). - set_TEMP_REF_RANGE(l_temp_refresh_range), - "%s Incorrect Temperature Ref. Range received: %d ", - mss::c_str(i_target), - l_temp_refresh_range); - - break; - } + FAPI_INF( "tREFI: %d, quotient: %d, remainder: %d, tREFI_base: %d", + o_timing, l_quotient, l_remainder, TREFI_BASE ); -fapi_try_exit: - return fapi2::current_err; + return fapi2::FAPI2_RC_SUCCESS; } }// mss diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index 6b5155879..87fd0a02e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -41,7 +41,7 @@ namespace mss { -enum GUARD_BAND +enum GUARD_BAND : size_t { // Used for caclulating spd timing values - from JEDEC rounding algorithm // Correction factor is 1% (for DDR3) or 2.5% (for DDR4) @@ -52,29 +52,39 @@ enum GUARD_BAND INVERSE_DDR4_CORRECTION_FACTOR = 974, }; +enum class refresh_rate : uint8_t +{ + REF1X = 1, + REF2X = 2, + REF4X = 4, +}; + +enum temp_mode : uint8_t +{ + NORMAL = 1, + EXTENDED = 2, +}; + /// /// @brief Calculates timing value -/// @tparam T input and output type /// @param[in] i_timing_mtb timing value in MTB units /// @param[in] i_mtb_multiplier SPD medium timebase /// @param[in] i_timing_ftb fine offset of timing value /// @param[in] i_ftb_multiplier SPD fine timebase /// @return the timing value in picoseconds /// -template<typename T> -inline T calc_timing_from_timebase(const T i_timing_mtb, - const T i_mtb_multiplier, - const T i_timing_ftb, - const T i_ftb_multiplier) +inline int64_t calc_timing_from_timebase(const int64_t i_timing_mtb, + const int64_t i_mtb_multiplier, + const int64_t i_timing_ftb, + const int64_t i_ftb_multiplier) { // JEDEC algorithm - T l_timing_val = i_timing_mtb * i_mtb_multiplier; - T l_fine_offset = i_timing_ftb * i_ftb_multiplier; + const int64_t l_timing_val = i_timing_mtb * i_mtb_multiplier; + const int64_t l_fine_offset = i_timing_ftb * i_ftb_multiplier; return l_timing_val + l_fine_offset; } - /// /// @brief Returns clock cycles /// @tparam T input and output type @@ -86,62 +96,49 @@ inline T calc_timing_from_timebase(const T i_timing_mtb, /// @note Item 2220.46 /// template<typename T> -inline T calc_nck(T timing_in_ps, T tck_in_ps, T inverse_corr_factor) +inline T calc_nck(const T i_timing_in_ps, + const T i_tck_in_ps, + const T i_inverse_corr_factor) { // Preliminary nCK calculation, scaled by 1000 per JDEC algorithm - T temp_nck = timing_in_ps * 1000 / tck_in_ps; + T l_temp_nck = (i_timing_in_ps * 1000) / (i_tck_in_ps == 0 ? 1 : i_tck_in_ps); // Apply inverse of correction factor percentage - temp_nck += inverse_corr_factor; + l_temp_nck += i_inverse_corr_factor; - return temp_nck / 1000; + return l_temp_nck / 1000; } /// /// @brief Returns application clock period (tCK) based on dimm transfer rate -/// @tparam T output type +/// @tparam T the fapi2 target +/// @tparam OT output type /// @param[in] i_target FAPI2 target /// @param[out] o_tCK_in_ps application period in ps /// @return fapi2::FAPI2_RC_SUCCESS if okay /// -template<typename T> -inline fapi2::ReturnCode clock_period(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - T& o_tCK_in_ps) +template<fapi2::TargetType T, typename OT> +inline fapi2::ReturnCode clock_period(const fapi2::Target<T>& i_target, + OT& o_tCK_in_ps) { uint64_t l_dimm_transfer_rate = 0; FAPI_TRY( freq(find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_dimm_transfer_rate) ); - o_tCK_in_ps = freq_to_ps(l_dimm_transfer_rate); + FAPI_TRY( freq_to_ps(l_dimm_transfer_rate, o_tCK_in_ps) ); fapi_try_exit: return fapi2::current_err; } -/// @brief Calculates refresh interval time 1 (tREFI 1) -/// @param[in] i_target FAPI2 target +/// @brief Calculates refresh interval time +/// @param[in] i_mode fine refresh rate mode +/// @param[in] i_temp_refresh_range temperature refresh range /// @param[out] o_value timing val in ps /// @return fapi2::ReturnCode /// -fapi2::ReturnCode calc_trefi1(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value); - -/// @brief Calculates refresh interval time 2 (tREFI 2) -/// @param[in] i_target FAPI2 target -/// @param[out] o_value timing val in ps -/// @return fapi2::ReturnCode -/// -fapi2::ReturnCode calc_trefi2(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value); - -/// @brief Calculates refresh interval time 4 (tREFI 4) -/// @param[in] i_target FAPI2 target -/// @param[out] o_value timing val in ps -/// @return fapi2::ReturnCode -/// -fapi2::ReturnCode calc_trefi4( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, - uint64_t& o_value); - - +fapi2::ReturnCode calc_trefi( const refresh_rate i_mode, + const uint8_t i_temp_refresh_range, + uint64_t& o_timing ); } // mss #endif diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H index 9054fe27f..501fe42e9 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H @@ -20316,8 +20316,8 @@ fapi_try_exit: /// @param[out] uint8_t& reference to store the value /// @note Generated by gen_accessors.pl generateParameters (SYSTEM) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Fine refresh mode. Should be defaulted to normal mode. This is for DDR4 -/// MRS3. +/// @note Fine refresh mode. Sets DDR4 MRS3. Should be defaulted to normal +/// mode. /// inline fapi2::ReturnCode mrw_fine_refresh_mode(uint8_t& o_value) { @@ -20336,8 +20336,8 @@ fapi_try_exit: /// @param[out] uint8_t& reference to store the value /// @note Generated by gen_accessors.pl generateParameters (SYSTEM) /// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK -/// @note Temp ref range. Should be defaulted to extended range. This is for DDR4 -/// MRS4. +/// @note Temperature refresh range. Sets DDR4 MRS4. Should be defaulted to extended +/// range. /// inline fapi2::ReturnCode mrw_temp_refresh_range(uint8_t& o_value) { diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H index 79b932f93..9076f97ee 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/conversions.H @@ -82,38 +82,80 @@ namespace mss /// -/// @brief Return the number of picoseconds -/// @tparam T input and output type -/// @param[in] i_transfer_rate input in MegaTransfers per second (MT/s) -/// @return timing in picoseconds -/// @note clock periods are defined to 1 ps of accuracy, so -/// so 1.0714 ns is defined as 1071 ps as defined by JEDEC's -/// SPD rounding algorithm. This concept is used for this calculation. -/// -template<typename T> -inline T freq_to_ps(const T i_transfer_rate) +/// @brief Return the number of picoseconds +/// @tparam T input type +/// @tparam OT output type +/// @param[in] i_speed_grade input in MegaTransfers per second (MT/s) +/// @param[out] o_tCK_in_ps +/// @return FAPI2_RC_SUCCESS if okay +/// +template<typename T, typename OT> +inline fapi2::ReturnCode freq_to_ps(const T i_speed_grade, OT& o_tCK_in_ps ) { - // ATTR_MSS_FREQ is in MT/s, and we know microsecond per clock is 1/(freq/2) - // actual dimm_freq is 1/2 of the speed bin - T l_dimm_freq = i_transfer_rate / 2; - - // ps per clock (note value is rounded down) - return CONVERT_PS_IN_A_US / ((l_dimm_freq == 0) ? 1 : l_dimm_freq); + switch(i_speed_grade) + { + case fapi2::ENUM_ATTR_MSS_FREQ_MT1866: + o_tCK_in_ps = 1071; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2133: + o_tCK_in_ps = 937; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2400: + o_tCK_in_ps = 833; + break; + + case fapi2::ENUM_ATTR_MSS_FREQ_MT2666: + o_tCK_in_ps = 750; + break; + + default: + FAPI_ERR("Invalid dimm speed grade (MT/s) - %d - provided"); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + break; + } + + return fapi2::FAPI2_RC_SUCCESS; } /// -/// @brief Return the number in MT/s -/// @tparam T input and output type -/// @param[in] i_time_in_ps time in picoseconds -/// @return speed in MT/s +/// @brief Return the number in MT/s +/// @tparam T input type +/// @tparam OT output type +/// @param[in] i_time_in_ps time in picoseconds +/// @param[out] o_speed_grade transfer rate in MT/s +/// @return FAPI2_RC_SUCCESS if okay /// -template<typename T> -inline T ps_to_freq(const T i_time_in_ps) +template<typename T, typename OT> +fapi2::ReturnCode ps_to_freq(const T i_time_in_ps, OT& o_speed_grade) { - // reverse of freq_to_ps function, solving for freq - // since running at DDR, data is transferred on both rising & falling edges - // hence the 2X factor - return (2 * CONVERT_PS_IN_A_US) / ((i_time_in_ps == 0) ? 1 : i_time_in_ps); + switch(i_time_in_ps) + { + case 750: + o_speed_grade = fapi2::ENUM_ATTR_MSS_FREQ_MT2666; + break; + + case 833: + o_speed_grade = fapi2::ENUM_ATTR_MSS_FREQ_MT2400; + break; + + case 937: + o_speed_grade = fapi2::ENUM_ATTR_MSS_FREQ_MT2133; + break; + + case 1071: + o_speed_grade = fapi2::ENUM_ATTR_MSS_FREQ_MT1866; + break; + + default: + FAPI_ERR("Invalid clock period (tCK) - %d - provided"); + return fapi2::FAPI2_RC_INVALID_PARAMETER; + break; + } + + return fapi2::FAPI2_RC_SUCCESS; + } /// @@ -145,19 +187,20 @@ inline uint64_t ps_to_cycles(const fapi2::Target<T>& i_target, const uint64_t i_ FAPI_TRY( mss::freq( find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq) ); // Hoping the compiler figures out how to do these together. - l_divisor = freq_to_ps(l_freq); + FAPI_TRY( freq_to_ps(l_freq, l_divisor) ); l_quotient = i_ps / ((l_divisor == 0) ? 1 : l_divisor); l_remainder = i_ps % l_divisor; // Make sure we add a cycle if there wasn't an even number of cycles in the input - FAPI_DBG("converting %llups to %llu cycles", i_ps, l_quotient + (l_remainder == 0 ? 0 : 1)); + FAPI_INF("converting %llups to %llu cycles", i_ps, l_quotient + (l_remainder == 0 ? 0 : 1)); return l_quotient + (l_remainder == 0 ? 0 : 1); fapi_try_exit: - - // We simply can't work if we can't get the frequency - so this should be ok - FAPI_ERR("Can't get MSS_FREQ - stopping"); + // We simply can't work if we can't get the frequency or + // if we get an unsupported value that can't be converted to a valid tCK (clock period) + // ...so this should be ok + FAPI_ERR("Can't get MSS_FREQ or obtained an invalid MSS_FREQ (%d) - stopping", l_freq); fapi2::Assert(false); // Keeps compiler happy @@ -175,16 +218,19 @@ inline uint64_t cycles_to_ps(const fapi2::Target<T>& i_target, const uint64_t i_ { // The frequency in mHZ uint64_t l_freq = 0; + uint64_t l_clock_period = 0; FAPI_TRY( mss::freq( find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq) ); - - FAPI_DBG("converting %llu cycles to %llups", i_cycles, i_cycles * freq_to_ps(l_freq)); - return i_cycles * freq_to_ps(l_freq); + FAPI_TRY( freq_to_ps(l_freq, l_clock_period) ); + FAPI_INF("converting %llu cycles to %llups", i_cycles, i_cycles * l_clock_period ); + return i_cycles * l_clock_period; fapi_try_exit: - // We simply can't work if we can't get the frequency - so this should be ok - FAPI_ERR("Can't get MSS_FREQ - stopping"); + // We simply can't work if we can't get the frequency or + // if we get an unsupported value that can't be converted to a valid tCK (clock period) + // ...so this should be ok + FAPI_ERR("Can't get MSS_FREQ or obtained an invalid MSS_FREQ (%d) - stopping", l_freq); fapi2::Assert(false); // Keeps compiler happy @@ -245,7 +291,7 @@ template< fapi2::TargetType T > inline uint64_t cycles_to_ns(const fapi2::Target<T>& i_target, const uint64_t i_cycles) { uint64_t l_ns = cycles_to_time<T, CONVERT_PS_IN_A_NS>(i_target, i_cycles); - FAPI_DBG("converting %llu cycles to %lluns", i_cycles, l_ns); + FAPI_INF("converting %llu cycles to %lluns", i_cycles, l_ns); return l_ns; } @@ -260,7 +306,7 @@ template< fapi2::TargetType T > inline uint64_t cycles_to_us(const fapi2::Target<T>& i_target, const uint64_t i_cycles) { uint64_t l_us = cycles_to_time<T, CONVERT_PS_IN_A_US>(i_target, i_cycles); - FAPI_DBG("converting %llu cycles to %lluus", i_cycles, l_us); + FAPI_INF("converting %llu cycles to %lluus", i_cycles, l_us); return l_us; } @@ -278,10 +324,10 @@ inline uint64_t twlo_twloe(const fapi2::Target<T>& i_target) } /// -/// @brief Convert nanoseconds to picoseconds -/// @tparam T input and output type +/// @brief Convert nanoseconds to picoseconds +/// @tparam T input and output type /// @param[in] i_time_in_ns time in nanoseconds -/// @return time in picoseconds +/// @return time in picoseconds /// template<typename T> inline T ns_to_ps(const T i_time_in_ns) @@ -290,10 +336,11 @@ inline T ns_to_ps(const T i_time_in_ns) } /// -/// @brief Convert nanoseconds to picoseconds -/// @tparam T input and output type +/// @brief Convert nanoseconds to picoseconds +/// @tparam T input and output type /// @param[in] i_time_in_ps time in picoseconds -/// @return time in nanoseconds +/// @return time in nanoseconds +/// @note rounds up /// template<typename T> inline T ps_to_ns(const T i_time_in_ps) diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C index 8c05b2c3a..3bd5288fc 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.C @@ -111,7 +111,9 @@ extern "C" l_tCKmin); // Find dimm transfer speed from selected tCK - l_min_dimm_freq = mss::ps_to_freq(l_tCKmin); + FAPI_TRY( mss::ps_to_freq(l_tCKmin, l_min_dimm_freq), + "Failed ps_to_freq()"); + FAPI_INF("DIMM speed from selected tCK: %d", l_min_dimm_freq); FAPI_TRY(mss::select_supported_freq(l_min_dimm_freq), diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H index 83ec56691..7e1862bd2 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_freq.H @@ -62,7 +62,7 @@ inline fapi2::ReturnCode check_for_freq_override(const fapi2::Target<fapi2::TARG // If there is no override, don't change anything if ( l_freq_override != fapi2::ENUM_ATTR_MSS_FREQ_OVERRIDE_AUTO) { - o_tCK = mss::freq_to_ps(l_freq_override); + FAPI_TRY( mss::freq_to_ps(l_freq_override, o_tCK), "Failed freq_to_ps()"); FAPI_DBG( "Override Frequency Detected: %d", l_freq_override); } diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml index 2e6c89428..f86f29592 100755 --- a/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_mrw_attributes.xml @@ -144,7 +144,6 @@ <mssAccessorName>mrw_max_number_dimms_possible_per_vmem_regulator</mssAccessorName> </attribute> - <attribute> <id>ATTR_MRW_AVDD_OFFSET_DISABLE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> @@ -200,8 +199,8 @@ <targetType>TARGET_TYPE_SYSTEM</targetType> <description> Fine refresh mode. + Sets DDR4 MRS3. Should be defaulted to normal mode. - This is for DDR4 MRS3. </description> <valueType>uint8</valueType> <enum> @@ -219,9 +218,9 @@ <id>ATTR_MRW_TEMP_REFRESH_RANGE</id> <targetType>TARGET_TYPE_SYSTEM</targetType> <description> - Temp ref range. + Temperature refresh range. + Sets DDR4 MRS4. Should be defaulted to extended range. - This is for DDR4 MRS4. </description> <valueType>uint8</valueType> <enum>NORMAL = 0, EXTEND = 1</enum> |
