diff options
13 files changed, 500 insertions, 426 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C index 8c207d992..fdb81388b 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C @@ -74,29 +74,40 @@ fapi_try_exit: /// /// @brief Determine the CCS failure type /// @tparam T the fapi2 target type of the target for this error -/// @param[in] i_target +/// @param[in] i_target MCBIST target /// @param[in] i_type the failure type +/// @param[in] i_mca The port the CCS instruction is training /// @return ReturnCode associated with the fail. /// @note FFDC is handled here, caller doesn't need to do it /// -template< fapi2::TargetType T > -fapi2::ReturnCode fail_type( const fapi2::Target<T>& i_target, const uint64_t& i_type ) +fapi2::ReturnCode fail_type( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, + const uint64_t& i_type, + const fapi2::Target<TARGET_TYPE_MCA>& i_mca ) { + // Including the MCA_TARGET here and below at CAL_TIMEOUT since these problems likely lie at the MCA level + // So we disable the PORT and hopefully that's it + // If the problem lies with the MCBIST, it'll just have to loop FAPI_ASSERT(STAT_READ_MISCOMPARE != i_type, - fapi2::MSS_CCS_READ_MISCOMPARE().set_TARGET_IN_ERROR(i_target), - "CCS FAIL Read Miscompare"); + fapi2::MSS_CCS_READ_MISCOMPARE() + .set_TARGET_IN_ERROR(i_target) + .set_MCA_TARGET(i_mca), + "%s CCS FAIL Read Miscompare", mss::c_str(i_mca)); + // This error is likely due to a bad CCS engine/ MCBIST FAPI_ASSERT(STAT_UE_SUE != i_type, fapi2::MSS_CCS_UE_SUE().set_TARGET_IN_ERROR(i_target), - "CCS FAIL UE or SUE Error"); + "%s CCS FAIL UE or SUE Error", mss::c_str(i_target)); FAPI_ASSERT(STAT_CAL_TIMEOUT != i_type, - fapi2::MSS_CCS_CAL_TIMEOUT().set_TARGET_IN_ERROR(i_target), - "CCS FAIL Calibration Operation Time Out"); + fapi2::MSS_CCS_CAL_TIMEOUT() + .set_TARGET_IN_ERROR(i_target) + .set_MCA_TARGET(i_mca), + "%s CCS FAIL Calibration Operation Time Out", mss::c_str(i_mca)); + // Problem with the CCS engine FAPI_ASSERT(STAT_HUNG != i_type, fapi2::MSS_CCS_HUNG().set_TARGET_IN_ERROR(i_target), - "CCS appears hung"); + "%s CCS appears hung", mss::c_str(i_target)); fapi_try_exit: return fapi2::current_err; } @@ -105,11 +116,13 @@ fapi_try_exit: /// @brief Execute the contents of the CCS array /// @param[in] i_target The MCBIST containing the array /// @param[in] i_program the MCBIST ccs program - to get the polling parameters +/// @param[in] i_port The port target that the array is for /// @return FAPI2_RC_SUCCESS iff success /// template<> fapi2::ReturnCode execute_inst_array(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, - ccs::program<TARGET_TYPE_MCBIST>& i_program) + ccs::program<TARGET_TYPE_MCBIST>& i_program, + const fapi2::Target<TARGET_TYPE_MCA>& i_port) { typedef ccsTraits<TARGET_TYPE_MCBIST> TT; @@ -135,7 +148,7 @@ fapi2::ReturnCode execute_inst_array(const fapi2::Target<TARGET_TYPE_MCBIST>& i_ // So we failed or we're still in progress. Mask off the fail bits // and run this through the FFDC generator. - FAPI_TRY( fail_type(i_target, status & 0x1C00000000000000) ); + FAPI_TRY( fail_type(i_target, status & 0x1C00000000000000, i_port) ); fapi_try_exit: return fapi2::current_err; @@ -243,7 +256,7 @@ fapi2::ReturnCode execute( const fapi2::Target<TARGET_TYPE_MCBIST>& i_target, { FAPI_INF("executing CCS array for port %d (%s)", mss::relative_pos<TARGET_TYPE_MCBIST>(p), mss::c_str(p)); FAPI_TRY( select_ports( i_target, mss::relative_pos<TARGET_TYPE_MCBIST>(p)) ); - FAPI_TRY( execute_inst_array(i_target, i_program) ); + FAPI_TRY( execute_inst_array(i_target, i_program, p) ); } } diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H index 4aad57ffb..c3a680790 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.H @@ -841,10 +841,11 @@ fapi2::ReturnCode execute( const fapi2::Target<T>& i_target, /// /// @brief Execute a set of CCS instructions - single port /// @tparam T the target type of the chiplet which executes the CCS instruction +/// @tparam P the target of the CCS instruction (the port) /// @tparam TT the CCS traits of the chiplet which executes the CCS instruction /// @param[in] i_target the target to effect /// @param[in] i_program the vector of instructions -/// @param[in] i_port the port +/// @param[in] i_port The target that's being programmed by the array /// @return FAPI2_RC_SUCCSS iff ok /// template< fapi2::TargetType T, fapi2::TargetType P, typename TT = ccsTraits<T> > @@ -860,13 +861,17 @@ fapi2::ReturnCode execute( const fapi2::Target<T>& i_target, /// /// @brief Execute a CCS array already loaded in to the engine /// @tparam T the target type of the chiplet which executes the CCS instruction +/// @tparam P the target of the CCS instruction (the port) /// @tparam TT the CCS traits of the chiplet which executes the CCS instruction /// @param[in] i_target the target to effect /// @param[in] i_program the MCBIST ccs program - to get the polling parameters +/// @param[in] i_port the port associated with the MCBIST array /// @return FAPI2_RC_SUCCSS iff ok /// -template< fapi2::TargetType T, typename TT = ccsTraits<T> > -fapi2::ReturnCode execute_inst_array(const fapi2::Target<T>& i_target, ccs::program<T>& i_program); +template< fapi2::TargetType T, fapi2::TargetType P, typename TT = ccsTraits<T> > +fapi2::ReturnCode execute_inst_array(const fapi2::Target<T>& i_target, + ccs::program<T>& i_program, + const fapi2::Target<P>& i_port); /// /// @brief Start or stop the CCS engine diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C index a9af406ca..06ee66044 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/eff_dimm.C @@ -389,7 +389,7 @@ fapi2::ReturnCode eff_dimm::dram_width() (l_decoder_val == fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4), fapi2::MSS_INVALID_DRAM_WIDTH() .set_DRAM_WIDTH(l_decoder_val) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "Unsupported DRAM width with %d for target %s", l_decoder_val, mss::c_str(iv_dimm)); @@ -563,7 +563,7 @@ fapi2::ReturnCode eff_dimm::dimm_size() FAPI_ASSERT( l_sdram_density != 0, fapi2::MSS_BAD_SDRAM_DENSITY_DECODER() .set_DRAM_DENSITY(l_sdram_density) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "SPD decoder messed up and returned a 0. Should have been caught already %s", mss::c_str(iv_dimm)); @@ -574,11 +574,12 @@ fapi2::ReturnCode eff_dimm::dimm_size() FAPI_ASSERT( (std::binary_search(l_dimm_sizes.begin(), l_dimm_sizes.end(), l_dimm_size) == true), fapi2::MSS_INVALID_CALCULATED_DIMM_SIZE() + .set_CALCULATED_SIZE(l_dimm_size) .set_SDRAM_WIDTH(l_sdram_width) .set_BUS_WIDTH(l_bus_width) .set_DRAM_DENSITY(l_sdram_density) .set_LOGICAL_RANKS(l_logical_rank_per_dimm) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "Recieved an invalid dimm size (%d) for calculated DIMM_SIZE for target %s" "(l_sdram_density %d * l_bus_width %d * l_logical_rank_per_dimm %d) / (8 * l_sdram_width %d", l_dimm_size, @@ -916,7 +917,7 @@ fapi2::ReturnCode eff_dimm::dram_dqs_time() (l_dram_width == fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X4), fapi2::MSS_INVALID_DRAM_WIDTH() .set_DRAM_WIDTH(l_dram_width) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "Invalid DRAM width with %d for target %s", l_dram_width, mss::c_str(iv_dimm)); @@ -1250,7 +1251,7 @@ fapi2::ReturnCode eff_dimm::dimm_rc08() .set_NUM_SLAVE_RANKS(l_num_slave_ranks) .set_NUM_TOTAL_RANKS(l_total_ranks) .set_NUM_MASTER_RANKS(l_master_ranks) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "For target %s: Invalid total_ranks %d seen with %d master ranks", mss::c_str(iv_dimm), l_total_ranks, @@ -1269,7 +1270,7 @@ fapi2::ReturnCode eff_dimm::dimm_rc08() .set_NUM_SLAVE_RANKS(l_num_slave_ranks) .set_NUM_TOTAL_RANKS(l_total_ranks) .set_NUM_MASTER_RANKS(l_master_ranks) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "For target %s: Invalid number of slave ranks calculated (%d) from (total_ranks %d / master %d)", mss::c_str(iv_dimm), l_num_slave_ranks, @@ -1374,7 +1375,7 @@ fapi2::ReturnCode eff_dimm::dimm_rc0a() fapi2::MSS_INVALID_FREQ_RC() .set_FREQ(iv_freq) .set_RC_NUM(RC0A) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "Invalid frequency for rc0a encoding received: %d", iv_freq); break; } @@ -1607,7 +1608,7 @@ fapi2::ReturnCode eff_dimm::dimm_rc3x() fapi2::MSS_INVALID_FREQ_RC() .set_FREQ(iv_freq) .set_RC_NUM(RC3X) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "%s: Invalid frequency for RC_3X encoding received: %d", mss::c_str(iv_dimm), iv_freq); @@ -1942,7 +1943,8 @@ fapi2::ReturnCode eff_dimm::dram_cwl() FAPI_ASSERT( ((l_preamble == 0) || (l_preamble == 1)), fapi2::MSS_INVALID_VPD_MT_PREAMBLE() .set_VALUE(l_preamble) - .set_MCA_TARGET(iv_mca), + .set_DIMM_TARGET(iv_dimm) + .set_MCS_TARGET(iv_mcs), "Target %s VPD_MT_PREAMBLE is invalid (not 1 or 0), value is %d", mss::c_str(iv_dimm), l_preamble ); @@ -2128,7 +2130,8 @@ fapi2::ReturnCode eff_dimm::vref_dq_train_value() FAPI_ASSERT(l_train_value <= JEDEC_MAX_TRAIN_VALUE, fapi2::MSS_INVALID_VPD_VREF_DRAM_WR_RANGE() .set_MAX(JEDEC_MAX_TRAIN_VALUE) - .set_VALUE(l_train_value), + .set_VALUE(l_train_value) + .set_MCS_TARGET(iv_mcs), "%s VPD DRAM VREF value out of range max 0x%02x value 0x%02x", mss::c_str(iv_dimm), JEDEC_MAX_TRAIN_VALUE, l_train_value ); @@ -2441,7 +2444,8 @@ fapi2::ReturnCode eff_dimm::read_preamble() FAPI_ASSERT( ((l_preamble == 0) || (l_preamble == 1)), fapi2::MSS_INVALID_VPD_MT_PREAMBLE() .set_VALUE(l_preamble) - .set_MCA_TARGET(iv_mca), + .set_DIMM_TARGET(iv_mca) + .set_MCS_TARGET(iv_mcs), "Target %s VPD_MT_PREAMBLE is invalid (not 1 or 0), value is %d", mss::c_str(iv_dimm), l_preamble ); @@ -2475,7 +2479,8 @@ fapi2::ReturnCode eff_dimm::write_preamble() FAPI_ASSERT( ((l_preamble == 0) || (l_preamble == 1)), fapi2::MSS_INVALID_VPD_MT_PREAMBLE() .set_VALUE(l_preamble) - .set_MCA_TARGET(iv_mca), + .set_DIMM_TARGET(iv_mca) + .set_MCS_TARGET(iv_mcs), "Target %s VPD_MT_PREAMBLE is invalid (not 1 or 0), value is %d", mss::c_str(iv_dimm), l_preamble ); @@ -3497,7 +3502,8 @@ fapi2::ReturnCode eff_rdimm::dram_rtt_nom() fapi2::MSS_INVALID_RTT_NOM_CALCULATIONS() .set_RANK(l_rank) .set_RTT_NOM_INDEX(l_rtt_nom_index) - .set_RTT_NOM_FROM_VPD(l_rtt_nom[mss::index(l_rank)]), + .set_RTT_NOM_FROM_VPD(l_rtt_nom[mss::index(l_rank)]) + .set_DIMM_TARGET(iv_dimm), "Error calculating RTT_NOM for target %s rank %d, rtt_nom from vpd is %d, index is %d", mss::c_str(iv_dimm), l_rank, @@ -3749,7 +3755,8 @@ fapi2::ReturnCode eff_lrdimm::dimm_bc00() fapi2::MSS_INVALID_RTT_NOM_CALCULATIONS() .set_RANK(l_rank) .set_RTT_NOM_INDEX(l_rtt_nom_index) - .set_RTT_NOM_FROM_VPD(l_rtt_nom[mss::index(l_rank)]), + .set_RTT_NOM_FROM_VPD(l_rtt_nom[mss::index(l_rank)]) + .set_DIMM_TARGET(iv_dimm), "Error calculating RTT_NOM for target %s rank %d, rtt_nom from vpd is %d, index is %d", mss::c_str(iv_dimm), l_rank, @@ -4180,7 +4187,7 @@ fapi2::ReturnCode eff_lrdimm::dimm_bc0a() fapi2::MSS_INVALID_FREQ_BC() .set_FREQ(iv_freq) .set_BC_NUM(BC0A) - .set_TARGET(iv_dimm), + .set_DIMM_TARGET(iv_dimm), "unknown FREQ %d for %s in bc0a", iv_freq, mss::c_str(iv_dimm)); @@ -4476,16 +4483,7 @@ fapi2::ReturnCode eff_dimm::decode_vpd(const fapi2::Target<TARGET_TYPE_MCS>& i_t } // Log any error code from getVPD separately in case the error code is meaningful - fapi2::ReturnCode l_rc = fapi2::getVPD(i_target, l_vpd_info, &(l_mt_blob[0])); - - if (l_rc != fapi2::FAPI2_RC_SUCCESS) - { - fapi2::logError(l_rc); - FAPI_ASSERT( false, - fapi2::MSS_VPD_MT_LOAD_FAIL() - .set_MCA_TARGET(p), - "%s Failed to retrieve MT VPD", mss::c_str(p)); - } + FAPI_TRY( fapi2::getVPD(i_target, l_vpd_info, &(l_mt_blob[0])) ); } // Only get the MR blob if we have a freq. It's possible for Cronus to give us an MCS which @@ -4507,16 +4505,7 @@ fapi2::ReturnCode eff_dimm::decode_vpd(const fapi2::Target<TARGET_TYPE_MCS>& i_t } // Log any error code from getVPD separately in case the error code is meaningful - fapi2::ReturnCode l_rc = fapi2::getVPD(i_target, l_vpd_info, &(l_mr_blob[0])); - - if (l_rc != fapi2::FAPI2_RC_SUCCESS) - { - fapi2::logError(l_rc); - FAPI_ASSERT( false, - fapi2::MSS_VPD_MR_LOAD_FAIL() - .set_MCA_TARGET(p), - "%s Failed to retrieve MR VPD", mss::c_str(p)); - } + FAPI_TRY( fapi2::getVPD(i_target, l_vpd_info, &(l_mr_blob[0])) ); } }// mca diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C index 7215bdec4..6d444c574 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/dimm/rank.C @@ -191,11 +191,11 @@ fapi2::ReturnCode get_dimm_target_from_rank(const fapi2::Target<TARGET_TYPE_MCA> bool l_got_one = false; // Make sure we get a valid DIMM index. If not, this is a programming error. - FAPI_ASSERT( (l_dimm_idx < l_dimms.size()), + FAPI_ASSERT( (l_dimm_idx < l_dimms.size() ), fapi2::MSS_BAD_DIMM_INDEX_FOR_GIVEN_RANK() .set_RANK(i_rank) .set_DIMM_INDEX(l_dimm_idx) - .set_TARGET(i_target), + .set_MCA_TARGET(i_target), "Invalid DIMM index (%d) found for provided rank (%d) in get_dimm_target_from_rank: %s", l_dimm_idx, i_rank, @@ -221,7 +221,7 @@ fapi2::ReturnCode get_dimm_target_from_rank(const fapi2::Target<TARGET_TYPE_MCA> fapi2::MSS_NO_DIMM_FOR_GIVEN_DIMM_INDEX() .set_RANK(i_rank) .set_DIMM_INDEX(l_dimm_idx) - .set_TARGET(i_target), + .set_MCA_TARGET(i_target), "Couldn't find a DIMM to match given rank (%d) and DIMM position (%d): %s", i_rank, l_dimm_idx, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C index 3e71c0ef3..e5ce97330 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.C @@ -181,7 +181,7 @@ fapi2::ReturnCode calc_trfc_dlr(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_ fapi2::MSS_FAILED_TO_FIND_TRFC() .set_SDRAM_DENSITY(i_density) .set_REFRESH_MODE(i_refresh_mode) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s: Unable to find tRFC (ps) from map with SDRAM density key %d with %d refresh mode", mss::c_str(i_target), i_density, diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H index b652e7393..fb8d09a50 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/eff_config/timing.H @@ -597,7 +597,7 @@ inline uint64_t tras(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target) fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TRAS) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -668,7 +668,7 @@ static fapi2::ReturnCode tfaw_half_kb_page_helper(const fapi2::Target<T>& i_targ fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TFAW_HALF_KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -722,7 +722,7 @@ static fapi2::ReturnCode tfaw_1kb_page_helper(const fapi2::Target<T>& i_target, fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TFAW_ONE_KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -775,7 +775,7 @@ static fapi2::ReturnCode tfaw_2kb_page_helper(const fapi2::Target<T>& i_target, fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TFAW_TW_KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -817,7 +817,7 @@ fapi2::ReturnCode tfaw( const fapi2::Target<T>& i_target, FAPI_ASSERT( false, fapi2::MSS_INVALID_DRAM_WIDTH() .set_DRAM_WIDTH(i_dram_width) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "Invalid DRAM width with %d for target %s", i_dram_width, mss::c_str(i_target)); @@ -896,7 +896,7 @@ static fapi2::ReturnCode trrd_l_half_and_1kb_page_helper(const fapi2::Target<T>& fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TRRD_L_HALF_AND_1KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -982,7 +982,7 @@ fapi2::ReturnCode trrd_l( const fapi2::Target<T>& i_target, FAPI_ASSERT( false, fapi2::MSS_INVALID_PAGE_SIZE() .set_DRAM_WIDTH(i_dram_width) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Recieved an invalid page size: %lu", mss::c_str(i_target), i_dram_width); @@ -1044,7 +1044,7 @@ static fapi2::ReturnCode trrd_s_half_and_1kb_page_helper(const fapi2::Target<T>& fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TRRD_S_HALF_AND_1KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -1096,7 +1096,7 @@ static fapi2::ReturnCode trrd_s_2kb_page_helper(const fapi2::Target<T>& i_target fapi2::MSS_INVALID_FREQ_PASSED_IN() .set_FREQ(l_freq) .set_FUNCTION(TRRD_S_2KB_PAGE_HELPER) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Invalid frequency %lu", mss::c_str(i_target), l_freq); @@ -1137,7 +1137,7 @@ fapi2::ReturnCode trrd_s( const fapi2::Target<T>& i_target, FAPI_ASSERT( false, fapi2::MSS_INVALID_PAGE_SIZE() .set_DRAM_WIDTH(i_dram_width) - .set_TARGET(i_target), + .set_DIMM_TARGET(i_target), "%s Recieved an invalid page size: %lu", mss::c_str(i_target), i_dram_width); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C index 89e584c62..62d91f41e 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/mcbist/mcbist.C @@ -402,17 +402,19 @@ fapi2::ReturnCode poll( const fapi2::Target<T>& i_target, const program<T>& i_pr fapi2::MSS_MCBIST_UNKNOWN_FAILURE() .set_TARGET_IN_ERROR(i_target) .set_STATUS_REGISTER(l_status), - "MCBIST reported a fail, but process_errors didn't find it 0x%016llx", l_status ); + "%s MCBIST reported a fail, but process_errors didn't find it 0x%016llx", + mss::c_str(i_target), l_status ); // And if we're here all is good with the world. return fapi2::current_err; } FAPI_ASSERT(false, - fapi2::MSS_MCBIST_MULTIPLE_FAIL_BITS() + fapi2::MSS_MCBIST_DATA_FAIL() .set_TARGET_IN_ERROR(i_target) .set_STATUS_REGISTER(l_status), - "MCBIST executed <shrug>. Something's not good 0x%016llx", l_status ); + "%s MCBIST executed but we got corrupted data in the control register 0x%016llx", + mss::c_str(i_target), l_status ); fapi_try_exit: return fapi2::current_err; diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index f4591f18c..b275692e8 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -586,8 +586,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC .set_FAILED_STEPS(uint64_t(l_err_data)) .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "multiple training steps", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -596,8 +596,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_WR_LVL_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "write leveling", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -606,8 +606,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_INITIAL_PAT_WRITE_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "initial pattern write", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -616,8 +616,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_DQS_ALIGNMENT_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "DQS alignment", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -626,8 +626,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_RD_CLK_SYS_CLK_ALIGNMENT_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "read clk alignment", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -636,8 +636,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_RD_CENTERING_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "read centering", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -646,8 +646,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_WR_CENTERING_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "write centering", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -656,8 +656,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_INITIAL_COARSE_WR_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "initial coarse write", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -666,8 +666,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_COARSE_RD_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "coarse read", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -676,8 +676,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_CUSTOM_PATTERN_RD_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "custom read", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -686,8 +686,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_CUSTOM_PATTERN_WR_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "custom write", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -696,8 +696,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_DIGITAL_EYE_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "digital eye", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); @@ -706,8 +706,8 @@ fapi2::ReturnCode process_initial_cal_errors( const fapi2::Target<TARGET_TYPE_MC fapi2::MSS_DRAMINIT_TRAINING_VREF_ERROR() .set_PORT_POSITION(mss::fapi_pos(i_target)) .set_RANKGROUP_POSITION(l_rank_pairs) - .set_TARGET_IN_ERROR(l_failed_dimm) - .set_TARGET_WITH_REGISTERS(i_target), + .set_DIMM_TARGET(l_failed_dimm) + .set_MCA_TARGET(i_target), "Initial CAL failed %s. dimm: %s, cal err: 0x%016llx", "VREF calibration", mss::c_str(l_failed_dimm), uint64_t(l_err_data) ); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C index 0f6102caa..cfa8f6257 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C @@ -1011,7 +1011,7 @@ static fapi2::ReturnCode clock_enable_helper( const fapi2::Target<TARGET_TYPE_MC FAPI_ASSERT( false, fapi2::MSS_INVALID_DRAM_WIDTH(). set_DRAM_WIDTH(l_sdram_width). - set_TARGET(d), + set_DIMM_TARGET(d), "Received in valid DRAM width: x%d for %s. " "Expected x8 or x4 configuration.", l_sdram_width, mss::c_str(d) ); @@ -2387,8 +2387,10 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ l_dq_bad_bit_count = mss::bit_count(uint64_t(v.first)); FAPI_INF("bad DQ count for port %d DP%d %d", l_which_port, l_which_dp, l_dq_bad_bit_count); FAPI_ASSERT(l_dq_bad_bit_count < MIN_BAD_BITS, - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d too many bad DQ bits 0x%016lx", l_which_port, l_which_dp, v.first); + fapi2::MSS_DISABLED_BITS() + .set_MCA_TARGET(i_target) + .set_DIMM_TARGET(i_dimm), + "%s port %d DP%d too many bad DQ bits 0x%016lx", mss::c_str(i_dimm), l_which_port, l_which_dp, v.first); // // Find the DQS mask for this DP. @@ -2409,8 +2411,8 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ FAPI_INF("bad DQS count for port %d DP%d %d", l_which_port, l_which_dp, l_dqs_bad_bit_count); FAPI_ASSERT(l_dqs_bad_bit_count < ((l_width == fapi2::ENUM_ATTR_EFF_DRAM_WIDTH_X8) ? MIN_BAD_X8_DQS : MIN_BAD_X4_DQS), - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d too many bad DQS bits 0x%016lx", l_which_port, l_which_dp, v.second); + fapi2::MSS_DISABLED_BITS().set_MCA_TARGET(i_target).set_DIMM_TARGET(i_dimm), + "%s port %d DP%d too many bad DQS bits 0x%016lx", mss::c_str(i_dimm), l_which_port, l_which_dp, v.second); // So there's no way to get here if we have a x8 config. Either we had no bad DQS, in which case // we didn't come down here at all, or we have at least one bad DQS. And for x8 that means we have @@ -2427,8 +2429,14 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ // We shift it over to mask off the nibble we're checking const uint16_t l_dqs_nibble_mask = 0b1100000000000000 >> (n * BITS_PER_DQS); - FAPI_INF("port %d DP%d nibble %d (%d) mask: 0x%x dqs: 0x%x", - l_which_port, l_which_dp, n, n + l_which_nibble, l_dqs_nibble_mask, v.second); + FAPI_INF("%s port %d DP%d nibble %d (%d) mask: 0x%x dqs: 0x%x", + mss::c_str(i_dimm), + l_which_port, + l_which_dp, + n, + n + l_which_nibble, + l_dqs_nibble_mask, + v.second); if ((l_dqs_nibble_mask & v.second) != 0) { @@ -2441,8 +2449,12 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ // Check to see if the DQ nibble processing found more than one bad nibble. If it did, // we're done. FAPI_ASSERT(l_bad_nibbles.size() <= MAX_BAD_NIBBLES, - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d too many bad nibbles %d", l_which_port, l_which_nibble, l_bad_nibbles.size()); + fapi2::MSS_DISABLED_BITS().set_MCA_TARGET(i_target).set_DIMM_TARGET(i_dimm), + "%s port %d DP%d too many bad nibbles %d", + mss::c_str(i_dimm), + l_which_port, + l_which_nibble, + l_bad_nibbles.size()); } // @@ -2463,8 +2475,8 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ // we add this bit to the total of bad singleton bits. const uint64_t l_bit_count = mss::bit_count(l_dq_nibble_mask & v.first); - FAPI_INF("port %d DP%d nibble %d (%d) mask: 0x%x dq: 0x%x c: %d", - l_which_port, l_which_dp, n, n + l_which_nibble, l_dq_nibble_mask, v.first, l_bit_count); + FAPI_INF("%s port %d DP%d nibble %d (%d) mask: 0x%x dq: 0x%x c: %d", + mss::c_str(i_dimm), l_which_port, l_which_dp, n, n + l_which_nibble, l_dq_nibble_mask, v.first, l_bit_count); // If we don't have any set bits, we're good to go. If we have more than the max bad bits, @@ -2494,17 +2506,17 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ // counts as a bad nibble. // FAPI_ASSERT(l_bad_nibbles.size() <= MAX_BAD_NIBBLES, - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d too many bad nibbles %d", - l_which_port, l_which_dp, l_bad_nibbles.size()); + fapi2::MSS_DISABLED_BITS().set_MCA_TARGET(i_target).set_DIMM_TARGET(i_dimm), + "%s port %d DP%d too many bad nibbles %d", + mss::c_str(i_dimm), l_which_port, l_which_dp, l_bad_nibbles.size()); // If we have one bad nibble, assert that we have one or fewer bad bits if (l_bad_nibbles.size() == MAX_BAD_NIBBLES) { FAPI_ASSERT(l_bad_bits <= MAX_BAD_BITS, - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d bad nibbles %d + %d bad bits", - l_which_port, l_which_dp, l_bad_nibbles.size(), l_bad_bits); + fapi2::MSS_DISABLED_BITS().set_MCA_TARGET(i_target).set_DIMM_TARGET(i_dimm), + "%s port %d DP%d bad nibbles %d + %d bad bits", + mss::c_str(i_dimm), l_which_port, l_which_dp, l_bad_nibbles.size(), l_bad_bits); } // If we have no bad nibbles, assert we have 2 or fewer bad bits. This is a sly bad nibble @@ -2512,9 +2524,9 @@ fapi2::ReturnCode process_bad_bits( const fapi2::Target<TARGET_TYPE_MCA>& i_targ if (l_bad_nibbles.size() == 0) { FAPI_ASSERT(l_bad_bits <= SLY_BAD_BITS, - fapi2::MSS_DISABLED_BITS().set_TARGET_IN_ERROR(i_target), - "port %d DP%d %d bad bits", - l_which_port, l_which_dp, l_bad_bits); + fapi2::MSS_DISABLED_BITS().set_MCA_TARGET(i_target).set_DIMM_TARGET(i_dimm), + "%s port %d DP%d %d bad bits", + mss::c_str(i_dimm), l_which_port, l_which_dp, l_bad_bits); } // We're all done. Clear the bit @@ -2727,7 +2739,7 @@ fapi2::ReturnCode process_rdvref_cal_errors( const fapi2::Target<fapi2::TARGET_T // the errors and the disables there. FAPI_ASSERT_NOEXIT(v == 0, fapi2::MSS_FAILED_RDVREF_CAL() - .set_TARGET_IN_ERROR(i_target) + .set_DIMM_TARGET(i_target) .set_REGISTER(TT::RD_VREF_CAL_ERROR_REG[l_index]) .set_VALUE(v), "DP16 failed read vref calibration on %s. register 0x%016lx value 0x%016lx", @@ -2789,7 +2801,7 @@ fapi2::ReturnCode process_wrvref_cal_errors( const fapi2::Target<fapi2::TARGET_T // Now does bitwise anding to determine what's an actual error w/ the masking FAPI_ASSERT_NOEXIT(0 == (l_mask_compare & l_data_it->first), fapi2::MSS_FAILED_WRVREF_CAL() - .set_TARGET_IN_ERROR(i_target) + .set_DIMM_TARGET(i_target) .set_REGISTER(TT::WR_VREF_ERROR_REG[l_index].first) .set_VALUE(l_data_it->first) .set_MASK(l_mask_it->first), @@ -2802,7 +2814,7 @@ fapi2::ReturnCode process_wrvref_cal_errors( const fapi2::Target<fapi2::TARGET_T FAPI_ASSERT_NOEXIT(0 == (l_mask_compare & l_data_it->second), fapi2::MSS_FAILED_WRVREF_CAL() - .set_TARGET_IN_ERROR(i_target) + .set_DIMM_TARGET(i_target) .set_REGISTER(TT::WR_VREF_ERROR_REG[l_index].second) .set_VALUE(l_data_it->second) .set_MASK(l_mask_it->second), diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H index 7d2b243ed..a5cbd8012 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H +++ b/src/import/chips/p9/procedures/hwp/memory/lib/utils/checker.H @@ -152,7 +152,7 @@ inline fapi2::ReturnCode fail_for_invalid_map(const fapi2::Target<fapi2::TARGET_ fapi2::MSS_INVALID_KEY(). set_KEY(i_key). set_DATA(i_data). - set_TARGET(i_target), + set_DIMM_TARGET(i_target), "%s. %s Could not find value from key %d. Returned data: %d.", c_str(i_target), i_err_str, diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml index 435c3c1f9..a9c92df3b 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_draminit_training.xml @@ -99,27 +99,33 @@ <hwpError> <rc>RC_MSS_DRAMINIT_TRAINING_MULTIPLE_ERRORS</rc> - <description>Multiple training stesp failed for a given position within this calibration.</description> + <description>Multiple training steps failed for a given position within this calibration.</description> <ffdc>FAILED_STEPS</ffdc> <ffdc>PORT_POSITION</ffdc> <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -130,21 +136,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -155,21 +167,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -180,21 +198,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -221,6 +245,12 @@ <target>MCA_TARGET</target> <priority>HIGH</priority> </callout> + <deconfigure> + <target>MCA_TARGET</target> + </deconfigure> + <gard> + <target>MCA_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> <priority>MEDIUM</priority> @@ -234,21 +264,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -259,21 +295,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -284,21 +326,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -309,21 +357,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -334,21 +388,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>MEDIUM</priority> </callout> </hwpError> @@ -359,21 +419,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>LOW</priority> </callout> </hwpError> @@ -384,21 +450,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>LOW</priority> </callout> </hwpError> @@ -409,21 +481,27 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>LOW</priority> </callout> </hwpError> @@ -434,67 +512,59 @@ <ffdc>RANKGROUP_POSITION</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_STATUS</id> - <target>TARGET_WITH_REGISTERS</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> - </callout> - <callout> - <procedure>CODE</procedure> + <target>DIMM_TARGET</target> <priority>HIGH</priority> </callout> -</hwpError> - -<hwpError> - <rc>RC_MSS_DRAMINIT_PC_ERROR_INFO</rc> - <description> - The PHY control has noted an error. The details of the error are contianed - in this error log. If these errors caused an operation to fail, a subsequent - error will be logged indicating the failure. - </description> - <ffdc>PC_ERROR0</ffdc> - <collectRegisterFfdc> - <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_INFO</id> - <target>TARGET_IN_ERROR</target> - <targetType>TARGET_TYPE_MCA</targetType> - </collectRegisterFfdc> - <callout> - <target>TARGET_IN_ERROR</target> - <priority>LOW</priority> - </callout> + <deconfigure> + <target>DIMM_TARGET</target> + </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> <callout> <procedure>CODE</procedure> - <priority>HIGH</priority> + <priority>LOW</priority> </callout> </hwpError> <hwpError> <rc>RC_MSS_DISABLED_BITS</rc> <description> - The PHY has disabled too many bits to continue + The PHY has disabled too many bits to continue (6 bits) </description> + <ffdc>DP</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_INFO</id> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> + <callout> + <target>MCA_TARGET</target> + <priority>HIGH</priority> + </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </deconfigure> <gard> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </gard> </hwpError> @@ -507,19 +577,23 @@ <ffdc>VALUE</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_INFO</id> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> + <callout> + <target>DIMM_TARGET</target> + <priority>HIGH</priority> + </callout> <deconfigure> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </deconfigure> <gard> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </gard> </hwpError> @@ -529,17 +603,11 @@ Tried to map rank pairs on a port without any DIMMS </description> <ffdc>FUNCTION</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <target>MCA_TARGET</target> <priority>HIGH</priority> </callout> - <deconfigure> - <target>MCA_TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -549,23 +617,11 @@ </description> <ffdc>FUNCTION</ffdc> <ffdc>RANK_SIZE</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> <priority>HIGH</priority> </callout> - <deconfigure> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> - </deconfigure> </hwpError> <hwpError> @@ -575,23 +631,11 @@ </description> <ffdc>FUNCTION</ffdc> <ffdc>RANK</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> <priority>HIGH</priority> </callout> - <deconfigure> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> - </deconfigure> </hwpError> <hwpError> @@ -601,23 +645,11 @@ </description> <ffdc>RANK_PAIR</ffdc> <ffdc>FUNCTION</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> <priority>HIGH</priority> </callout> - <deconfigure> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> - </deconfigure> </hwpError> <hwpError> @@ -626,23 +658,11 @@ No primary rank in rank pair </description> <ffdc>RANK_PAIR</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> <procedure>CODE</procedure> - <priority>MEDIUM</priority> - </callout> - <callout> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> <priority>HIGH</priority> </callout> - <deconfigure> - <childTargets> - <parent>MCA_TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> - </deconfigure> </hwpError> <hwpError> @@ -655,19 +675,19 @@ <ffdc>MASK</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_ERROR_INFO</id> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_DRAMINIT_TRAINING_FAILURE_DISABLE_REGS</id> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> <targetType>TARGET_TYPE_MCA</targetType> </collectRegisterFfdc> <deconfigure> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </deconfigure> <gard> - <target>TARGET_IN_ERROR</target> + <target>DIMM_TARGET</target> </gard> </hwpError> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml index 4d042fa81..0183c3fd5 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_eff_config.xml @@ -37,12 +37,11 @@ <hwpErrors> <hwpError> - <rc>RC_MSS_INVALID_TEMP_REF_RANGE</rc> + <rc>RC_MSS_INVALID_FINE_REFRESH_MODE</rc> <description> - Invalid Temperature refresh range recieved - from platform. + Invalid fine refresh mode received from the mrw </description> - <ffdc>TEMP_REF_RANGE</ffdc> + <ffdc>FINE_REF_MODE</ffdc> <callout> <procedure>CODE</procedure> <priority>HIGH</priority> @@ -50,18 +49,9 @@ </hwpError> <hwpError> - <rc>RC_MSS_INVALID_FINE_REFRESH_MODE</rc> - <description> - Invalid fine refresh mode recieved - from platform. - </description> - <ffdc>FINE_REF_MODE</ffdc> - </hwpError> - - <hwpError> <rc>RC_MSS_INVALID_FINE_REFRESH_MODE_WITH_TEMP_REFRESH_MODE_ENABLED</rc> <description> - Invalid fine refresh mode recieved due to temperature fresh mode being enabled + Invalid fine refresh mode received due to temperature refresh mode being enabled If ATTR_MSS_MRW_TEMP_REFRESH_MODE is enabled, only NORMAL mode is allowed for FINE_REFRESH_MODE </description> <ffdc>FINE_REF_MODE</ffdc> @@ -79,47 +69,11 @@ </description> <ffdc>KEY</ffdc> <ffdc>DATA</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_VPD_MT_LOAD_FAIL</rc> - <description> - Loading of VPD MT keyword failed. Could be due to an invalid port configuration. - </description> - <ffdc>MCA_TARGET</ffdc> - <callout> - <target>MCA_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MCA_TARGET</target> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_VPD_MR_LOAD_FAIL</rc> - <description> - Loading of VPD MR keyword failed. Could be due to an invalid port configuration. - </description> - <ffdc>MCA_TARGET</ffdc> - <callout> - <target>MCA_TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>MCA_TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -130,7 +84,10 @@ <ffdc>MAX</ffdc> <ffdc>VALUE</ffdc> <callout> - <procedure>CODE</procedure> + <hw> + <hwid>VPD_PART</hwid> + <refTarget>MCS_TARGET</refTarget> + </hw> <priority>HIGH</priority> </callout> </hwpError> @@ -141,12 +98,12 @@ Value in the VPD for PREAMBLE is not 0 or 1. </description> <ffdc>VALUE</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> - <procedure>CODE</procedure> - <priority>HIGH</priority> - </callout> - <callout> - <target>MCA_TARGET</target> + <hw> + <hwid>VPD_PART</hwid> + <refTarget>MCS_TARGET</refTarget> + </hw> <priority>HIGH</priority> </callout> </hwpError> @@ -174,12 +131,15 @@ <priority>HIGH</priority> </callout> <callout> - <target>TARGET</target> - <priority>HIGH</priority> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> </hwpError> <hwpError> @@ -189,12 +149,20 @@ </description> <ffdc>DATA_BUFFER_GEN</ffdc> <callout> - <target>DIMM_TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -206,12 +174,20 @@ <ffdc>DIMM_TYPE</ffdc> <ffdc>DRAM_GEN</ffdc> <callout> - <target>DIMM_TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -233,13 +209,11 @@ An invalid Freq value has been set </description> <ffdc>FREQ</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> <target>DIMM_TARGET</target> <priority>HIGH</priority> </callout> - <deconfigure> - <target>DIMM_TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -249,17 +223,11 @@ </description> <ffdc>FREQ</ffdc> <ffdc>BC_NUM</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -269,17 +237,11 @@ </description> <ffdc>FREQ</ffdc> <ffdc>RC_NUM</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -289,56 +251,36 @@ </description> <ffdc>FREQ</ffdc> <ffdc>FUNCTION</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <childTargets> - <parent>TARGET</parent> - <childType>TARGET_TYPE_DIMM</childType> - </childTargets> - </deconfigure> - </hwpError> - - <hwpError> - <rc>RC_MSS_INVALID_SPEED_FOR_TSV</rc> - <description> - As of 2/2017 no JEDEC timing values for 2666 3DS dram stack type - </description> - <ffdc>FREQ</ffdc> - <callout> - <procedure>CODE</procedure> - <priority>HIGH</priority> - </callout> - <callout> - <target>TARGET</target> - <priority>HIGH</priority> - </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> </hwpError> <hwpError> <rc>RC_MSS_ERROR_CREATING_EFF_CONFIG_DIMM_OBJECT</rc> <description> - Failed to create a dimm object, probably due to bad attribute settings + Failed to create a dimm object, probably due to bad data from SPD (ie code doesn't support) </description> <ffdc>DIMM_TYPE</ffdc> <ffdc>DRAM_GEN</ffdc> <ffdc>REG_AND_BUFF_TYPE</ffdc> <callout> - <target>DIMM_TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -348,12 +290,20 @@ </description> <ffdc>STACK_TYPE</ffdc> <callout> - <target>DIMM_TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -365,34 +315,46 @@ <ffdc>NUM_TOTAL_RANKS</ffdc> <ffdc>NUM_MASTER_RANKS</ffdc> <callout> - <procedure>CODE</procedure> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> <callout> - <target>TARGET</target> + <target>DIMM_TARGET</target> <priority>HIGH</priority> </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> + <gard> + <target>DIMM_TARGET</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_INVALID_CALCULATED_DIMM_SIZE</rc> <description> - Error calculating DIMM size + Error calculating DIMM size. Size is not supported </description> + <ffdc>CALCULATED_SIZE</ffdc> <ffdc>SDRAM_WIDTH</ffdc> <ffdc>BUS_WIDTH</ffdc> <ffdc>DRAM_DENSITY</ffdc> <ffdc>LOGICAL_RANKS</ffdc> <callout> - <target>TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -427,11 +389,11 @@ <ffdc>SDRAM_DENSITY</ffdc> <ffdc>REFRESH_MODE</ffdc> <callout> - <target>TARGET</target> - <priority>HIGH</priority> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> <callout> <procedure>CODE</procedure> @@ -446,16 +408,20 @@ </description> <ffdc>DRAM_WIDTH</ffdc> <callout> - <procedure>CODE</procedure> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> <callout> - <target>TARGET</target> - <priority>HIGH</priority> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -465,12 +431,20 @@ </description> <ffdc>DRAM_WIDTH</ffdc> <callout> - <target>TARGET</target> + <procedure>MEMORY_PLUGGING_ERROR</procedure> <priority>HIGH</priority> </callout> + <callout> + <target>DIMM_TARGET</target> + <priority>MEDIUM</priority> + </callout> <deconfigure> - <target>TARGET</target> + <target>DIMM_TARGET</target> </deconfigure> + <callout> + <procedure>CODE</procedure> + <priority>MEDIUM</priority> + </callout> </hwpError> <hwpError> @@ -481,8 +455,12 @@ <ffdc>RANK</ffdc> <ffdc>RTT_NOM_INDEX</ffdc> <ffdc>RTT_NOM_FROM_VPD</ffdc> + <ffdc>DIMM_TARGET</ffdc> <callout> - <procedure>CODE</procedure> + <hw> + <hwid>VPD_PART</hwid> + <refTarget>MCS_TARGET</refTarget> + </hw> <priority>HIGH</priority> </callout> </hwpError> diff --git a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml index c55868f1e..9e4c29e8d 100644 --- a/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml +++ b/src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml @@ -27,7 +27,7 @@ <!-- @file memory_mss_lib.xml --> <!-- @brief Error xml for MSS library routines --> <!-- --> -<!-- *HWP HWP Owner: Andre Marin <aamarin@us.ibm.com> --> +<!-- *HWP HWP Owner: Jacob Harvey <jlharvey@us.ibm.com> --> <!-- *HWP FW Owner: Brian Silver <bsilver@us.ibm.com> --> <!-- *HWP Team: Memory --> <!-- *HWP Level: 1 --> @@ -164,7 +164,9 @@ <hwpError> <rc>RC_MSS_CCS_READ_MISCOMPARE</rc> - <description>CCS reports a read miscompare.</description> + <description> + CCS reports a read miscompare. + </description> <ffdc>REG_CONTENTS</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> @@ -172,17 +174,23 @@ <targetType>TARGET_TYPE_MCBIST</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> <priority>HIGH</priority> </callout> <deconfigure> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> </deconfigure> + <gard> + <target>MCA_TARGET</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_CCS_UE_SUE</rc> - <description>CCS reports a UE or SUE</description> + <description> + CCS reports a UE or SUE in the CCS program array + Chould be an indicator of corruption in the CCS program + </description> <ffdc>REG_CONTENTS</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> @@ -196,11 +204,16 @@ <deconfigure> <target>TARGET_IN_ERROR</target> </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_CCS_CAL_TIMEOUT</rc> - <description>CCS reports a calibration operation timeout</description> + <description> + CCS reports never getting a response back from the PHY on a calibration command + </description> <ffdc>REG_CONTENTS</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> @@ -208,17 +221,22 @@ <targetType>TARGET_TYPE_MCBIST</targetType> </collectRegisterFfdc> <callout> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> <priority>HIGH</priority> </callout> <deconfigure> - <target>TARGET_IN_ERROR</target> + <target>MCA_TARGET</target> </deconfigure> + <gard> + <target>MCA_TARGET</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_CCS_HUNG</rc> - <description>CCS failed to return from in-progress status and failed to describe an error further</description> + <description> + Software reported that the machine is not seeing the CCS finish in the alloted time + </description> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> <target>TARGET_IN_ERROR</target> @@ -231,11 +249,17 @@ <deconfigure> <target>TARGET_IN_ERROR</target> </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_CCS_HUNG_TRYING_TO_STOP</rc> - <description>CCS failed to return from in-progress status while trying to stop a previous program</description> + <description> + CCS failed to return from in-progress status while trying to stop a previous program + Software reported that CCS did not finish in alloted time after manually triggering stop + </description> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> <target>TARGET_IN_ERROR</target> @@ -248,11 +272,17 @@ <deconfigure> <target>TARGET_IN_ERROR</target> </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_MCBIST_TIMEOUT</rc> - <description>MCBIST program failed to return in the time allowed</description> + <description> + MCBIST program failed to return in the time allowed + Software timer, MCBIST has not finished in the time allowed + </description> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> <target>TARGET_IN_ERROR</target> @@ -262,11 +292,19 @@ <target>TARGET_IN_ERROR</target> <priority>HIGH</priority> </callout> + <deconfigure> + <target>TARGET_IN_ERROR</target> + </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> - <rc>RC_MSS_MCBIST_MULTIPLE_FAIL_BITS</rc> - <description>MCBIST program appeared to have failed, but set conflicting bits in the status register</description> + <rc>RC_MSS_MCBIST_DATA_FAIL</rc> + <description> + MCBIST program appeared to have failed, but set conflicting bits in the status register + </description> <ffdc>STATUS_REGISTER</ffdc> <collectRegisterFfdc> <id>REG_FFDC_MSS_CCS_FAILURE</id> @@ -277,6 +315,12 @@ <target>TARGET_IN_ERROR</target> <priority>HIGH</priority> </callout> + <deconfigure> + <target>TARGET_IN_ERROR</target> + </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> @@ -292,12 +336,22 @@ <target>TARGET_IN_ERROR</target> <priority>HIGH</priority> </callout> + <deconfigure> + <target>TARGET_IN_ERROR</target> + </deconfigure> + <gard> + <target>TARGET_IN_ERROR</target> + </gard> </hwpError> <hwpError> <rc>RC_MSS_MCBIST_PROGRAM_TOO_BIG</rc> <description>MCBIST program larger than currently supported size</description> <ffdc>PROGRAM_LENGTH</ffdc> + <callout> + <procedure>CODE</procedure> + <priority>HIGH</priority> + </callout> </hwpError> <hwpError> @@ -402,8 +456,13 @@ <ffdc>DIMM_TYPE</ffdc> <ffdc>ROWS</ffdc> <ffdc>SIZE</ffdc> + <ffdc>DIMM_IN_ERROR</ffdc> + <callout> + <procedure>MEMORY_PLUGGING_ERROR</procedure> + <priority>MEDIUM</priority> + </callout> <callout> - <target>DIMM_IN_ERROR</target> + <procedure>CODE</procedure> <priority>HIGH</priority> </callout> </hwpError> @@ -413,13 +472,11 @@ <description>Indicates a fail when attempting to get a DIMM index for a given rank</description> <ffdc>RANK</ffdc> <ffdc>DIMM_INDEX</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> - <target>TARGET</target> + <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> </hwpError> <hwpError> @@ -427,13 +484,11 @@ <description>Indicates a fail when attempting to get a DIMM target for a given DIMM index</description> <ffdc>RANK</ffdc> <ffdc>DIMM_INDEX</ffdc> + <ffdc>MCA_TARGET</ffdc> <callout> - <target>TARGET</target> + <procedure>CODE</procedure> <priority>HIGH</priority> </callout> - <deconfigure> - <target>TARGET</target> - </deconfigure> </hwpError> </hwpErrors> |
