diff options
4 files changed, 117 insertions, 3 deletions
diff --git a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C index 228b06c55..80dac9523 100755 --- a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C +++ b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.C @@ -1039,7 +1039,8 @@ uint32_t getPhbConfig( TARGETING::TargetHandle_t i_proc ) //############################################################################## int32_t getMasterRanks( TargetHandle_t i_memTrgt, - std::vector<CenRank> & o_ranks ) + std::vector<CenRank> & o_ranks, + uint8_t i_ds ) { #define PRDF_FUNC "PlatServices::getMasterRanks] " @@ -1058,6 +1059,12 @@ int32_t getMasterRanks( TargetHandle_t i_memTrgt, break; } + if( MAX_DIMM_PER_PORT < i_ds ) + { + PRDF_ERR( PRDF_FUNC"Invalid value for Dimm Slct:%u", i_ds ); + break; + } + uint8_t info[MAX_PORT_PER_MBA][MAX_DIMM_PER_PORT]; if ( !mbaTrgt->tryGetAttr<ATTR_EFF_DIMM_RANKS_CONFIGED>(info) ) { @@ -1071,6 +1078,14 @@ int32_t getMasterRanks( TargetHandle_t i_memTrgt, for ( uint32_t ds = 0; ds < MAX_DIMM_PER_PORT; ds++ ) { + // if we are requested to get master ranks on a specific + // DIMM, ignore if ds does not match the specific DIMM. + // We have kept MAX_DIMM_PER_PORT as special value ( default ) + // for getting total ranks across both DIMMS. + + if( ( MAX_DIMM_PER_PORT != i_ds ) && ( ds != i_ds ) ) + continue; + uint8_t rankMask = info[0][ds]; if ( 0 == (rankMask & 0xf0) ) continue; // Nothing configured. @@ -1187,6 +1202,61 @@ int32_t getMbaDimm( TARGETING::TargetHandle_t i_dimmTarget, uint8_t & o_dimm ) //------------------------------------------------------------------------------ +int32_t getDramGen( TARGETING::TargetHandle_t i_mba, uint8_t & o_dramGen ) +{ + #define PRDF_FUNC "[PlatServices::getDramGen] " + + int32_t o_rc = FAIL; + do + { + if ( TYPE_MBA != getTargetType( i_mba ) ) + { + PRDF_ERR( PRDF_FUNC"Invalid Target. HUID:0X%08X", + getHuid( i_mba ) ); + break; + } + + o_dramGen = i_mba->getAttr<ATTR_EFF_DRAM_GEN>( ); + + o_rc = SUCCESS; + + }while(0); + + return o_rc; + + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + +int32_t getDimmRowCol( TARGETING::TargetHandle_t i_mba, uint8_t & o_rowNum, + uint8_t & o_colNum ) +{ + #define PRDF_FUNC "[PlatServices::getDimmRowCol] " + + int32_t o_rc = FAIL; + do + { + if ( TYPE_MBA != getTargetType( i_mba ) ) + { + PRDF_ERR( PRDF_FUNC"Invalid Target. HUID:0X%08X", + getHuid( i_mba ) ); + break; + } + + o_rowNum = i_mba->getAttr<ATTR_EFF_DRAM_ROWS>(); + o_colNum = i_mba->getAttr<ATTR_EFF_DRAM_COLS>(); + + o_rc = SUCCESS; + + }while(0); + + return o_rc; + #undef PRDF_FUNC +} + +//------------------------------------------------------------------------------ + bool isDramWidthX4( TargetHandle_t i_mba ) { return ( fapi::ENUM_ATTR_EFF_DRAM_WIDTH_X4 == diff --git a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.H b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.H index 814465eec..6c549b6f6 100755 --- a/src/usr/diag/prdf/common/framework/service/prdfTargetServices.H +++ b/src/usr/diag/prdf/common/framework/service/prdfTargetServices.H @@ -310,10 +310,14 @@ uint32_t getPhbConfig( TARGETING::TargetHandle_t i_proc ); * @brief Returns the list of configured master ranks for an MBA. * @param i_memTrgt MBA target or child of MBA. * @param o_ranks The returned list. + * @param i_ds Dimm Slct for which rank information is required. If this + * equals to MAX_DIMM_PER_PORT, function will return rank + * information for both DIMMS on this MBA. * @return Non-SUCCESS if internal functions fail, SUCCESS otherwise. */ int32_t getMasterRanks( TARGETING::TargetHandle_t i_memTrgt, - std::vector<CenRank> & o_ranks ); + std::vector<CenRank> & o_ranks, + uint8_t i_ds = MAX_DIMM_PER_PORT ); /** * @brief Returns the DMI bus channel for the given memory target. @@ -358,6 +362,24 @@ int32_t getMbaDimm( TARGETING::TargetHandle_t i_dimmTarget, uint8_t & o_dimm ); bool isDramWidthX4(TARGETING::TargetHandle_t i_mbaTarget); /** + * @brief Get DRAM generation + * @param i_mba MBA target + * @param o_dramGen DRAM generation ( 1 - DDR3, 2 - DDR4 ) + * @return Non-SUCCESS if internal functions fail, SUCCESS otherwise. + */ +int32_t getDramGen( TARGETING::TargetHandle_t i_mba, uint8_t & o_dramGen ); + +/** + * @brief Get DIMM number of rows and columns + * @param i_mba MBA target + * @param o_rowNum Number of rows + * @param o_colNum Number of columns + * @return Non-SUCCESS if internal functions fail, SUCCESS otherwise. + */ +int32_t getDimmRowCol( TARGETING::TargetHandle_t i_mba, uint8_t & o_rowNum, + uint8_t & o_colNum ); + +/** * @brief Obtains number of ranks (including slave ranks) per DIMM select. * @param i_mbaTarget MBA target. * @param i_ds DIMM select for DIMM. diff --git a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule index 9f1b93e4c..f8c035683 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Mcs.rule @@ -142,6 +142,17 @@ chip Mcs capture group CerrRegs; }; + ############################################################################ + # Primary Memory Configuration Register + ############################################################################ + + register MCFGP + { + name "MC0.MCS0.LEFT.LEFT.MCFGPQ"; + scomaddr 0x02011800; + capture group never; + }; + }; ############################################################################## diff --git a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule index fa10408db..5c22cc847 100755 --- a/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule +++ b/src/usr/diag/prdf/common/plat/pegasus/Membuf_regs_NEST.rule @@ -5,7 +5,7 @@ # # IBM CONFIDENTIAL # -# COPYRIGHT International Business Machines Corp. 2012,2013 +# COPYRIGHT International Business Machines Corp. 2012,2014 # # p1 # @@ -879,3 +879,14 @@ capture group never; }; + ############################################################################ + # MBS Address Translate Control Register + ############################################################################ + + register MBSXCR + { + name "MBU.MBS.ARB.RXLT.MBSXCRQ"; + scomaddr 0x0201140A; + capture group never; + }; + |