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-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C12
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C10
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/fir/check.H114
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C2
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C4
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C2
-rw-r--r--src/import/generic/memory/lib/utils/mss_generic_check.H120
8 files changed, 135 insertions, 131 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C
index 1b59893bb..685ec22e7 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/exp_draminit.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -103,12 +103,12 @@ extern "C"
fapi_try_exit:
FAPI_INF("Draminit training - %s %s",
- (fapi2::current_err == fapi2::FAPI2_RC_SUCCESS ? "success" : "errors reported"),
+ (fapi2::current_err == fapi2::FAPI2_RC_SUCCESS ? "success" : "errors reported - trying to blame FIR's"),
mss::c_str(i_target));
- // TK update this to check FIR's or PLL failures - that will be updated in another commit
- // For now, return current_err
- return fapi2::current_err;
-
+ // Due to the RAS/PRD requirements, we need to check for FIR's
+ // If any FIR's have lit up, this draminit fail could have been caused by the FIR, rather than bad hardware
+ // So, let PRD retrigger this step to see if we can resolve the issue
+ return mss::check::fir_or_pll_fail<mss::mc_type::EXPLORER>(i_target, fapi2::current_err);
}
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C
index 316d7dc9b..60dc06bcc 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/ccs/ccs.C
@@ -173,7 +173,7 @@ fapi_try_exit:
// Due to the PRD update, we need to check for FIR's
// If any FIR's have lit up, this CCS fail could have been caused by the FIR
// So, let PRD retrigger this step to see if we can resolve the issue
- return mss::check::fir_or_pll_fail(i_target, fapi2::current_err);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>(i_target, fapi2::current_err);
}
///
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
index e0c36092f..889c8e013 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.C
@@ -231,7 +231,7 @@ fapi2::ReturnCode during_draminit_training( const fapi2::Target<fapi2::TARGET_TY
fapi_try_exit:
// Handle any fails seen above accordingly
- return mss::check::fir_or_pll_fail( l_mca, fapi2::current_err, l_check_fir);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>( l_mca, fapi2::current_err, l_check_fir);
}
// Declares FIR registers that are re-used between multiple functions
@@ -378,7 +378,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Note: we return out if any FIR is bad
for(const auto& l_fir_reg : MCBIST_FIR_REGS)
{
- FAPI_TRY(fir_with_mask(i_target, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(i_target, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(i_target, o_fir_error, io_rc);
@@ -395,7 +395,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
{
for(const auto& l_fir_reg : MCA_FIR_REGS)
{
- FAPI_TRY(fir_with_mask(l_mca, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(l_mca, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(l_mca, o_fir_error, io_rc);
@@ -441,7 +441,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Note: we return out if any FIR is bad
for(const auto& l_fir_reg : MCBIST_FIR_REGS)
{
- FAPI_TRY(fir_with_mask(l_mcbist, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(l_mcbist, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(l_mcbist, o_fir_error, io_rc);
@@ -456,7 +456,7 @@ fapi2::ReturnCode bad_fir_bits<mss::mc_type::NIMBUS>( const fapi2::Target<fapi2:
// Loop through all MCA FIR's
for(const auto& l_fir_reg : MCA_FIR_REGS)
{
- FAPI_TRY(fir_with_mask(i_target, l_fir_reg, o_fir_error));
+ FAPI_TRY(fir_with_mask<mss::mc_type::NIMBUS>(i_target, l_fir_reg, o_fir_error));
// Log the error if need be
log_fir_helper(i_target, o_fir_error, io_rc);
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.H b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.H
index 6bf155317..1667f9f23 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/fir/check.H
@@ -94,120 +94,6 @@ fapi2::ReturnCode pll_fir( const fapi2::Target<fapi2::TARGET_TYPE_MCBIST>& i_tar
fapi2::ReturnCode& io_rc,
bool& o_fir_error );
-///
-/// @brief Checks whether the passed in FIRs have any un-masked errors set
-/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target - the target on which to operate
-/// @param[in] i_fir_regs - FIR register and mask register
-/// @param[out] o_fir_error - true iff a FIR was hit
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template< fapi2::TargetType T >
-inline fapi2::ReturnCode fir_with_mask( const fapi2::Target<T>& i_target,
- const std::pair<uint64_t, uint64_t>& i_fir_regs,
- bool& o_fir_error )
-{
- // Temporary variables to make the code a bit more readable
- const auto FIR_REG = i_fir_regs.first;
- const auto FIR_MASK = i_fir_regs.second;
-
- fapi2::buffer<uint64_t> l_fir;
- fapi2::buffer<uint64_t> l_fir_mask;
-
- // Read the registers
- FAPI_TRY(mss::getScom(i_target, FIR_REG, l_fir));
- FAPI_TRY(mss::getScom(i_target, FIR_MASK, l_fir_mask));
-
-
- // The mask register will need to be inverted as a 0 in the mask register means the FIR is legit
- // A bitwise and works the opposite way
- l_fir_mask.invert();
-
- // If we have any unmasked bit, set that we have a FIR error and exit out with success
- // Note: we want to set success here as PRD will find the FIR as "new" and retrigger the procedure this way
- o_fir_error = ((l_fir & l_fir_mask) != 0);
-
- // And print the information for debuggability
- FAPI_INF("%s %s on reg 0x%016lx value 0x%016lx and mask 0x%016lx value 0x%016lx", mss::c_str(i_target),
- o_fir_error ? "has FIR's set" : "has no FIR's set", FIR_REG, l_fir, FIR_MASK, l_fir_mask.invert());
-
-fapi_try_exit:
- return fapi2::current_err;
-}
-
-///
-/// @brief Checks whether a FIR or unlocked PLL could be the root cause of another failure
-/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target - the target on which to operate
-/// @param[in,out] io_rc - the return code for the function
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-/// @note This is a helper function to enable unit testing
-///
-template< fapi2::TargetType T >
-fapi2::ReturnCode hostboot_fir_or_pll_fail( const fapi2::Target<T>& i_target, fapi2::ReturnCode& io_rc)
-{
- // We didn't have an error, so return success
- if(io_rc == fapi2::FAPI2_RC_SUCCESS)
- {
- FAPI_INF("%s has a good return code, returning success", mss::c_str(i_target));
- return fapi2::FAPI2_RC_SUCCESS;
- }
-
- fapi2::ReturnCode l_fircheck_scom_err(fapi2::FAPI2_RC_SUCCESS);
- bool l_fir_error = false;
-
- FAPI_ERR("%s has a bad return code, time to check some firs!", mss::c_str(i_target));
-
- l_fircheck_scom_err = bad_fir_bits<mss::mc_type::NIMBUS>(i_target, io_rc, l_fir_error);
-
- FAPI_ERR("%s took a fail. FIR was %s", mss::c_str(i_target),
- l_fir_error ? "set - returning FIR RC" : "unset - returning inputted RC");
-
- // If we had a FIR error, log the original error and return success
- // PRD will handle the original error
- if(l_fir_error)
- {
- fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
- }
- else
- {
- fapi2::current_err = io_rc;
- }
-
- return fapi2::current_err;
-}
-
-///
-/// @brief Checks whether a FIR or unlocked PLL could be the root cause of another failure, if a check fir boolean is passed in
-/// @tparam T the fapi2::TargetType which hold the FIR bits
-/// @param[in] i_target - the target on which to operate
-/// @param[in,out] io_rc - the return code for the function
-/// @param[in] i_check_fir - true IFF the FIR needs to be checked - defaults to true
-/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
-///
-template< fapi2::TargetType T >
-fapi2::ReturnCode fir_or_pll_fail( const fapi2::Target<T>& i_target,
- fapi2::ReturnCode& io_rc,
- const bool i_check_fir = true)
-{
-#ifdef __HOSTBOOT_MODULE
-
- fapi2::ReturnCode l_rc(io_rc);
-
- // If need be, check the FIR below
- if(i_check_fir)
- {
- // Handle any issues according to PRD FIR scheme, as a FIR could have caused this issue
- l_rc = hostboot_fir_or_pll_fail(i_target, l_rc);
- }
-
- return l_rc;
-
-#else
- return io_rc;
-#endif
-}
-
}
}
#endif
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index b9f8cc351..88337c26c 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -723,7 +723,7 @@ fapi_try_exit:
mss::c_str(l_mca));
// Checks the FIR's, if need be
- return mss::check::fir_or_pll_fail( l_mca, fapi2::current_err, l_check_firs);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>( l_mca, fapi2::current_err, l_check_firs);
}
///
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
index 759843cea..507f95f86 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -4324,7 +4324,7 @@ fapi2::ReturnCode process_rdvref_cal_errors( const fapi2::Target<fapi2::TARGET_T
fapi_try_exit:
// If the FIR's are cal fails, then check to see if FIRs or PLL fails were the cause
- return mss::check::fir_or_pll_fail( l_mca, fapi2::current_err, l_cal_fail);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>( l_mca, fapi2::current_err, l_cal_fail);
}
///
@@ -4426,7 +4426,7 @@ fapi2::ReturnCode process_wrvref_cal_errors( const fapi2::Target<fapi2::TARGET_T
fapi_try_exit:
// If the FIR's are cal fails, then check to see if FIR's were the cause
- return mss::check::fir_or_pll_fail( l_mca, fapi2::current_err, l_cal_fail);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>( l_mca, fapi2::current_err, l_cal_fail);
}
///
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C
index 386765b3d..798447c83 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/workarounds/dp16_workarounds.C
@@ -634,7 +634,7 @@ fapi2::ReturnCode dqs_align_workaround(const fapi2::Target<fapi2::TARGET_TYPE_MC
fapi_try_exit:
// If the FIR's are cal fails, then check to see if FIR's or PLL's could be the cause
- return mss::check::fir_or_pll_fail(i_target, fapi2::current_err, l_cal_fail);
+ return mss::check::fir_or_pll_fail<mss::mc_type::NIMBUS>(i_target, fapi2::current_err, l_cal_fail);
}
///
diff --git a/src/import/generic/memory/lib/utils/mss_generic_check.H b/src/import/generic/memory/lib/utils/mss_generic_check.H
index be9e12f14..f31440e14 100644
--- a/src/import/generic/memory/lib/utils/mss_generic_check.H
+++ b/src/import/generic/memory/lib/utils/mss_generic_check.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -38,6 +38,7 @@
#include <fapi2.H>
#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#include <generic/memory/lib/utils/scom.H>
#include <generic/memory/lib/utils/c_str.H>
namespace mss
@@ -58,6 +59,123 @@ template< mss::mc_type MC, fapi2::TargetType T >
fapi2::ReturnCode bad_fir_bits( const fapi2::Target<T>& i_target, fapi2::ReturnCode& io_rc, bool& o_fir_error );
///
+/// @brief Checks whether the passed in FIRs have any un-masked errors set
+/// @tparam MC MC type for which to check FIR's
+/// @tparam T the fapi2::TargetType which hold the FIR bits
+/// @param[in] i_target - the target on which to operate
+/// @param[in] i_fir_regs - FIR register and mask register
+/// @param[out] o_fir_error - true iff a FIR was hit
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC, fapi2::TargetType T >
+inline fapi2::ReturnCode fir_with_mask( const fapi2::Target<T>& i_target,
+ const std::pair<uint64_t, uint64_t>& i_fir_regs,
+ bool& o_fir_error )
+{
+ // Temporary variables to make the code a bit more readable
+ const auto FIR_REG = i_fir_regs.first;
+ const auto FIR_MASK = i_fir_regs.second;
+
+ fapi2::buffer<uint64_t> l_fir;
+ fapi2::buffer<uint64_t> l_fir_mask;
+
+ // Read the registers
+ FAPI_TRY(mss::getScom(i_target, FIR_REG, l_fir));
+ FAPI_TRY(mss::getScom(i_target, FIR_MASK, l_fir_mask));
+
+
+ // The mask register will need to be inverted as a 0 in the mask register means the FIR is legit
+ // A bitwise and works the opposite way
+ l_fir_mask.invert();
+
+ // If we have any unmasked bit, set that we have a FIR error and exit out with success
+ // Note: we want to set success here as PRD will find the FIR as "new" and retrigger the procedure this way
+ o_fir_error = ((l_fir & l_fir_mask) != 0);
+
+ // And print the information for debuggability
+ FAPI_INF("%s %s on reg 0x%016lx value 0x%016lx and mask 0x%016lx value 0x%016lx", mss::c_str(i_target),
+ o_fir_error ? "has FIR's set" : "has no FIR's set", FIR_REG, l_fir, FIR_MASK, l_fir_mask.invert());
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Checks whether a FIR or unlocked PLL could be the root cause of another failure
+/// @tparam MC MC type for which to check FIR's
+/// @tparam T the fapi2::TargetType which hold the FIR bits
+/// @param[in] i_target - the target on which to operate
+/// @param[in,out] io_rc - the return code for the function
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+/// @note This is a helper function to enable unit testing
+///
+template< mss::mc_type MC, fapi2::TargetType T >
+fapi2::ReturnCode hostboot_fir_or_pll_fail( const fapi2::Target<T>& i_target, fapi2::ReturnCode& io_rc)
+{
+ // We didn't have an error, so return success
+ if(io_rc == fapi2::FAPI2_RC_SUCCESS)
+ {
+ FAPI_INF("%s has a good return code, returning success", mss::c_str(i_target));
+ return fapi2::FAPI2_RC_SUCCESS;
+ }
+
+ fapi2::ReturnCode l_fircheck_scom_err(fapi2::FAPI2_RC_SUCCESS);
+ bool l_fir_error = false;
+
+ FAPI_ERR("%s has a bad return code, time to check some firs!", mss::c_str(i_target));
+
+ l_fircheck_scom_err = bad_fir_bits<MC>(i_target, io_rc, l_fir_error);
+
+ FAPI_ERR("%s took a fail. FIR was %s", mss::c_str(i_target),
+ l_fir_error ? "set - returning FIR RC" : "unset - returning inputted RC");
+
+ // If we had a FIR error, log the original error and return success
+ // PRD will handle the original error
+ if(l_fir_error)
+ {
+ fapi2::current_err = fapi2::FAPI2_RC_SUCCESS;
+ }
+ else
+ {
+ fapi2::current_err = io_rc;
+ }
+
+ return fapi2::current_err;
+}
+
+///
+/// @brief Checks whether a FIR or unlocked PLL could be the root cause of another failure, if a check fir boolean is passed in
+/// @tparam MC MC type for which to check FIR's
+/// @tparam T the fapi2::TargetType which hold the FIR bits
+/// @param[in] i_target - the target on which to operate
+/// @param[in,out] io_rc - the return code for the function
+/// @param[in] i_check_fir - true IFF the FIR needs to be checked - defaults to true
+/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS iff ok
+///
+template< mss::mc_type MC, fapi2::TargetType T >
+fapi2::ReturnCode fir_or_pll_fail( const fapi2::Target<T>& i_target,
+ fapi2::ReturnCode& io_rc,
+ const bool i_check_fir = true)
+{
+#ifdef __HOSTBOOT_MODULE
+
+ fapi2::ReturnCode l_rc(io_rc);
+
+ // If need be, check the FIR below
+ if(i_check_fir)
+ {
+ // Handle any issues according to PRD FIR scheme, as a FIR could have caused this issue
+ l_rc = hostboot_fir_or_pll_fail<MC>(i_target, l_rc);
+ }
+
+ return l_rc;
+
+#else
+ return io_rc;
+#endif
+}
+
+///
/// @brief Checks conditional passes and implements traces & exits if it fails
/// @tparam T fapi2 target type
/// @tparam IT input data type
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