diff options
| -rw-r--r-- | src/include/usr/hwpf/plat/fapiPlatAttributeService.H | 28 | ||||
| -rw-r--r-- | src/usr/hwpf/plat/fapiPlatAttributeService.C | 48 | ||||
| -rwxr-xr-x | src/usr/targeting/common/genHwsvMrwXml.pl | 17 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 104 | ||||
| -rw-r--r-- | src/usr/targeting/common/xmltohb/target_types.xml | 7 |
5 files changed, 90 insertions, 114 deletions
diff --git a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H index c09c6c2bd..a0f8723a7 100644 --- a/src/include/usr/hwpf/plat/fapiPlatAttributeService.H +++ b/src/include/usr/hwpf/plat/fapiPlatAttributeService.H @@ -203,6 +203,20 @@ fapi::ReturnCode fapiPlatGetFunctional(const fapi::Target * i_pTarget, fapi::ReturnCode fapiPlatGetTargetPos(const fapi::Target * i_pFapiTarget, uint32_t & o_pos); +/** + * @brief This function is called by the FAPI_ATTR_GET macro when getting + * ATTR_PROC_NX_ENABLE, ATTR_PROC_PCIE_ENABLE, ATTR_PROC_L3_ENABLE, + * ATTR_PROC_A_ENABLE, and ATTR_PROC_X_ENABLE. + * It should not be called directly + * + * @param[in] i_id Fapi Attribute Id + * @param[in] i_pFapiTarget Target pointer + * @param[out] o_enable Output enable state + * @return ReturnCode. Zero on success, else platform specified error + */ +fapi::ReturnCode fapiPlatGetEnableAttr( fapi::AttributeId i_id, + const fapi::Target * i_pFapiTarget, uint8_t & o_enable ); + //------------------------------------------------------------------------------ // Prototypes to support proc_setup_bars_memory_attributes // See proc_setup_bars_memory_attributes.xml for detailed descriptions @@ -607,6 +621,18 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize ( // MACROS to support proc_fab_smp_fabric_attributes.xml //------------------------------------------------------------------------------ - +//------------------------------------------------------------------------------ +// MACROS to support enable attributes in p8_xip_customize_attributes.xml +//------------------------------------------------------------------------------ +#define ATTR_PROC_NX_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::platAttrSvc::fapiPlatGetEnableAttr ( fapi::ID, PTARGET, VAL ) +#define ATTR_PROC_PCIE_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::platAttrSvc::fapiPlatGetEnableAttr ( fapi::ID, PTARGET, VAL ) +#define ATTR_PROC_L3_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::platAttrSvc::fapiPlatGetEnableAttr ( fapi::ID, PTARGET, VAL ) +#define ATTR_PROC_A_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::platAttrSvc::fapiPlatGetEnableAttr ( fapi::ID, PTARGET, VAL ) +#define ATTR_PROC_X_ENABLE_GETMACRO( ID, PTARGET, VAL ) \ + fapi::platAttrSvc::fapiPlatGetEnableAttr ( fapi::ID, PTARGET, VAL ) #endif // FAPIPLATATTRIBUTESERVICE_H_ diff --git a/src/usr/hwpf/plat/fapiPlatAttributeService.C b/src/usr/hwpf/plat/fapiPlatAttributeService.C index ec260b919..af4a17ef0 100644 --- a/src/usr/hwpf/plat/fapiPlatAttributeService.C +++ b/src/usr/hwpf/plat/fapiPlatAttributeService.C @@ -33,13 +33,12 @@ #include <hwpf/fapi/fapiTarget.H> #include <targeting/common/targetservice.H> +#include <targeting/common/utilFilter.H> #include <errl/errlentry.H> #include <hwpf/plat/fapiPlatAttributeService.H> #include <hwpf/hwpf_reasoncodes.H> #include <vpd/spdenums.H> #include <devicefw/driverif.H> -#include <hwas/common/hwas.H> -#include <hwas/common/hwasCommon.H> // The following file checks at compile time that all HWPF attributes are // handled by Hostboot. This is done to ensure that the HTML file listing @@ -1423,6 +1422,51 @@ fapi::ReturnCode fapiPlatGetProcPcieBarSize ( return l_fapirc; } +fapi::ReturnCode fapiPlatGetEnableAttr ( fapi::AttributeId i_id, + const fapi::Target * i_pTarget, uint8_t & o_enable ) +{ + fapi::ReturnCode l_rc; + TARGETING::Target * l_pTarget = NULL; + + // Get the Hostboot Target + l_rc = getHostbootTarget(i_pTarget, l_pTarget); + + if (l_rc.ok()) + { + TARGETING::TargetHandleList l_buses; + switch (i_id) + { + case fapi::ATTR_PROC_NX_ENABLE: + case fapi::ATTR_PROC_L3_ENABLE: + // The enable flag is based on the target's functional state + TARGETING::HwasState hwasState; + hwasState = l_pTarget->getAttr<TARGETING::ATTR_HWAS_STATE>(); + o_enable = hwasState.functional; + break; + case fapi::ATTR_PROC_PCIE_ENABLE: + // The enable flag is 1 if one of the pci target is functional + getChildChiplets( l_buses, l_pTarget, TARGETING::TYPE_PCI ); + o_enable = l_buses.size() ? 1 : 0; + break; + case fapi::ATTR_PROC_A_ENABLE: + // The enable flag is 1 if one of the abus target is functional + getChildChiplets( l_buses, l_pTarget, TARGETING::TYPE_ABUS ); + o_enable = l_buses.size() ? 1 : 0; + break; + case fapi::ATTR_PROC_X_ENABLE: + // The enable flag is 1 if one of the xbus target is functioanl + getChildChiplets( l_buses, l_pTarget, TARGETING::TYPE_XBUS ); + o_enable = l_buses.size() ? 1 : 0; + break; + default: + o_enable = 0; + break; + } + } + + return l_rc; +} + } // End platAttrSvc namespace } // End fapi namespace diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl index 30ecc5f93..b63662877 100755 --- a/src/usr/targeting/common/genHwsvMrwXml.pl +++ b/src/usr/targeting/common/genHwsvMrwXml.pl @@ -91,6 +91,20 @@ if ($outFile ne "") my $SYSNAME = uc($sysname); +# Quick patch to support platform specific setting for DMI_REFCLOCK_SWIZZLE +# attributes for MCS target. This quick patch assumes all procs have the +# same swizzled wiring +# TODO. This will be remove when MRW provide the settings in system specific +# xml file. RTC 65460 +my @DmiRefClockSwizzle = [ 0, 1, 2, 3, 4, 5, 6, 7 ]; +if ($SYSNAME eq "TULETA") +{ + $DmiRefClockSwizzle[4] = 7; + $DmiRefClockSwizzle[5] = 6; + $DmiRefClockSwizzle[6] = 5; + $DmiRefClockSwizzle[7] = 4; +} + open (FH, "<$mrwdir/${sysname}-system-policy.xml") || die "ERROR: unable to open $mrwdir/${sysname}-system-policy.xml\n"; close (FH); @@ -1723,6 +1737,9 @@ sub generate_mcs <!-- baseAddr = 0x0003E00000000000, 128GB per MCS --> <default>$mscStr</default> </attribute> + <attribute><id>DMI_REFCLOCK_SWIZZLE</id> + <default>$DmiRefClockSwizzle[$mcs]</default> + </attribute> <!-- TODO When MRW provides the information, these two attributes should be included. values of X come from MRW. <attribute> diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index c77b8585b..74165ffba 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -5558,25 +5558,6 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>PROC_NX_ENABLE</id> - <description> - NX partial good control - creator: platform - firmware notes: - must track ATTR_CHIP_REGIONS_TO_ENABLE - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_NX_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>BOOT_FREQ_MHZ</id> <description> Boot frequency in MHZ. Default is 50% of nominal. @@ -5596,25 +5577,6 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>PROC_PCIE_ENABLE</id> - <description> - PCIE partial good control - creator: platform - firmware notes: - must track ATTR_CHIP_REGIONS_TO_ENABLE - </description> - <simpleType> - <uint8_t><default>1</default></uint8_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_PCIE_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>EX_GARD_BITS</id> <description> Vector to communicate the guarded EX chiplets to SBE @@ -5637,25 +5599,6 @@ firmware notes: Used as override attribute for pstate procedure </attribute> <attribute> - <id>PROC_L3_ENABLE</id> - <description> - L3 partial good control - creator: platform - firmware notes: - must track ATTR_CHIP_REGIONS_TO_ENABLE - </description> - <simpleType> - <uint8_t></uint8_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_L3_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> <id>PIB_I2C_REFCLOCK</id> <description> i2c reference clock for the system. @@ -9986,53 +9929,6 @@ Measured in GB</description> <!-- ===== End supporting poreve_memory_attributes.xml ===== --> -<!-- ===== Supporting A/X bus enable in p8_xip_customize_attributes.xml ===== --> -<attribute> - <id>PROC_A_ENABLE</id> - <description>ABUS chiplet partial good control - creator: platform - firmware notes: - must track ATTR_CHIP_REGIONS_TO_ENABLE - </description> - <simpleType> - <uint8_t> -<!-- Hostboot doesn't support A/X regional partial good ===== --> - <default>1</default> - </uint8_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_A_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<attribute> - <id>PROC_X_ENABLE</id> - <description>XBUS chiplet partial good control - creator: platform - firmware notes: - must track ATTR_CHIP_REGIONS_TO_ENABLE - </description> - <simpleType> - <uint8_t> -<!-- Hostboot doesn't support A/X regional partial good ===== --> - <default>1</default> - </uint8_t> - </simpleType> - <persistency>volatile</persistency> - <readable/> - <writeable/> - <hwpfToHbAttrMap> - <id>ATTR_PROC_X_ENABLE</id> - <macro>DIRECT</macro> - </hwpfToHbAttrMap> -</attribute> - -<!-- ===== End supporting A/X bus enable in p8_xip_customize_attributes.xml ===== --> - <!-- Support for sync_attributes.xml --> <attribute> <id>SYNC_BETWEEN_STEPS</id> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 2bc56c6bf..fe139537b 100644 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -351,10 +351,6 @@ <attribute><id>SBE_SEEPROM_I2C_PORT</id></attribute> <attribute><id>PNOR_I2C_ADDRESS_BYTES</id></attribute> <!-- End Supporting poreve_memory_attributes.xml --> - <!-- ===== Begin supporting A/X bus enable in p8_xip_customize_attributes.xml ===== --> - <attribute><id>PROC_A_ENABLE</id></attribute> - <attribute><id>PROC_X_ENABLE</id></attribute> - <!-- ===== End supporting A/X bus enable in p8_xip_customize_attributes.xml ===== --> </targetType> @@ -400,8 +396,6 @@ <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute> <attribute><id>PROC_DCM_INSTALLED</id></attribute> <attribute><id>CHIP_REGIONS_TO_ENABLE</id></attribute> - <attribute><id>PROC_NX_ENABLE</id></attribute> - <attribute><id>PROC_PCIE_ENABLE</id></attribute> <attribute><id>PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id></attribute> <attribute><id>PROC_ADU_UNTRUSTED_BAR_SIZE</id></attribute> <attribute><id>PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id></attribute> @@ -519,7 +513,6 @@ <attribute><id>OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id></attribute> <attribute><id>OVERRIDE_MVPD_I_CS_LAB_CURRENT</id></attribute> <!-- End pm_attributes_all_hwp.xml --> - <attribute><id>PROC_L3_ENABLE</id></attribute> </targetType> <targetType> |
