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-rw-r--r--src/include/usr/util/utiltce.H9
-rw-r--r--src/usr/dump/dumpCollect.C47
-rw-r--r--src/usr/util/utiltcemgr.C17
-rw-r--r--src/usr/util/utiltcemgr.H9
4 files changed, 68 insertions, 14 deletions
diff --git a/src/include/usr/util/utiltce.H b/src/include/usr/util/utiltce.H
index f77d005f8..853365d4d 100644
--- a/src/include/usr/util/utiltce.H
+++ b/src/include/usr/util/utiltce.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2017 */
+/* Contributors Listed Below - COPYRIGHT 2013,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -56,12 +56,17 @@ namespace TCE
* FSP uses the token as a DMA Address.
* Each TCE entry maps to a pagesize of memory.
*
+ * @param[in] i_rwNotRO - TRUE to create TCEs in read-write mode;
+ * FALSE for read-only mode
+ * Default is TRUE (read-write mode)
+ *
* @return errlHndl_t - Return Error Handle if failed
*
*/
errlHndl_t utilAllocateTces(uint64_t i_startingAddress,
size_t i_size,
- uint32_t& o_startingToken);
+ uint32_t& o_startingToken,
+ const bool i_rwNotRO = true);
/**
* @brief Responsible for deallocating TCEs
diff --git a/src/usr/dump/dumpCollect.C b/src/usr/dump/dumpCollect.C
index 816963cf8..1e9ed819e 100644
--- a/src/usr/dump/dumpCollect.C
+++ b/src/usr/dump/dumpCollect.C
@@ -5,7 +5,9 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* COPYRIGHT International Business Machines Corp. 2012,2014 */
+/* Contributors Listed Below - COPYRIGHT 2012,2018 */
+/* [+] International Business Machines Corp. */
+/* */
/* */
/* Licensed under the Apache License, Version 2.0 (the "License"); */
/* you may not use this file except in compliance with the License. */
@@ -36,6 +38,7 @@
#include <util/align.H>
#include <sys/mm.h>
#include <dump/dumpif.H>
+#include <util/utiltce.H>
#include <sys/msg.h> // message Q's
#include <mbox/mbox_queues.H> //
@@ -833,7 +836,44 @@ errlHndl_t copySrcToDest(dumpEntry *srcTableEntry,
uint64_t l_mdrt_phys =
mm_virt_to_phys(
reinterpret_cast<void*>(resultsTableAddr));
- msg->data[0] = l_mdrt_phys;
+
+ // If TCEs are enabled setup TCEs in TCE Table to allow
+ // the FSP to read this memory
+ if (TCE::utilUseTcesForDmas())
+ {
+ // Align Physical addr down for TCE requirement
+ uint64_t mdrt_phyp_aligned =
+ ALIGN_PAGE_DOWN(l_mdrt_phys);
+
+ uint64_t offset = l_mdrt_phys - mdrt_phyp_aligned;
+
+ TRACFCOMP( g_trac_dump,"Setup TCEs for FSP to use for "
+ "l_mdrt_phys=0x%.16llX (virt=0x%.16llX, "
+ "aligned_phys=0x%.16llX, offset=0x%X)",
+ l_mdrt_phys, resultsTableAddr,
+ mdrt_phyp_aligned, offset);
+
+ uint32_t token = 0;
+ l_err = TCE::utilAllocateTces(mdrt_phyp_aligned,
+ resultsTableSize+offset,
+ token,
+ false); //Read-Only
+
+ if (l_err)
+ {
+ // Got an errorlog back from utilAllocateTces
+ TRACFCOMP(g_trac_dump, "HBDumpGetHostData utilAllocateTces failed rc=0x%X", l_err->reasonCode());
+ }
+ else
+ {
+ // Put the token with the offset into the msg
+ msg->data[0] = token + offset;
+ }
+ }
+ else
+ {
+ msg->data[0] = l_mdrt_phys;
+ }
// Number of bytes in the results table
msg->data[1] = resultsTableSize;
@@ -842,7 +882,8 @@ errlHndl_t copySrcToDest(dumpEntry *srcTableEntry,
msg->extra_data = NULL;
}
- else
+
+ if (l_err)
{
TRACFCOMP( g_trac_dump,
INFO_MRK"Got an error trying to send msg. %.8X,",
diff --git a/src/usr/util/utiltcemgr.C b/src/usr/util/utiltcemgr.C
index 0cf802cd4..e61ae4ca5 100644
--- a/src/usr/util/utiltcemgr.C
+++ b/src/usr/util/utiltcemgr.C
@@ -78,11 +78,13 @@ namespace TCE
/************************************************************************/
errlHndl_t utilAllocateTces(const uint64_t i_startingAddress,
const size_t i_size,
- uint32_t& o_startingToken)
+ uint32_t& o_startingToken,
+ const bool i_rwNotRO)
{
return Singleton<UtilTceMgr>::instance().allocateTces(i_startingAddress,
i_size,
- o_startingToken);
+ o_startingToken,
+ i_rwNotRO);
};
/************************************************************************/
@@ -583,7 +585,8 @@ errlHndl_t UtilTceMgr::initTceInHdw()
/************************************************************************/
errlHndl_t UtilTceMgr::allocateTces(const uint64_t i_startingAddress,
const size_t i_size,
- uint32_t& o_startingToken)
+ uint32_t& o_startingToken,
+ const bool i_rwNotRO)
{
errlHndl_t errl = nullptr;
uint32_t numTcesNeeded = 0;
@@ -591,7 +594,7 @@ errlHndl_t UtilTceMgr::allocateTces(const uint64_t i_startingAddress,
TceEntry_t *tablePtr = nullptr;
- TRACFCOMP(g_trac_tce,ENTER_MRK"UtilTceMgr::allocateTces: start for addr = 0x%.16llX and size = 0x%X", i_startingAddress, i_size);
+ TRACFCOMP(g_trac_tce,ENTER_MRK"UtilTceMgr::allocateTces: start for addr = 0x%.16llX , size = 0x%X, rwNorRO=%d", i_startingAddress, i_size, i_rwNotRO);
do
{
@@ -811,7 +814,11 @@ errlHndl_t UtilTceMgr::allocateTces(const uint64_t i_startingAddress,
{
tablePtr[index].realPageNumber = (i_startingAddress +
(i*PAGESIZE))/PAGESIZE;
- tablePtr[index].writeAccess = 1;
+
+ if (i_rwNotRO)
+ {
+ tablePtr[index].writeAccess = 1;
+ }
tablePtr[index].readAccess = 1;
TRACDCOMP(g_trac_tce,INFO_MRK"UtilTceMgr::allocateTces: TCE Entry/Token[%d] (hex) = 0x%llX", index, tablePtr[index]);
diff --git a/src/usr/util/utiltcemgr.H b/src/usr/util/utiltcemgr.H
index 9bb643dbf..490f10e2e 100644
--- a/src/usr/util/utiltcemgr.H
+++ b/src/usr/util/utiltcemgr.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2013,2017 */
+/* Contributors Listed Below - COPYRIGHT 2013,2018 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -254,9 +254,10 @@ class UtilTceMgr
* - see utiltce.H for details
*
*/
- errlHndl_t allocateTces(uint64_t i_startingAddress,
- size_t i_size,
- uint32_t& o_startingToken);
+ errlHndl_t allocateTces(uint64_t i_startingAddress,
+ size_t i_size,
+ uint32_t& o_startingToken,
+ const bool i_rwNotRO);
/**
* @brief Responsible for deallocating TCEs
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