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authorMark Pizzutillo <Mark.Pizzutillo@ibm.com>2019-05-28 13:51:56 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-06-14 12:40:18 -0500
commitcd1e2c047b789c0f236233a4409233a6dc0379df (patch)
treefa953e8247aec9b9ca8fa06d1bfe0b6f731c9e64 /src
parent06b50f0ecc2b7865d241e3f54911340a69aecfda (diff)
downloadtalos-hostboot-cd1e2c047b789c0f236233a4409233a6dc0379df.tar.gz
talos-hostboot-cd1e2c047b789c0f236233a4409233a6dc0379df.zip
Add EFD processing to pmic_enable
Change-Id: Id63239a4231e14a1d5e12321cd5aada2ca9c1705 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77944 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/78268 Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_attr_engine_traits.H449
-rw-r--r--src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.C253
-rw-r--r--src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.H122
-rw-r--r--src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H224
-rw-r--r--src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H183
-rw-r--r--src/import/chips/ocmb/common/procedures/xml/attribute_info/pmic_eff_attributes.xml242
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C2
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C5
-rw-r--r--src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk1
-rw-r--r--src/import/generic/memory/lib/spd/ddimm/ddr4/efd_ddr4_custom_microchip_decoder.H94
-rw-r--r--src/import/generic/memory/lib/spd/ddimm/ddr4/efd_fields_ddr4.H96
-rw-r--r--src/import/generic/memory/lib/spd/ddimm/ddr4/efd_traits_ddr4.H104
-rw-r--r--src/import/generic/memory/lib/spd/ddimm/efd_decoder.H67
13 files changed, 927 insertions, 915 deletions
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_attr_engine_traits.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_attr_engine_traits.H
index a0d2cf2cd..4f5d51df3 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_attr_engine_traits.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_attr_engine_traits.H
@@ -39,6 +39,7 @@
#include <fapi2.H>
#include <lib/utils/pmic_consts.H>
+#include <lib/eff_config/pmic_efd_processing.H>
#include <generic/memory/lib/data_engine/data_engine_traits_def.H>
#include <generic/memory/lib/data_engine/data_engine.H>
#include <generic/memory/lib/spd/spd_facade.H>
@@ -307,57 +308,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWA_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swa_pmic0(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic0_swa_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swa_pmic0(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swa_pmic0(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic0_swa_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swa_pmic0(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -607,57 +566,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWB_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swb_pmic0(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic0_swb_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swb_pmic0(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swb_pmic0(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic0_swb_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swb_pmic0(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -908,57 +825,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWC_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swc_pmic0(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic0_swc_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swc_pmic0(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swc_pmic0(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic0_swc_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swc_pmic0(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -1209,57 +1084,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWD_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swd_pmic0(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic0_swd_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swd_pmic0(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swd_pmic0(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic0_swd_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swd_pmic0(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -1614,57 +1447,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWA_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swa_pmic1(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic1_swa_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swa_pmic1(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swa_pmic1(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic1_swa_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swa_pmic1(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -1914,57 +1705,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWB_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swb_pmic1(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic1_swb_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swb_pmic1(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swb_pmic1(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic1_swb_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swb_pmic1(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -2214,57 +1963,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWC_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swc_pmic1(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic1_swc_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swc_pmic1(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swc_pmic1(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic1_swc_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swc_pmic1(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
@@ -2514,57 +2221,15 @@ struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWD_VOLTAGE_OF
static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
attr_integral_type& o_setting)
{
- return i_spd_data.volt_offset_swd_pmic1(o_setting);
- }
-};
-
-//
-/// @brief Traits for attr_engine
-/// @class attrEngineTraits
-/// @note attr_eff_engine_fields, PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION specialization
-///
-template<>
-struct attrEngineTraits<pmic::attr_eff_engine_fields, pmic::PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION>
-{
- using attr_type = fapi2::ATTR_MEM_EFF_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION_Type;
- using attr_integral_type = std::remove_all_extents<attr_type>::type;
- static constexpr fapi2::TargetType TARGET_TYPE = fapi2::ATTR_MEM_EFF_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION_TargetType;
- static constexpr pmic::ffdc_codes FFDC_CODE = pmic::SET_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION;
-
- ///
- /// @brief attribute getter
- /// @param[in] i_target the fapi2 target
- /// @param[out] o_setting array to populate
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& o_setting)
- {
- return attr::get_pmic1_swd_voltage_offset_direction(i_target, o_setting);
- }
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_spd_data.volt_offset_swd_pmic1(l_offset));
+ FAPI_TRY(i_spd_data.volt_offset_direction_swd_pmic1(l_direction));
- ///
- /// @brief attribute setter
- /// @param[in] i_target the fapi2 target
- /// @param[in] i_setting array to set
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode set_attr(const fapi2::Target<TARGET_TYPE>& i_target,
- attr_type& i_setting)
- {
- return attr::set_pmic1_swd_voltage_offset_direction(i_target, i_setting);
- }
+ o_setting = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
- ///
- /// @brief Computes setting for attribute
- /// @param[in] i_spd_data EFD data
- /// @param[out] o_setting value we want to set attr with
- /// @return FAPI2_RC_SUCCESS iff okay
- ///
- static fapi2::ReturnCode get_value_to_set(const spd::facade& i_spd_data,
- attr_integral_type& o_setting)
- {
- return i_spd_data.volt_offset_direction_swd_pmic1(o_setting);
+ fapi_try_exit:
+ return fapi2::current_err;
}
};
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.C b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.C
index b0001c9cb..58bbc9aa2 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.C
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.C
@@ -22,3 +22,256 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+///
+/// @file pmic_efd_processing.C
+/// @brief Processing for EFD for eff config
+///
+
+// *HWP HWP Owner: Mark Pizzutillo Mark.Pizzutillo@ibm.com>
+// *HWP FW Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: HB:CI
+
+#include <fapi2.H>
+#include <generic/memory/lib/data_engine/data_engine_traits_def.H>
+#include <generic/memory/lib/data_engine/data_engine.H>
+#include <generic/memory/lib/spd/spd_facade.H>
+#include <lib/mss_pmic_attribute_setters.H>
+#include <lib/eff_config/pmic_efd_processing.H>
+#include <lib/utils/pmic_consts.H>
+#include <lib/utils/pmic_common_utils.H>
+
+namespace mss
+{
+namespace pmic
+{
+
+///
+/// @brief Convert unsigned offset from SPD to signed offset for attributes
+///
+/// @param[in] i_offset - unsigned offset
+/// @param[in] i_direction - direction
+/// @return int8_t signed equivalent
+/// @note Should be used with SPD data where the offset is 7 bits such that overflow could not be possible
+///
+int8_t convert_to_signed_offset(const uint8_t i_offset, const uint8_t i_direction)
+{
+ // Since offset value must be 7 bits (from SPD), we can directly cast it to an int8_t
+ int8_t l_signed_offset = static_cast<int8_t>(i_offset);
+
+ if (i_direction == CONSTS::OFFSET_MINUS)
+ {
+ // Can't overflow since signed_offset was only 7 bits
+ l_signed_offset = 0 - l_signed_offset;
+ }
+
+ return l_signed_offset;
+}
+
+namespace efd
+{
+
+using CONSTS = mss::pmic::consts<mss::pmic::product::JEDEC_COMPLIANT>;
+///
+/// @brief Processes the EFD PMIC0 SWA Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swa_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic0_swa_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic0_swa_offset_direction(l_direction));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic0_swa_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC0 SWB Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swb_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic0_swb_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic0_swb_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic0_swb_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC0 SWC Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swc_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic0_swc_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic0_swc_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic0_swc_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC0 SWD Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swd_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic0_swd_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic0_swd_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic0_swd_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC1 SWA Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swa_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic1_swa_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic1_swa_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic1_swa_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC1 SWB Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swb_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic1_swb_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic1_swb_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic1_swb_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC1 SWC Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swc_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic1_swc_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic1_swc_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic1_swc_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Processes the EFD PMIC1 SWD Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swd_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ uint8_t l_offset = 0;
+ uint8_t l_direction = 0;
+ FAPI_TRY(i_efd_data->pmic1_swd_offset(l_offset));
+ FAPI_TRY(i_efd_data->pmic1_swd_offset_direction(l_offset));
+ {
+ int8_t l_signed_offset = mss::pmic::convert_to_signed_offset(l_offset, l_direction);
+ FAPI_TRY(mss::attr::set_efd_pmic1_swd_voltage_offset(i_target, l_signed_offset));
+ }
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+///
+/// @brief Process the EFD data and set attributes
+/// @param[in] i_target DIMM target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode process(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data)
+{
+ FAPI_TRY(pmic0_swa_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic0_swb_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic0_swc_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic0_swd_voltage_offset(i_target, i_efd_data));
+
+ FAPI_TRY(pmic1_swa_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic1_swb_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic1_swc_voltage_offset(i_target, i_efd_data));
+ FAPI_TRY(pmic1_swd_voltage_offset(i_target, i_efd_data));
+
+fapi_try_exit:
+ return fapi2::current_err;
+}
+
+} // efd
+} // pmic
+} // mss
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.H
index d2ae165e3..9a6997889 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/eff_config/pmic_efd_processing.H
@@ -22,3 +22,125 @@
/* permissions and limitations under the License. */
/* */
/* IBM_PROLOG_END_TAG */
+///
+/// @file pmic_efd_processing.H
+/// @brief Processing for EFD for eff config
+///
+
+// *HWP HWP Owner: Mark Pizzutillo <Mark.Pizzutillo@ibm.com>
+// *HWP FW Owner: Stephen Glancy <sglancy@us.ibm.com>
+// *HWP Team: Memory
+// *HWP Level: 2
+// *HWP Consumed by: HB:CI
+
+#ifndef _MSS_PMIC_EFD_PROCESSING_H_
+#define _MSS_PMIC_EFD_PROCESSING_H_
+
+#include <fapi2.H>
+#include <generic/memory/lib/data_engine/data_engine_traits_def.H>
+#include <generic/memory/lib/data_engine/data_engine.H>
+#include <generic/memory/lib/spd/spd_facade.H>
+
+namespace mss
+{
+namespace pmic
+{
+
+///
+/// @brief Convert unsigned offset from SPD to signed offset for attributes
+///
+/// @param[in] i_offset - unsigned offset
+/// @param[in] i_direction - direction
+/// @return int8_t signed equivalent
+/// @note Should be used with SPD data where the offset is 7 bits such that overflow could not be possible
+///
+int8_t convert_to_signed_offset(const uint8_t i_offset, const uint8_t i_direction);
+
+namespace efd
+{
+
+///
+/// @brief Processes the EFD PMIC0 SWA Voltage Offset & Direction
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swa_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC0 SWB Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swb_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC0 SWC Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swc_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC0 SWD Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic0_swd_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC1 SWA Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swa_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC1 SWB Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swb_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC1 SWC Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swc_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Processes the EFD PMIC1 SWD Voltage Offset
+/// @param[in] i_target the target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode pmic1_swd_voltage_offset(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+///
+/// @brief Process the EFD data and set attributes
+/// @param[in] i_target DIMM target on which to operate
+/// @param[in] i_efd_data the EFD data to process
+/// @return fapi2::FAPI2_RC_SUCCESS iff function completes successfully
+///
+fapi2::ReturnCode process(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const std::shared_ptr<mss::efd::base_decoder>& i_efd_data);
+
+} // ns efd
+} // ns exp
+} // ns mss
+#endif
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
index addf8ca6b..e19dea87c 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_consts.H
@@ -103,66 +103,58 @@ enum attr_eff_engine_fields
PMIC0_SWA_VOLTAGE_SETTING = 1,
PMIC0_SWA_VOLTAGE_RANGE_SELECT = 2,
PMIC0_SWA_VOLTAGE_OFFSET = 3,
- PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION = 4,
- PMIC0_SWA_SEQUENCE_DELAY = 5,
- PMIC0_SWA_SEQUENCE_ORDER = 6,
-
- PMIC0_SWB_VOLTAGE_SETTING = 7,
- PMIC0_SWB_VOLTAGE_RANGE_SELECT = 8,
- PMIC0_SWB_VOLTAGE_OFFSET = 9,
- PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION = 10,
- PMIC0_SWB_SEQUENCE_DELAY = 11,
- PMIC0_SWB_SEQUENCE_ORDER = 12,
-
- PMIC0_SWC_VOLTAGE_SETTING = 13,
- PMIC0_SWC_VOLTAGE_RANGE_SELECT = 14,
- PMIC0_SWC_VOLTAGE_OFFSET = 15,
- PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION = 16,
- PMIC0_SWC_SEQUENCE_DELAY = 17,
- PMIC0_SWC_SEQUENCE_ORDER = 18,
-
- PMIC0_SWD_VOLTAGE_SETTING = 19,
- PMIC0_SWD_VOLTAGE_RANGE_SELECT = 20,
- PMIC0_SWD_VOLTAGE_OFFSET = 21,
- PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION = 22,
- PMIC0_SWD_SEQUENCE_DELAY = 23,
- PMIC0_SWD_SEQUENCE_ORDER = 24,
-
- PMIC1_SWA_VOLTAGE_SETTING = 25,
- PMIC1_SWA_VOLTAGE_RANGE_SELECT = 26,
- PMIC1_SWA_VOLTAGE_OFFSET = 27,
- PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION = 28,
- PMIC1_SWA_SEQUENCE_DELAY = 29,
- PMIC1_SWA_SEQUENCE_ORDER = 30,
-
- PMIC1_SWB_VOLTAGE_SETTING = 31,
- PMIC1_SWB_VOLTAGE_RANGE_SELECT = 32,
- PMIC1_SWB_VOLTAGE_OFFSET = 33,
- PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION = 34,
- PMIC1_SWB_SEQUENCE_DELAY = 35,
- PMIC1_SWB_SEQUENCE_ORDER = 36,
-
- PMIC1_SWC_VOLTAGE_SETTING = 37,
- PMIC1_SWC_VOLTAGE_RANGE_SELECT = 38,
- PMIC1_SWC_VOLTAGE_OFFSET = 39,
- PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION = 40,
- PMIC1_SWC_SEQUENCE_DELAY = 41,
- PMIC1_SWC_SEQUENCE_ORDER = 42,
-
- PMIC1_SWD_VOLTAGE_SETTING = 43,
- PMIC1_SWD_VOLTAGE_RANGE_SELECT = 44,
- PMIC1_SWD_VOLTAGE_OFFSET = 45,
- PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION = 46,
- PMIC1_SWD_SEQUENCE_DELAY = 47,
- PMIC1_SWD_SEQUENCE_ORDER = 48,
-
- PMIC0_PHASE_COMB = 49,
- PMIC1_PHASE_COMB = 50,
-
- PMIC0_MFG_ID = 51,
- PMIC1_MFG_ID = 52,
-
- DRAM_MODULE_HEIGHT = 53,
+ PMIC0_SWA_SEQUENCE_DELAY = 4,
+ PMIC0_SWA_SEQUENCE_ORDER = 5,
+
+ PMIC0_SWB_VOLTAGE_SETTING = 6,
+ PMIC0_SWB_VOLTAGE_RANGE_SELECT = 7,
+ PMIC0_SWB_VOLTAGE_OFFSET = 8,
+ PMIC0_SWB_SEQUENCE_DELAY = 9,
+ PMIC0_SWB_SEQUENCE_ORDER = 10,
+
+ PMIC0_SWC_VOLTAGE_SETTING = 11,
+ PMIC0_SWC_VOLTAGE_RANGE_SELECT = 12,
+ PMIC0_SWC_VOLTAGE_OFFSET = 13,
+ PMIC0_SWC_SEQUENCE_DELAY = 14,
+ PMIC0_SWC_SEQUENCE_ORDER = 15,
+
+ PMIC0_SWD_VOLTAGE_SETTING = 16,
+ PMIC0_SWD_VOLTAGE_RANGE_SELECT = 17,
+ PMIC0_SWD_VOLTAGE_OFFSET = 18,
+ PMIC0_SWD_SEQUENCE_DELAY = 19,
+ PMIC0_SWD_SEQUENCE_ORDER = 20,
+
+ PMIC1_SWA_VOLTAGE_SETTING = 21,
+ PMIC1_SWA_VOLTAGE_RANGE_SELECT = 22,
+ PMIC1_SWA_VOLTAGE_OFFSET = 23,
+ PMIC1_SWA_SEQUENCE_DELAY = 24,
+ PMIC1_SWA_SEQUENCE_ORDER = 25,
+
+ PMIC1_SWB_VOLTAGE_SETTING = 26,
+ PMIC1_SWB_VOLTAGE_RANGE_SELECT = 27,
+ PMIC1_SWB_VOLTAGE_OFFSET = 28,
+ PMIC1_SWB_SEQUENCE_DELAY = 29,
+ PMIC1_SWB_SEQUENCE_ORDER = 30,
+
+ PMIC1_SWC_VOLTAGE_SETTING = 31,
+ PMIC1_SWC_VOLTAGE_RANGE_SELECT = 32,
+ PMIC1_SWC_VOLTAGE_OFFSET = 33,
+ PMIC1_SWC_SEQUENCE_DELAY = 34,
+ PMIC1_SWC_SEQUENCE_ORDER = 35,
+
+ PMIC1_SWD_VOLTAGE_SETTING = 36,
+ PMIC1_SWD_VOLTAGE_RANGE_SELECT = 37,
+ PMIC1_SWD_VOLTAGE_OFFSET = 38,
+ PMIC1_SWD_SEQUENCE_DELAY = 39,
+ PMIC1_SWD_SEQUENCE_ORDER = 40,
+
+ PMIC0_PHASE_COMB = 41,
+ PMIC1_PHASE_COMB = 42,
+
+ PMIC0_MFG_ID = 43,
+ PMIC1_MFG_ID = 44,
+
+ DRAM_MODULE_HEIGHT = 45,
// Dispatcher set to last enum value
ATTR_EFF_DISPATCHER = DRAM_MODULE_HEIGHT,
@@ -176,66 +168,58 @@ enum ffdc_codes
SET_PMIC0_SWA_VOLTAGE_SETTING = 0x1052,
SET_PMIC0_SWA_VOLTAGE_RANGE_SELECT = 0x1053,
SET_PMIC0_SWA_VOLTAGE_OFFSET = 0x1054,
- SET_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION = 0x1055,
- SET_PMIC0_SWA_SEQUENCE_DELAY = 0x1056,
- SET_PMIC0_SWA_SEQUENCE_ORDER = 0X1057,
-
- SET_PMIC0_SWB_VOLTAGE_SETTING = 0x1058,
- SET_PMIC0_SWB_VOLTAGE_RANGE_SELECT = 0x1059,
- SET_PMIC0_SWB_VOLTAGE_OFFSET = 0x105A,
- SET_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION = 0x105B,
- SET_PMIC0_SWB_SEQUENCE_DELAY = 0x105C,
- SET_PMIC0_SWB_SEQUENCE_ORDER = 0X105D,
-
- SET_PMIC0_SWC_VOLTAGE_SETTING = 0x105E,
- SET_PMIC0_SWC_VOLTAGE_RANGE_SELECT = 0x105F,
- SET_PMIC0_SWC_VOLTAGE_OFFSET = 0x1060,
- SET_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION = 0x1061,
- SET_PMIC0_SWC_SEQUENCE_DELAY = 0x1062,
- SET_PMIC0_SWC_SEQUENCE_ORDER = 0X1063,
-
- SET_PMIC0_SWD_VOLTAGE_SETTING = 0x1064,
- SET_PMIC0_SWD_VOLTAGE_RANGE_SELECT = 0x1065,
- SET_PMIC0_SWD_VOLTAGE_OFFSET = 0x1066,
- SET_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION = 0x1067,
- SET_PMIC0_SWD_SEQUENCE_DELAY = 0x1068,
- SET_PMIC0_SWD_SEQUENCE_ORDER = 0X1069,
-
- SET_PMIC1_SWA_VOLTAGE_SETTING = 0x106A,
- SET_PMIC1_SWA_VOLTAGE_RANGE_SELECT = 0x106B,
- SET_PMIC1_SWA_VOLTAGE_OFFSET = 0x106C,
- SET_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION = 0x106D,
- SET_PMIC1_SWA_SEQUENCE_DELAY = 0x106E,
- SET_PMIC1_SWA_SEQUENCE_ORDER = 0X106F,
-
- SET_PMIC1_SWB_VOLTAGE_SETTING = 0x1070,
- SET_PMIC1_SWB_VOLTAGE_RANGE_SELECT = 0x1071,
- SET_PMIC1_SWB_VOLTAGE_OFFSET = 0x1072,
- SET_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION = 0x1073,
- SET_PMIC1_SWB_SEQUENCE_DELAY = 0x1074,
- SET_PMIC1_SWB_SEQUENCE_ORDER = 0X1075,
-
- SET_PMIC1_SWC_VOLTAGE_SETTING = 0x1076,
- SET_PMIC1_SWC_VOLTAGE_RANGE_SELECT = 0x1077,
- SET_PMIC1_SWC_VOLTAGE_OFFSET = 0x1078,
- SET_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION = 0x1079,
- SET_PMIC1_SWC_SEQUENCE_DELAY = 0x107A,
- SET_PMIC1_SWC_SEQUENCE_ORDER = 0X107B,
-
- SET_PMIC1_SWD_VOLTAGE_SETTING = 0x107C,
- SET_PMIC1_SWD_VOLTAGE_RANGE_SELECT = 0x107D,
- SET_PMIC1_SWD_VOLTAGE_OFFSET = 0x107E,
- SET_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION = 0x107F,
- SET_PMIC1_SWD_SEQUENCE_DELAY = 0x1080,
- SET_PMIC1_SWD_SEQUENCE_ORDER = 0X1081,
-
- SET_PMIC0_PHASE_COMB = 0x1082,
- SET_PMIC1_PHASE_COMB = 0x1083,
-
- SET_PMIC0_MFG_ID = 0x1084,
- SET_PMIC1_MFG_ID = 0x1085,
-
- SET_DRAM_MODULE_HEIGHT = 0x1086,
+ SET_PMIC0_SWA_SEQUENCE_DELAY = 0x1055,
+ SET_PMIC0_SWA_SEQUENCE_ORDER = 0X1056,
+
+ SET_PMIC0_SWB_VOLTAGE_SETTING = 0x1057,
+ SET_PMIC0_SWB_VOLTAGE_RANGE_SELECT = 0x1058,
+ SET_PMIC0_SWB_VOLTAGE_OFFSET = 0x1059,
+ SET_PMIC0_SWB_SEQUENCE_DELAY = 0x105A,
+ SET_PMIC0_SWB_SEQUENCE_ORDER = 0X105B,
+
+ SET_PMIC0_SWC_VOLTAGE_SETTING = 0x105C,
+ SET_PMIC0_SWC_VOLTAGE_RANGE_SELECT = 0x105D,
+ SET_PMIC0_SWC_VOLTAGE_OFFSET = 0x105E,
+ SET_PMIC0_SWC_SEQUENCE_DELAY = 0x105F,
+ SET_PMIC0_SWC_SEQUENCE_ORDER = 0X1060,
+
+ SET_PMIC0_SWD_VOLTAGE_SETTING = 0x1061,
+ SET_PMIC0_SWD_VOLTAGE_RANGE_SELECT = 0x1062,
+ SET_PMIC0_SWD_VOLTAGE_OFFSET = 0x1063,
+ SET_PMIC0_SWD_SEQUENCE_DELAY = 0x1064,
+ SET_PMIC0_SWD_SEQUENCE_ORDER = 0X1065,
+
+ SET_PMIC1_SWA_VOLTAGE_SETTING = 0x1066,
+ SET_PMIC1_SWA_VOLTAGE_RANGE_SELECT = 0x1067,
+ SET_PMIC1_SWA_VOLTAGE_OFFSET = 0x1068,
+ SET_PMIC1_SWA_SEQUENCE_DELAY = 0x1069,
+ SET_PMIC1_SWA_SEQUENCE_ORDER = 0X106A,
+
+ SET_PMIC1_SWB_VOLTAGE_SETTING = 0x106B,
+ SET_PMIC1_SWB_VOLTAGE_RANGE_SELECT = 0x106C,
+ SET_PMIC1_SWB_VOLTAGE_OFFSET = 0x106D,
+ SET_PMIC1_SWB_SEQUENCE_DELAY = 0x106E,
+ SET_PMIC1_SWB_SEQUENCE_ORDER = 0X106F,
+
+ SET_PMIC1_SWC_VOLTAGE_SETTING = 0x1070,
+ SET_PMIC1_SWC_VOLTAGE_RANGE_SELECT = 0x1071,
+ SET_PMIC1_SWC_VOLTAGE_OFFSET = 0x1072,
+ SET_PMIC1_SWC_SEQUENCE_DELAY = 0x1073,
+ SET_PMIC1_SWC_SEQUENCE_ORDER = 0X1074,
+
+ SET_PMIC1_SWD_VOLTAGE_SETTING = 0x1075,
+ SET_PMIC1_SWD_VOLTAGE_RANGE_SELECT = 0x1076,
+ SET_PMIC1_SWD_VOLTAGE_OFFSET = 0x1077,
+ SET_PMIC1_SWD_SEQUENCE_DELAY = 0x1078,
+ SET_PMIC1_SWD_SEQUENCE_ORDER = 0X1079,
+
+ SET_PMIC0_PHASE_COMB = 0x107A,
+ SET_PMIC1_PHASE_COMB = 0x107B,
+
+ SET_PMIC0_MFG_ID = 0x107C,
+ SET_PMIC1_MFG_ID = 0x107D,
+
+ SET_DRAM_MODULE_HEIGHT = 0x107E,
};
///
diff --git a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H
index ba93774bb..835eb907c 100644
--- a/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H
+++ b/src/import/chips/ocmb/common/procedures/hwp/pmic/lib/utils/pmic_enable_utils.H
@@ -63,7 +63,8 @@ enum enable_mode
/// @brief pointer to PMIC attribute getters for DIMM target
typedef fapi2::ReturnCode (*pmic_attr_ptr)(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target, uint8_t& o_value);
-
+typedef fapi2::ReturnCode (*pmic_attr_ptr_signed)(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ int8_t& o_value);
// Pointers below allow for run-time attribute getter selection by PMIC ID (0,1)
// Voltage Setting
@@ -111,49 +112,27 @@ static constexpr pmic_attr_ptr get_swd_voltage_range_select[] =
};
// Voltage Offset
-static constexpr pmic_attr_ptr get_swa_voltage_offset[] =
+static constexpr pmic_attr_ptr_signed get_swa_voltage_offset[] =
{
mss::attr::get_pmic0_swa_voltage_offset,
mss::attr::get_pmic1_swa_voltage_offset
};
-static constexpr pmic_attr_ptr get_swb_voltage_offset[] =
+static constexpr pmic_attr_ptr_signed get_swb_voltage_offset[] =
{
mss::attr::get_pmic0_swb_voltage_offset,
mss::attr::get_pmic1_swb_voltage_offset
};
-static constexpr pmic_attr_ptr get_swc_voltage_offset[] =
+static constexpr pmic_attr_ptr_signed get_swc_voltage_offset[] =
{
mss::attr::get_pmic0_swc_voltage_offset,
mss::attr::get_pmic1_swc_voltage_offset
};
-static constexpr pmic_attr_ptr get_swd_voltage_offset[] =
+static constexpr pmic_attr_ptr_signed get_swd_voltage_offset[] =
{
mss::attr::get_pmic0_swd_voltage_offset,
mss::attr::get_pmic1_swd_voltage_offset
};
-// Voltage Offset Direction
-static constexpr pmic_attr_ptr get_swa_voltage_offset_direction[] =
-{
- mss::attr::get_pmic0_swa_voltage_offset_direction,
- mss::attr::get_pmic1_swa_voltage_offset_direction
-};
-static constexpr pmic_attr_ptr get_swb_voltage_offset_direction[] =
-{
- mss::attr::get_pmic0_swb_voltage_offset_direction,
- mss::attr::get_pmic1_swb_voltage_offset_direction
-};
-static constexpr pmic_attr_ptr get_swc_voltage_offset_direction[] =
-{
- mss::attr::get_pmic0_swc_voltage_offset_direction,
- mss::attr::get_pmic1_swc_voltage_offset_direction
-};
-static constexpr pmic_attr_ptr get_swd_voltage_offset_direction[] =
-{
- mss::attr::get_pmic0_swd_voltage_offset_direction,
- mss::attr::get_pmic1_swd_voltage_offset_direction
-};
-
// Sequence Delay
static constexpr pmic_attr_ptr get_swa_sequence_delay[] =
{
@@ -205,8 +184,35 @@ static constexpr pmic_attr_ptr get_phase_comb[] =
mss::attr::get_pmic1_phase_comb
};
+// EFD Fields
+
+// Offset
+static constexpr pmic_attr_ptr_signed get_efd_swa_voltage_offset[] =
+{
+ mss::attr::get_efd_pmic0_swa_voltage_offset,
+ mss::attr::get_efd_pmic1_swa_voltage_offset
+};
+
+static constexpr pmic_attr_ptr_signed get_efd_swb_voltage_offset[] =
+{
+ mss::attr::get_efd_pmic0_swb_voltage_offset,
+ mss::attr::get_efd_pmic1_swb_voltage_offset
+};
+
+static constexpr pmic_attr_ptr_signed get_efd_swc_voltage_offset[] =
+{
+ mss::attr::get_efd_pmic0_swc_voltage_offset,
+ mss::attr::get_efd_pmic1_swc_voltage_offset
+};
+
+static constexpr pmic_attr_ptr_signed get_efd_swd_voltage_offset[] =
+{
+ mss::attr::get_efd_pmic0_swd_voltage_offset,
+ mss::attr::get_efd_pmic1_swd_voltage_offset
+};
+
// These arrays allow us to dynamically choose the right attribute getter at runtime based on the rail and mss::pmic::id
-static const pmic_attr_ptr* l_get_volt_setting[] =
+static const pmic_attr_ptr* get_volt_setting[] =
{
mss::pmic::get_swa_voltage_setting,
mss::pmic::get_swb_voltage_setting,
@@ -214,7 +220,7 @@ static const pmic_attr_ptr* l_get_volt_setting[] =
mss::pmic::get_swd_voltage_setting
};
-static const pmic_attr_ptr* l_get_volt_range_select[] =
+static const pmic_attr_ptr* get_volt_range_select[] =
{
mss::pmic::get_swa_voltage_range_select,
mss::pmic::get_swb_voltage_range_select,
@@ -222,7 +228,7 @@ static const pmic_attr_ptr* l_get_volt_range_select[] =
mss::pmic::get_swd_voltage_range_select
};
-static const pmic_attr_ptr* l_get_volt_offset[] =
+static const pmic_attr_ptr_signed* get_volt_offset[] =
{
mss::pmic::get_swa_voltage_offset,
mss::pmic::get_swb_voltage_offset,
@@ -230,12 +236,13 @@ static const pmic_attr_ptr* l_get_volt_offset[] =
mss::pmic::get_swd_voltage_offset
};
-static const pmic_attr_ptr* l_get_volt_offset_direction[] =
+// EFD Offset + Direction functions
+static const pmic_attr_ptr_signed* get_efd_volt_offset[] =
{
- mss::pmic::get_swa_voltage_offset_direction,
- mss::pmic::get_swb_voltage_offset_direction,
- mss::pmic::get_swc_voltage_offset_direction,
- mss::pmic::get_swd_voltage_offset_direction
+ mss::pmic::get_efd_swa_voltage_offset,
+ mss::pmic::get_efd_swb_voltage_offset,
+ mss::pmic::get_efd_swc_voltage_offset,
+ mss::pmic::get_efd_swd_voltage_offset
};
// For output traces
@@ -244,6 +251,8 @@ static const std::vector<const char*> PMIC_RAIL_NAMES = {"SWA", "SWB", "SWC", "S
// Attribute setter FP type
typedef fapi2::ReturnCode (*pmic_attr_setter_ptr)(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
uint8_t i_value);
+typedef fapi2::ReturnCode (*pmic_attr_setter_ptr_signed)(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ int8_t i_value);
// Voltage Setting
static constexpr pmic_attr_setter_ptr set_swa_voltage_setting[] =
@@ -290,49 +299,27 @@ static constexpr pmic_attr_setter_ptr set_swd_voltage_range_select[] =
};
// Voltage Offset
-static constexpr pmic_attr_setter_ptr set_swa_voltage_offset[] =
+static constexpr pmic_attr_setter_ptr_signed set_swa_voltage_offset[] =
{
mss::attr::set_pmic0_swa_voltage_offset,
mss::attr::set_pmic1_swa_voltage_offset
};
-static constexpr pmic_attr_setter_ptr set_swb_voltage_offset[] =
+static constexpr pmic_attr_setter_ptr_signed set_swb_voltage_offset[] =
{
mss::attr::set_pmic0_swb_voltage_offset,
mss::attr::set_pmic1_swb_voltage_offset
};
-static constexpr pmic_attr_setter_ptr set_swc_voltage_offset[] =
+static constexpr pmic_attr_setter_ptr_signed set_swc_voltage_offset[] =
{
mss::attr::set_pmic0_swc_voltage_offset,
mss::attr::set_pmic1_swc_voltage_offset
};
-static constexpr pmic_attr_setter_ptr set_swd_voltage_offset[] =
+static constexpr pmic_attr_setter_ptr_signed set_swd_voltage_offset[] =
{
mss::attr::set_pmic0_swd_voltage_offset,
mss::attr::set_pmic1_swd_voltage_offset
};
-// Voltage Offset Direction
-static constexpr pmic_attr_setter_ptr set_swa_voltage_offset_direction[] =
-{
- mss::attr::set_pmic0_swa_voltage_offset_direction,
- mss::attr::set_pmic1_swa_voltage_offset_direction
-};
-static constexpr pmic_attr_setter_ptr set_swb_voltage_offset_direction[] =
-{
- mss::attr::set_pmic0_swb_voltage_offset_direction,
- mss::attr::set_pmic1_swb_voltage_offset_direction
-};
-static constexpr pmic_attr_setter_ptr set_swc_voltage_offset_direction[] =
-{
- mss::attr::set_pmic0_swc_voltage_offset_direction,
- mss::attr::set_pmic1_swc_voltage_offset_direction
-};
-static constexpr pmic_attr_setter_ptr set_swd_voltage_offset_direction[] =
-{
- mss::attr::set_pmic0_swd_voltage_offset_direction,
- mss::attr::set_pmic1_swd_voltage_offset_direction
-};
-
// Sequence Delay
static constexpr pmic_attr_setter_ptr set_swa_sequence_delay[] =
{
@@ -384,40 +371,30 @@ static constexpr pmic_attr_setter_ptr set_phase_comb[] =
mss::attr::set_pmic1_phase_comb
};
-// TK - these will be needed in the next commit (pmic_bias).
-
-// These arrays allow us to dynamically choose the right attribute setter at runtime based on the rail and mss::pmic::id
-// static const pmic_attr_setter_ptr* l_set_volt_setting[] =
-// {
-// mss::pmic::set_swa_voltage_setting,
-// mss::pmic::set_swb_voltage_setting,
-// mss::pmic::set_swc_voltage_setting,
-// mss::pmic::set_swd_voltage_setting
-// };
-
-// static const pmic_attr_setter_ptr* l_set_volt_range_select[] =
-// {
-// mss::pmic::set_swa_voltage_range_select,
-// mss::pmic::set_swb_voltage_range_select,
-// mss::pmic::set_swc_voltage_range_select,
-// mss::pmic::set_swd_voltage_range_select
-// };
-
-// static const pmic_attr_setter_ptr* l_set_volt_offset[] =
-// {
-// mss::pmic::set_swa_voltage_offset,
-// mss::pmic::set_swb_voltage_offset,
-// mss::pmic::set_swc_voltage_offset,
-// mss::pmic::set_swd_voltage_offset
-// };
-
-// static const pmic_attr_setter_ptr* l_set_volt_offset_direction[] =
-// {
-// mss::pmic::set_swa_voltage_offset_direction,
-// mss::pmic::set_swb_voltage_offset_direction,
-// mss::pmic::set_swc_voltage_offset_direction,
-// mss::pmic::set_swd_voltage_offset_direction
-// };
+// Offset
+static constexpr pmic_attr_setter_ptr_signed set_efd_swa_voltage_offset[] =
+{
+ mss::attr::set_efd_pmic0_swa_voltage_offset,
+ mss::attr::set_efd_pmic1_swa_voltage_offset
+};
+
+static constexpr pmic_attr_setter_ptr_signed set_efd_swb_voltage_offset[] =
+{
+ mss::attr::set_efd_pmic0_swb_voltage_offset,
+ mss::attr::set_efd_pmic1_swb_voltage_offset
+};
+
+static constexpr pmic_attr_setter_ptr_signed set_efd_swc_voltage_offset[] =
+{
+ mss::attr::set_efd_pmic0_swc_voltage_offset,
+ mss::attr::set_efd_pmic1_swc_voltage_offset
+};
+
+static constexpr pmic_attr_setter_ptr_signed set_efd_swd_voltage_offset[] =
+{
+ mss::attr::set_efd_pmic0_swd_voltage_offset,
+ mss::attr::set_efd_pmic1_swd_voltage_offset
+};
//-----------------------------------
// SPD Biasing functions
@@ -521,16 +498,16 @@ inline fapi2::ReturnCode calculate_voltage_write_buffer(
fapi2::buffer<uint8_t>& o_volt_buffer)
{
uint8_t l_volt = 0;
- uint8_t l_volt_offset = 0;
- uint8_t l_volt_offset_direction = 0;
+ int8_t l_volt_offset = 0;
+ int8_t l_efd_volt_offset = 0;
// Get the attributes corresponding to the rail and PMIC indices
- FAPI_TRY(l_get_volt_setting[i_rail][i_id](i_dimm_target, l_volt));
- FAPI_TRY(l_get_volt_offset[i_rail][i_id](i_dimm_target, l_volt_offset));
- FAPI_TRY(l_get_volt_offset_direction[i_rail][i_id](i_dimm_target, l_volt_offset_direction));
+ FAPI_TRY(get_volt_setting[i_rail][i_id](i_dimm_target, l_volt));
+ FAPI_TRY(get_volt_offset[i_rail][i_id](i_dimm_target, l_volt_offset));
+ FAPI_TRY(get_efd_volt_offset[i_rail][i_id](i_dimm_target, l_efd_volt_offset));
- o_volt_buffer = (l_volt_offset_direction == CONSTS::OFFSET_PLUS) ?
- l_volt + l_volt_offset : l_volt - l_volt_offset;
+ // Set output buffer
+ o_volt_buffer = l_volt + l_volt_offset + l_efd_volt_offset;
fapi_try_exit:
return fapi2::current_err;
@@ -603,7 +580,7 @@ inline fapi2::ReturnCode bias_with_spd_voltages<mss::pmic::vendor::TI>(
bool l_overflow = false;
uint8_t l_volt_range_select = 0;
- FAPI_TRY(l_get_volt_range_select[l_rail_index][i_id](i_dimm_target, l_volt_range_select));
+ FAPI_TRY(get_volt_range_select[l_rail_index][i_id](i_dimm_target, l_volt_range_select));
// SWD supports a RANGE 1, but NOT SWA-C
if (l_rail_index == mss::pmic::rail::SWD)
diff --git a/src/import/chips/ocmb/common/procedures/xml/attribute_info/pmic_eff_attributes.xml b/src/import/chips/ocmb/common/procedures/xml/attribute_info/pmic_eff_attributes.xml
index 59a53831c..c671d8eab 100644
--- a/src/import/chips/ocmb/common/procedures/xml/attribute_info/pmic_eff_attributes.xml
+++ b/src/import/chips/ocmb/common/procedures/xml/attribute_info/pmic_eff_attributes.xml
@@ -67,29 +67,16 @@
<id>ATTR_MEM_EFF_PMIC0_SWA_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC0 SWA Voltage Offset in steps (1 bit increments)
+ PMIC0 SWA Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic0_swa_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC0_SWA_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic0_swa_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC0_SWA_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -145,29 +132,16 @@
<id>ATTR_MEM_EFF_PMIC0_SWB_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC0 SWB Voltage Offset in steps (1 bit increments)
+ PMIC0 SWB Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic0_swb_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC0_SWB_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic0_swb_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC0_SWB_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -223,29 +197,16 @@
<id>ATTR_MEM_EFF_PMIC0_SWC_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC0 SWC Voltage Offset in steps (1 bit increments)
+ PMIC0 SWC Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic0_swc_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC0_SWC_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic0_swc_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC0_SWC_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -301,29 +262,16 @@
<id>ATTR_MEM_EFF_PMIC0_SWD_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC0 SWD Voltage Offset in steps (1 bit increments)
+ PMIC0 SWD Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic0_swd_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC0_SWD_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic0_swd_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC0_SWD_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -392,29 +340,16 @@
<id>ATTR_MEM_EFF_PMIC1_SWA_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC1 SWA Voltage Offset in steps (1 bit increments)
+ PMIC1 SWA Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic1_swa_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC1_SWA_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic1_swa_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC1_SWA_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -470,29 +405,16 @@
<id>ATTR_MEM_EFF_PMIC1_SWB_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC1 SWB Voltage Offset in steps (1 bit increments)
+ PMIC1 SWB Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic1_swb_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC1_SWB_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic1_swb_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC1_SWB_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -548,29 +470,16 @@
<id>ATTR_MEM_EFF_PMIC1_SWC_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC1 SWC Voltage Offset in steps (1 bit increments)
+ PMIC1 SWC Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic1_swc_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC1_SWC_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic1_swc_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC1_SWC_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -626,29 +535,16 @@
<id>ATTR_MEM_EFF_PMIC1_SWD_VOLTAGE_OFFSET</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
- PMIC1 SWD Voltage Offset in steps (1 bit increments)
+ PMIC1 SWD Voltage Offset (signed, 1 bit increments)
</description>
<initToZero></initToZero>
- <valueType>uint8</valueType>
+ <valueType>int8</valueType>
<writeable/>
<array>2</array>
<mssAccessorName>pmic1_swd_voltage_offset</mssAccessorName>
</attribute>
<attribute>
- <id>ATTR_MEM_EFF_PMIC1_SWD_VOLTAGE_OFFSET_DIRECTION</id>
- <targetType>TARGET_TYPE_MEM_PORT</targetType>
- <description>
- Add (0), Subtract (1)
- </description>
- <initToZero></initToZero>
- <valueType>uint8</valueType>
- <writeable/>
- <array>2</array>
- <mssAccessorName>pmic1_swd_voltage_offset_direction</mssAccessorName>
- </attribute>
-
- <attribute>
<id>ATTR_MEM_EFF_PMIC1_SWD_SEQUENCE_DELAY</id>
<targetType>TARGET_TYPE_MEM_PORT</targetType>
<description>
@@ -699,5 +595,109 @@
<array>2</array>
<mssAccessorName>pmic1_phase_comb</mssAccessorName>
</attribute>
-
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC0_SWA_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC0 SWA Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic0_swa_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC0_SWB_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC0 SWB Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic0_swb_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC0_SWC_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC0 SWC Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic0_swc_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC0_SWD_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC0 SWD Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic0_swd_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC1_SWA_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC1 SWA Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic1_swa_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC1_SWB_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC1 SWB Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic1_swb_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC1_SWC_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC1 SWC Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic1_swc_voltage_offset</mssAccessorName>
+ </attribute>
+
+ <attribute>
+ <id>ATTR_MEM_EFF_EFD_PMIC1_SWD_VOLTAGE_OFFSET</id>
+ <targetType>TARGET_TYPE_MEM_PORT</targetType>
+ <description>
+ PMIC1 SWD Voltage Offset (signed, 1 bit increments)
+ </description>
+ <initToZero></initToZero>
+ <valueType>int8</valueType>
+ <writeable/>
+ <array>2</array>
+ <mssAccessorName>efd_pmic1_swd_voltage_offset</mssAccessorName>
+ </attribute>
+
</attributes>
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C
index de0bbfc57..d649e50c4 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/eff_config/explorer_efd_processing.C
@@ -205,7 +205,7 @@ fapi2::ReturnCode dfimrl_ddrclk(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_
FAPI_TRY(i_efd_data->dfimrl_ddrclk(l_dfimrl_ddrclk));
// Set the attribute
- FAPI_TRY(mss::attr::get_exp_dfimrl_clk(l_port, l_dfimrl_ddrclk));
+ FAPI_TRY(mss::attr::set_exp_dfimrl_clk(l_port, l_dfimrl_ddrclk));
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
index 0e3224827..059121ac3 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.C
@@ -44,6 +44,7 @@
#include <lib/eff_config/explorer_attr_engine_traits.H>
#include <lib/eff_config/pmic_attr_engine_traits.H>
#include <lib/eff_config/explorer_efd_processing.H>
+#include <lib/eff_config/pmic_efd_processing.H>
#include <lib/freq/axone_freq_traits.H>
#include <lib/freq/axone_sync.H>
#include <generic/memory/mss_git_data_helper.H>
@@ -95,7 +96,11 @@ fapi2::ReturnCode p9a_mss_eff_config( const fapi2::Target<fapi2::TARGET_TYPE_MEM
// Set up SI ATTRS
FAPI_TRY( mss::attr_si_engine<mss::attr_si_engine_fields>::set(l_efd_data) );
+ // Explorer EFD
FAPI_TRY( mss::exp::efd::process(dimm, l_efd_data));
+
+ // PMIC EFD
+ FAPI_TRY(mss::pmic::efd::process(dimm, l_efd_data));
}
{
diff --git a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk
index 9935a200e..a01aeb9ee 100644
--- a/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk
+++ b/src/import/chips/p9a/procedures/hwp/memory/p9a_mss_eff_config.mk
@@ -28,5 +28,4 @@
PROCEDURE=p9a_mss_eff_config
$(eval $(call ADD_P9A_MEMORY_INCDIRS,$(PROCEDURE)))
-lib$(PROCEDURE)_DEPLIBS+=mss_pmic
$(call BUILD_PROCEDURE)
diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_ddr4_custom_microchip_decoder.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_ddr4_custom_microchip_decoder.H
index f3693dcd2..cd904ef9b 100644
--- a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_ddr4_custom_microchip_decoder.H
+++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_ddr4_custom_microchip_decoder.H
@@ -939,204 +939,204 @@ class decoder<mss::spd::device_type::DDR4, DDR4_CUSTOM_MICROCHIP, R > : public b
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swa_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swa_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWA_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWA_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_RANGE
+ /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swa_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swa_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWA_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWA_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_SETTING
+ /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swb_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swb_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWB_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWB_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_RANGE
+ /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swb_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swb_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWB_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWB_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_SETTING
+ /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swc_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swc_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWC_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWC_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_RANGE
+ /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swc_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swc_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWC_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWC_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_SETTING
+ /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swd_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swd_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWD_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWD_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_RANGE
+ /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swd_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic0_swd_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC0_SWD_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC0_SWD_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_SETTING
+ /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swa_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swa_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWA_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWA_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_RANGE
+ /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swa_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swa_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWA_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWA_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_SETTING
+ /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swb_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swb_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWB_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWB_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_RANGE
+ /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swb_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swb_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWB_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWB_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_SETTING
+ /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swc_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swc_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWC_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWC_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_RANGE
+ /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swc_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swc_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWC_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWC_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_SETTING
+ /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swd_setting(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swd_offset(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWD_SETTING, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWD_OFFSET, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
}
///
- /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_RANGE
+ /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swd_range(uint8_t& o_output) const override
+ virtual fapi2::ReturnCode pmic1_swd_offset_direction(uint8_t& o_output) const override
{
- FAPI_TRY(( reader<fields_t::PMIC1_SWD_RANGE, R>(iv_target, iv_data, o_output)) );
+ FAPI_TRY(( reader<fields_t::PMIC1_SWD_OFFSET_DIRECTION, R>(iv_target, iv_data, o_output)) );
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_fields_ddr4.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_fields_ddr4.H
index 47f0e5105..d59aac75f 100644
--- a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_fields_ddr4.H
+++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_fields_ddr4.H
@@ -385,59 +385,59 @@ class fields<mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>
// Byte 70: PMIC0 SWA Volt
PMIC0_SWA_BYTE = 70,
- PMIC0_SWA_SETTING_START = 0,
- PMIC0_SWA_SETTING_LEN = 7,
- PMIC0_SWA_RANGE_START = 7,
- PMIC0_SWA_RANGE_LEN = 1,
+ PMIC0_SWA_OFFSET_START = 0,
+ PMIC0_SWA_OFFSET_LEN = 7,
+ PMIC0_SWA_OFFSET_DIRECTION_START = 7,
+ PMIC0_SWA_OFFSET_DIRECTION_LEN = 1,
// Byte 71: PMIC0 SWB Volt
PMIC0_SWB_BYTE = 71,
- PMIC0_SWB_SETTING_START = 0,
- PMIC0_SWB_SETTING_LEN = 7,
- PMIC0_SWB_RANGE_START = 7,
- PMIC0_SWB_RANGE_LEN = 1,
+ PMIC0_SWB_OFFSET_START = 0,
+ PMIC0_SWB_OFFSET_LEN = 7,
+ PMIC0_SWB_OFFSET_DIRECTION_START = 7,
+ PMIC0_SWB_OFFSET_DIRECTION_LEN = 1,
// Byte 72: PMIC0 SWC Volt
PMIC0_SWC_BYTE = 72,
- PMIC0_SWC_SETTING_START = 0,
- PMIC0_SWC_SETTING_LEN = 7,
- PMIC0_SWC_RANGE_START = 7,
- PMIC0_SWC_RANGE_LEN = 1,
+ PMIC0_SWC_OFFSET_START = 0,
+ PMIC0_SWC_OFFSET_LEN = 7,
+ PMIC0_SWC_OFFSET_DIRECTION_START = 7,
+ PMIC0_SWC_OFFSET_DIRECTION_LEN = 1,
// Byte 73: PMIC0 SWD Volt
PMIC0_SWD_BYTE = 73,
- PMIC0_SWD_SETTING_START = 0,
- PMIC0_SWD_SETTING_LEN = 7,
- PMIC0_SWD_RANGE_START = 7,
- PMIC0_SWD_RANGE_LEN = 1,
+ PMIC0_SWD_OFFSET_START = 0,
+ PMIC0_SWD_OFFSET_LEN = 7,
+ PMIC0_SWD_OFFSET_DIRECTION_START = 7,
+ PMIC0_SWD_OFFSET_DIRECTION_LEN = 1,
// Byte 74: PMIC1 SWA Volt
PMIC1_SWA_BYTE = 74,
- PMIC1_SWA_SETTING_START = 0,
- PMIC1_SWA_SETTING_LEN = 7,
- PMIC1_SWA_RANGE_START = 7,
- PMIC1_SWA_RANGE_LEN = 1,
+ PMIC1_SWA_OFFSET_START = 0,
+ PMIC1_SWA_OFFSET_LEN = 7,
+ PMIC1_SWA_OFFSET_DIRECTION_START = 7,
+ PMIC1_SWA_OFFSET_DIRECTION_LEN = 1,
// Byte 75: PMIC1 SWB Volt
PMIC1_SWB_BYTE = 75,
- PMIC1_SWB_SETTING_START = 0,
- PMIC1_SWB_SETTING_LEN = 7,
- PMIC1_SWB_RANGE_START = 7,
- PMIC1_SWB_RANGE_LEN = 1,
+ PMIC1_SWB_OFFSET_START = 0,
+ PMIC1_SWB_OFFSET_LEN = 7,
+ PMIC1_SWB_OFFSET_DIRECTION_START = 7,
+ PMIC1_SWB_OFFSET_DIRECTION_LEN = 1,
// Byte 76: PMIC1 SWC Volt
PMIC1_SWC_BYTE = 76,
- PMIC1_SWC_SETTING_START = 0,
- PMIC1_SWC_SETTING_LEN = 7,
- PMIC1_SWC_RANGE_START = 7,
- PMIC1_SWC_RANGE_LEN = 1,
+ PMIC1_SWC_OFFSET_START = 0,
+ PMIC1_SWC_OFFSET_LEN = 7,
+ PMIC1_SWC_OFFSET_DIRECTION_START = 7,
+ PMIC1_SWC_OFFSET_DIRECTION_LEN = 1,
// Byte 77: PMIC1 SWD Volt
PMIC1_SWD_BYTE = 77,
- PMIC1_SWD_SETTING_START = 0,
- PMIC1_SWD_SETTING_LEN = 7,
- PMIC1_SWD_RANGE_START = 7,
- PMIC1_SWD_RANGE_LEN = 1,
+ PMIC1_SWD_OFFSET_START = 0,
+ PMIC1_SWD_OFFSET_LEN = 7,
+ PMIC1_SWD_OFFSET_DIRECTION_START = 7,
+ PMIC1_SWD_OFFSET_DIRECTION_LEN = 1,
};
public:
@@ -638,36 +638,36 @@ class fields<mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>
static constexpr field_t CAC_DLY_B_7{CAC_DELAY_B_SIDE_GROUP_7_BYTE, CAC_DLY_B_7_START, CAC_DLY_B_7_LEN};
// Byte 70: PMIC0 SWA Volt
- static constexpr field_t PMIC0_SWA_SETTING{PMIC0_SWA_BYTE, PMIC0_SWA_SETTING_START, PMIC0_SWA_SETTING_LEN};
- static constexpr field_t PMIC0_SWA_RANGE{PMIC0_SWA_BYTE, PMIC0_SWA_RANGE_START, PMIC0_SWA_RANGE_LEN};
+ static constexpr field_t PMIC0_SWA_OFFSET{PMIC0_SWA_BYTE, PMIC0_SWA_OFFSET_START, PMIC0_SWA_OFFSET_LEN};
+ static constexpr field_t PMIC0_SWA_OFFSET_DIRECTION{PMIC0_SWA_BYTE, PMIC0_SWA_OFFSET_DIRECTION_START, PMIC0_SWA_OFFSET_DIRECTION_LEN};
// Byte 71: PMIC0 SWB Volt
- static constexpr field_t PMIC0_SWB_SETTING{PMIC0_SWB_BYTE, PMIC0_SWB_SETTING_START, PMIC0_SWB_SETTING_LEN};
- static constexpr field_t PMIC0_SWB_RANGE{PMIC0_SWB_BYTE, PMIC0_SWB_RANGE_START, PMIC0_SWB_RANGE_LEN};
+ static constexpr field_t PMIC0_SWB_OFFSET{PMIC0_SWB_BYTE, PMIC0_SWB_OFFSET_START, PMIC0_SWB_OFFSET_LEN};
+ static constexpr field_t PMIC0_SWB_OFFSET_DIRECTION{PMIC0_SWB_BYTE, PMIC0_SWB_OFFSET_DIRECTION_START, PMIC0_SWB_OFFSET_DIRECTION_LEN};
// Byte 72: PMIC0 SWC Volt
- static constexpr field_t PMIC0_SWC_SETTING{PMIC0_SWC_BYTE, PMIC0_SWC_SETTING_START, PMIC0_SWC_SETTING_LEN};
- static constexpr field_t PMIC0_SWC_RANGE{PMIC0_SWC_BYTE, PMIC0_SWC_RANGE_START, PMIC0_SWC_RANGE_LEN};
+ static constexpr field_t PMIC0_SWC_OFFSET{PMIC0_SWC_BYTE, PMIC0_SWC_OFFSET_START, PMIC0_SWC_OFFSET_LEN};
+ static constexpr field_t PMIC0_SWC_OFFSET_DIRECTION{PMIC0_SWC_BYTE, PMIC0_SWC_OFFSET_DIRECTION_START, PMIC0_SWC_OFFSET_DIRECTION_LEN};
// Byte 73: PMIC0 SWD Volt
- static constexpr field_t PMIC0_SWD_SETTING{PMIC0_SWD_BYTE, PMIC0_SWD_SETTING_START, PMIC0_SWD_SETTING_LEN};
- static constexpr field_t PMIC0_SWD_RANGE{PMIC0_SWD_BYTE, PMIC0_SWD_RANGE_START, PMIC0_SWD_RANGE_LEN};
+ static constexpr field_t PMIC0_SWD_OFFSET{PMIC0_SWD_BYTE, PMIC0_SWD_OFFSET_START, PMIC0_SWD_OFFSET_LEN};
+ static constexpr field_t PMIC0_SWD_OFFSET_DIRECTION{PMIC0_SWD_BYTE, PMIC0_SWD_OFFSET_DIRECTION_START, PMIC0_SWD_OFFSET_DIRECTION_LEN};
// Byte 74: PMIC1 SWA Volt
- static constexpr field_t PMIC1_SWA_SETTING{PMIC1_SWA_BYTE, PMIC1_SWA_SETTING_START, PMIC1_SWA_SETTING_LEN};
- static constexpr field_t PMIC1_SWA_RANGE{PMIC1_SWA_BYTE, PMIC1_SWA_RANGE_START, PMIC1_SWA_RANGE_LEN};
+ static constexpr field_t PMIC1_SWA_OFFSET{PMIC1_SWA_BYTE, PMIC1_SWA_OFFSET_START, PMIC1_SWA_OFFSET_LEN};
+ static constexpr field_t PMIC1_SWA_OFFSET_DIRECTION{PMIC1_SWA_BYTE, PMIC1_SWA_OFFSET_DIRECTION_START, PMIC1_SWA_OFFSET_DIRECTION_LEN};
// Byte 75: PMIC1 SWB Volt
- static constexpr field_t PMIC1_SWB_SETTING{PMIC1_SWB_BYTE, PMIC1_SWB_SETTING_START, PMIC1_SWB_SETTING_LEN};
- static constexpr field_t PMIC1_SWB_RANGE{PMIC1_SWB_BYTE, PMIC1_SWB_RANGE_START, PMIC1_SWB_RANGE_LEN};
+ static constexpr field_t PMIC1_SWB_OFFSET{PMIC1_SWB_BYTE, PMIC1_SWB_OFFSET_START, PMIC1_SWB_OFFSET_LEN};
+ static constexpr field_t PMIC1_SWB_OFFSET_DIRECTION{PMIC1_SWB_BYTE, PMIC1_SWB_OFFSET_DIRECTION_START, PMIC1_SWB_OFFSET_DIRECTION_LEN};
// Byte 76: PMIC1 SWC Volt
- static constexpr field_t PMIC1_SWC_SETTING{PMIC1_SWC_BYTE, PMIC1_SWC_SETTING_START, PMIC1_SWC_SETTING_LEN};
- static constexpr field_t PMIC1_SWC_RANGE{PMIC1_SWC_BYTE, PMIC1_SWC_RANGE_START, PMIC1_SWC_RANGE_LEN};
+ static constexpr field_t PMIC1_SWC_OFFSET{PMIC1_SWC_BYTE, PMIC1_SWC_OFFSET_START, PMIC1_SWC_OFFSET_LEN};
+ static constexpr field_t PMIC1_SWC_OFFSET_DIRECTION{PMIC1_SWC_BYTE, PMIC1_SWC_OFFSET_DIRECTION_START, PMIC1_SWC_OFFSET_DIRECTION_LEN};
// Byte 77: PMIC1 SWD Volt
- static constexpr field_t PMIC1_SWD_SETTING{PMIC1_SWD_BYTE, PMIC1_SWD_SETTING_START, PMIC1_SWD_SETTING_LEN};
- static constexpr field_t PMIC1_SWD_RANGE{PMIC1_SWD_BYTE, PMIC1_SWD_RANGE_START, PMIC1_SWD_RANGE_LEN};
+ static constexpr field_t PMIC1_SWD_OFFSET{PMIC1_SWD_BYTE, PMIC1_SWD_OFFSET_START, PMIC1_SWD_OFFSET_LEN};
+ static constexpr field_t PMIC1_SWD_OFFSET_DIRECTION{PMIC1_SWD_BYTE, PMIC1_SWD_OFFSET_DIRECTION_START, PMIC1_SWD_OFFSET_DIRECTION_LEN};
};
} // ns efd
diff --git a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_traits_ddr4.H b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_traits_ddr4.H
index 215893dce..784dba0f6 100644
--- a/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_traits_ddr4.H
+++ b/src/import/generic/memory/lib/spd/ddimm/ddr4/efd_traits_ddr4.H
@@ -1351,16 +1351,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWA_SETTING field specialization
+/// @note PMIC0_SWA_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWA_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWA_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC0 SWA Setting";
+ static constexpr const char* FIELD_STR = "PMIC0 SWA Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1370,16 +1370,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWA_RANGE field specialization
+/// @note PMIC0_SWA_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWA_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWA_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC0 SWA Range";
+ static constexpr const char* FIELD_STR = "PMIC0 SWA Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1389,16 +1390,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWB_SETTING field specialization
+/// @note PMIC0_SWB_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWB_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWB_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC0 SWB Setting";
+ static constexpr const char* FIELD_STR = "PMIC0 SWB Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1408,16 +1409,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWB_RANGE field specialization
+/// @note PMIC0_SWB_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWB_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWB_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC0 SWB Range";
+ static constexpr const char* FIELD_STR = "PMIC0 SWB Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1427,16 +1429,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWC_SETTING field specialization
+/// @note PMIC0_SWC_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWC_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWC_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC0 SWC Setting";
+ static constexpr const char* FIELD_STR = "PMIC0 SWC Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1446,16 +1448,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWC_RANGE field specialization
+/// @note PMIC0_SWC_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWC_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWC_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC0 SWC Range";
+ static constexpr const char* FIELD_STR = "PMIC0 SWC Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1465,16 +1468,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWD_SETTING field specialization
+/// @note PMIC0_SWD_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWD_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWD_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC0 SWD Setting";
+ static constexpr const char* FIELD_STR = "PMIC0 SWD Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1484,16 +1487,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC0_SWD_RANGE field specialization
+/// @note PMIC0_SWD_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWD_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC0_SWD_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC0 SWD Range";
+ static constexpr const char* FIELD_STR = "PMIC0 SWD Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1503,16 +1507,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWA_SETTING field specialization
+/// @note PMIC1_SWA_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWA_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWA_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC1 SWA Setting";
+ static constexpr const char* FIELD_STR = "PMIC1 SWA Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1522,16 +1526,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWA_RANGE field specialization
+/// @note PMIC1_SWA_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWA_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWA_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC1 SWA Range";
+ static constexpr const char* FIELD_STR = "PMIC1 SWA Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1541,16 +1546,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWB_SETTING field specialization
+/// @note PMIC1_SWB_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWB_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWB_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC1 SWB Setting";
+ static constexpr const char* FIELD_STR = "PMIC1 SWB Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1560,16 +1565,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWB_RANGE field specialization
+/// @note PMIC1_SWB_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWB_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWB_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC1 SWB Range";
+ static constexpr const char* FIELD_STR = "PMIC1 SWB Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1579,16 +1585,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWC_SETTING field specialization
+/// @note PMIC1_SWC_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWC_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWC_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC1 SWC Setting";
+ static constexpr const char* FIELD_STR = "PMIC1 SWC Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1598,16 +1604,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWC_RANGE field specialization
+/// @note PMIC1_SWC_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWC_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWC_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC1 SWC Range";
+ static constexpr const char* FIELD_STR = "PMIC1 SWC Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1617,16 +1624,16 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWD_SETTING field specialization
+/// @note PMIC1_SWD_OFFSET field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWD_SETTING, R >
+class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWD_OFFSET, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x3f;
- static constexpr const char* FIELD_STR = "PMIC1 SWD Setting";
+ static constexpr const char* FIELD_STR = "PMIC1 SWD Offset";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
@@ -1636,16 +1643,17 @@ class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUS
/// @class readerTraits
/// @brief trait structure to hold static SPD information
/// @tparam R the revision of the SPD field
-/// @note PMIC1_SWD_RANGE field specialization
+/// @note PMIC1_SWD_OFFSET_DIRECTION field specialization
/// @note valid for all revs
///
template< mss::spd::rev R >
-class readerTraits < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWD_RANGE, R >
+class readerTraits
+ < fields< mss::spd::device_type::DDR4, mss::efd::id::DDR4_CUSTOM_MICROCHIP>::PMIC1_SWD_OFFSET_DIRECTION, R >
{
public:
static constexpr size_t COMPARISON_VAL = 0x01;
- static constexpr const char* FIELD_STR = "PMIC1 SWD Range";
+ static constexpr const char* FIELD_STR = "PMIC1 SWD Offset Direction";
template <typename T>
using COMPARISON_OP = std::less_equal<T>;
diff --git a/src/import/generic/memory/lib/spd/ddimm/efd_decoder.H b/src/import/generic/memory/lib/spd/ddimm/efd_decoder.H
index acd8f0e1c..8427b5b88 100644
--- a/src/import/generic/memory/lib/spd/ddimm/efd_decoder.H
+++ b/src/import/generic/memory/lib/spd/ddimm/efd_decoder.H
@@ -67,7 +67,6 @@ inline fapi2::ReturnCode reader( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHI
const std::vector<IT>& i_spd_data,
OT& o_value)
{
-
FAPI_TRY( (mss::get_field<endian::LITTLE, F, TT>(i_target, i_spd_data, mss::READ_SPD_FIELD, o_value)),
"Failed efd::read_field() for %s", spd::c_str(i_target) );
@@ -834,176 +833,176 @@ class base_decoder
}
///
- /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_SETTING
+ /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swa_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swa_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_RANGE
+ /// @brief Decodes PMIC0 SWA Volt -> PMIC0_SWA_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swa_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swa_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_SETTING
+ /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swb_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swb_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_RANGE
+ /// @brief Decodes PMIC0 SWB Volt -> PMIC0_SWB_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swb_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swb_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_SETTING
+ /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swc_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swc_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_RANGE
+ /// @brief Decodes PMIC0 SWC Volt -> PMIC0_SWC_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swc_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swc_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_SETTING
+ /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swd_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swd_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_RANGE
+ /// @brief Decodes PMIC0 SWD Volt -> PMIC0_SWD_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic0_swd_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic0_swd_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_SETTING
+ /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swa_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swa_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_RANGE
+ /// @brief Decodes PMIC1 SWA Volt -> PMIC1_SWA_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swa_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swa_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_SETTING
+ /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swb_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swb_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_RANGE
+ /// @brief Decodes PMIC1 SWB Volt -> PMIC1_SWB_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swb_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swb_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_SETTING
+ /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swc_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swc_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_RANGE
- /// @param[out] o_output encoding from SPD
+ /// @brief Decodes PMIC1 SWC Volt -> PMIC1_SWC_OFFSET_DIRECTION
+ /// @param[out] o_output ncoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swc_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swc_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_SETTING
+ /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_OFFSET
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swd_setting(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swd_offset(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
}
///
- /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_RANGE
+ /// @brief Decodes PMIC1 SWD Volt -> PMIC1_SWD_OFFSET_DIRECTION
/// @param[out] o_output encoding from SPD
/// @return FAPI2_RC_SUCCESS if okay
///
- virtual fapi2::ReturnCode pmic1_swd_range(uint8_t& o_output) const
+ virtual fapi2::ReturnCode pmic1_swd_offset_direction(uint8_t& o_output) const
{
o_output = 0;
return fapi2::FAPI2_RC_SUCCESS;
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