Hostboot - Updated HWPs from defect SW222043 (week 8/27)

CQ: SW222043
Change-Id: I0c6d6b500e7797ef0e2961f501bbe174e21514d3
Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6087
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

10 files changed, 464 insertions, 33 deletions

diff --git a/src/usr/hwpf/hwp/build_winkle_images/makefile b/src/usr/hwpf/hwp/build_winkle_images/makefile
index f5901964b..10965209d 100644
--- a/src/usr/hwpf/hwp/build_winkle_images/makefile
+++ b/src/usr/hwpf/hwp/build_winkle_images/makefile
@@ -44,6 +44,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/mvpd_accessors
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar
 EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/occ/occ_procedures
+EXTRAINCDIR += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr
 
 CFLAGS += -D __FAPI
 
@@ -65,13 +66,15 @@ OBJS =  build_winkle_images.o   \
         p8_slw_build_fixed.o      \
         p8_image_help_base.o    \
         p8_pfet_init.o          \
-        p8_pfet_control.o
+        p8_pfet_control.o       \
+        p8_block_wakeup_intr.o
 
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 ##  EXAMPLE:
 #   VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/<HWP_dir>
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_slw_build
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_set_pore_bar
+VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr
 
 include ${ROOTPATH}/config.mk
 
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.C b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.C
new file mode 100644
index 000000000..5125cba0f
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.C
@@ -0,0 +1,163 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_block_wakeup_intr.C,v 1.1 2013/08/27 16:13:05 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_block_wakeup_intr.C,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+/**
+  * OWNER NAME:   Greg Still         Email: stillgs@us.ibm.com
+  * BACKUP NAME : Michael Olsen      Email: cmolsen@us.ibm.com
+  *
+  * @file p8_block_wakeup_intr.C
+  * @brief Set/reset the BLOCK_REG_WKUP_SOURCES bit in the PCBS-PM associated 
+  *         with an EX chiplet
+  *
+  * @verbatim
+  * High-level procedure flow:
+  *
+  *  With set/reset enum parameter, either set or clear PMGP0(53)
+  *
+  *  Procedure Prereq:
+  *     - System clocks are running
+  * @endverbatim
+  */
+//------------------------------------------------------------------------------
+
+
+// ----------------------------------------------------------------------
+// Includes
+// ----------------------------------------------------------------------
+
+#include "p8_block_wakeup_intr.H"
+
+extern "C" {
+
+using namespace fapi;
+
+
+/**
+ * p8_block_wakeup_intr
+ *
+ * @param[in] i_ex_target EX target
+ * @param[in] i_operation  SET, RESET
+ *
+ * @retval ECMD_SUCCESS
+ * @retval ERROR only those from called functions or MACROs
+ */
+fapi::ReturnCode
+p8_block_wakeup_intr(  const fapi::Target& i_ex_target,
+                        PROC_BLKWKUP_OPS i_operation )
+
+{
+    fapi::ReturnCode    rc;
+    uint32_t            e_rc = 0;
+    uint64_t            address;
+    uint64_t            offset;
+    ecmdDataBufferBase  data(64);
+
+    fapi::Target        l_parentTarget;
+    uint8_t             attr_chip_unit_pos = 0;
+    
+    // PMGP0 Bit definitions
+    const uint32_t      BLOCK_REG_WKUP_SOURCES = 53;
+
+    // This must stay in sync with enum defined the .H file
+    const char* PROC_BLKWKUP_OPS_NAMES[] =
+    {
+        "SET",
+        "RESET"
+    };
+
+    do
+    {
+
+        FAPI_INF("Executing p8_block_wakeup_intr with operation %s to EX %s...",
+                    PROC_BLKWKUP_OPS_NAMES[i_operation],
+                    i_ex_target.toEcmdString());
+      
+
+        // Get the parent chip to target the registers
+        rc = fapiGetParentChip(i_ex_target, l_parentTarget);
+        if (rc)
+        {
+            FAPI_ERR("fapiGetParentChip with rc = 0x%x", (uint32_t)rc);
+            break;
+        }
+
+        // Get the core number
+        rc = FAPI_ATTR_GET(ATTR_CHIP_UNIT_POS, &i_ex_target, attr_chip_unit_pos);
+        if (rc)
+        {
+            FAPI_ERR("fapiGetAttribute of ATTR_CHIP_UNIT_POS with rc = 0x%x", (uint32_t)rc);
+            break;
+        }
+
+        FAPI_DBG("Core number = %d", attr_chip_unit_pos);
+        offset = attr_chip_unit_pos * 0x01000000;
+
+        if (i_operation == BLKWKUP_SET)
+        {
+            FAPI_INF("Setting Block Interrupt Sources...");
+            
+            address =  EX_PMGP0_OR_0x100F0102 + offset;                                        
+            
+            e_rc |= data.flushTo0();
+            e_rc |= data.setBit(BLOCK_REG_WKUP_SOURCES);
+            E_RC_CHECK(e_rc, rc);
+
+            PUTSCOM(rc, l_parentTarget, address, data);
+
+            
+        }
+        else if (i_operation == BLKWKUP_RESET)
+        {
+
+            FAPI_INF("Clearing Block Interrupt Sources...");
+            
+            address =  EX_PMGP0_AND_0x100F0101 + offset;                                        
+            
+            e_rc |= data.flushTo1();
+            e_rc |= data.clearBit(BLOCK_REG_WKUP_SOURCES);
+            E_RC_CHECK(e_rc, rc);
+
+            PUTSCOM(rc, l_parentTarget, address, data);
+
+        }
+        else
+        {
+            FAPI_ERR("Invalid parameter specified. Operation %x", i_operation );
+            const fapi::Target & EX_TARGET = i_ex_target;
+            PROC_BLKWKUP_OPS & OPERATION = i_operation ;
+            FAPI_SET_HWP_ERROR(rc, RC_PROCPM_BLKWKUP_CODE_BAD_OP);
+            break;
+        }
+        
+    } while (0);
+    
+    return rc;   
+}
+
+} //end extern C
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.H b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.H
new file mode 100644
index 000000000..a896c7076
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.H
@@ -0,0 +1,88 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2013                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: p8_block_wakeup_intr.H,v 1.1 2013/08/27 16:13:07 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_block_wakeup_intr.H,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+/**
+  * OWNER NAME:   Greg Still         Email: stillgs@us.ibm.com
+  * BACKUP NAME : Michael Olsen      Email: cmolsen@us.ibm.com
+  *
+  * @file p8_block_wakeup_intr.C
+  * @brief Set/reset the BLOCK_REG_WKUP_SOURCES bit in the PCBS-PM associated 
+  *         with an EX chiplet
+ */  
+//------------------------------------------------------------------------------
+
+#ifndef _PROC_BLKWKUP_H_
+#define _PROC_BLKWKUP_H_
+
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+#define NUM_BLKWKUP_OPS 2
+enum PROC_BLKWKUP_OPS 
+{
+    BLKWKUP_SET,
+    BLKWKUP_RESET
+};
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+
+#include "p8_pm.H"
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_block_wakeup_intr_FP_t) (
+                            const fapi::Target&, 
+                            PROC_BLKWKUP_OPS);
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function prototype
+//------------------------------------------------------------------------------
+
+/**
+ * p8_block_wakeup_intr
+ *
+ * @param[in] i_target EX target
+ * @param[in] i_operation  SET, RESET
+ *
+ * @retval ECMD_SUCCESS
+ * @retval ERROR only those from called functions or MACROs
+ */
+fapi::ReturnCode 
+p8_block_wakeup_intr(  const fapi::Target& i_target, 
+                        PROC_BLKWKUP_OPS i_operation);
+
+} // extern "C"
+
+#endif // _PROC_BLKWKUP_H_
diff --git a/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
new file mode 100644
index 000000000..afc58385d
--- /dev/null
+++ b/src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
@@ -0,0 +1,34 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/hwpf/hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml $ -->
+<!--                                                                        -->
+<!-- IBM CONFIDENTIAL                                                       -->
+<!--                                                                        -->
+<!-- COPYRIGHT International Business Machines Corp. 2013                   -->
+<!--                                                                        -->
+<!-- p1                                                                     -->
+<!--                                                                        -->
+<!-- Object Code Only (OCO) source materials                                -->
+<!-- Licensed Internal Code Source Materials                                -->
+<!-- IBM HostBoot Licensed Internal Code                                    -->
+<!--                                                                        -->
+<!-- The source code for this program is not published or otherwise         -->
+<!-- divested of its trade secrets, irrespective of what has been           -->
+<!-- deposited with the U.S. Copyright Office.                              -->
+<!--                                                                        -->
+<!-- Origin: 30                                                             -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+<!-- $Id: p8_block_wakeup_intr_errors.xml,v 1.1 2013/08/27 16:14:07 stillgs Exp $ -->
+<!-- Error definitions for p8_block_wakeup_intr procedure -->
+<hwpErrors>
+  <!-- *********************************************************************** -->
+  <hwpError>
+    <rc>RC_PROCPM_BLKWKUP_CODE_BAD_OP</rc>
+    <description>An invalid operation (eg besides Set or Clear ENUM) was passed to p8_block_wakeup_intr</description>
+    <ffdc>EX_TARGET</ffdc>
+   <ffdc>OPERATION</ffdc>
+  </hwpError>
+  <!-- *********************************************************************** -->
+</hwpErrors>
diff --git a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_ex_cleanup.C b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_ex_cleanup.C
index 17575d8ee..613252c58 100644
--- a/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_ex_cleanup.C
+++ b/src/usr/hwpf/hwp/dram_initialization/host_mpipl_service/proc_mpipl_ex_cleanup.C
@@ -20,8 +20,8 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: proc_mpipl_ex_cleanup.C,v 1.5 2013/07/18 13:38:04 stillgs Exp $
-// $Source: /afs/awd.austin.ibm.com/proj/p9/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_ex_cleanup.C,v $
+// $Id: proc_mpipl_ex_cleanup.C,v 1.6 2013/08/20 17:31:41 stillgs Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_mpipl_ex_cleanup.C,v $
 //------------------------------------------------------------------------------
 // *|
 // *! (C) Copyright International Business Machines Corp. 2012
diff --git a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
index ec8a17164..e2da3baf9 100644
--- a/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
+++ b/src/usr/hwpf/hwp/dram_training/mss_draminit_trainadv/mss_draminit_training_advanced.C
@@ -20,7 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// $Id: mss_draminit_training_advanced.C,v 1.35 2013/08/08 13:07:28 sasethur Exp $
+// $Id: mss_draminit_training_advanced.C,v 1.36 2013/08/23 13:09:34 sasethur Exp $
 /* File is created by SARAVANAN SETHURAMAN on Thur 29 Sept 2011. */
 
 //------------------------------------------------------------------------------
@@ -75,6 +75,7 @@
 //  1.33   | sasethur |12-Jun-13| Updated mcbist setup attribute 
 //  1.34   | sasethur |20-Jun-13| Fixed read_vref print, setup attribute
 //  1.35   | sasethur |08-Aug-13| Fixed fw comment.
+//  1.36   | sasethur |23-Aug-13| Ability to run MCBIST is enabled.
 
 
 // This procedure Schmoo's DRV_IMP, SLEW, VREF (DDR, CEN), RCV_IMP based on attribute from effective config procedure
@@ -321,7 +322,7 @@ fapi::ReturnCode mss_draminit_training_advanced_cloned(const fapi::Target & i_ta
     			    return rc;
     			}
     		    }
-    		    if (((l_shmoo_param_valid & DELAY_REG) != 0) || (l_shmoo_type_valid & TEST_NONE) != 0) 
+    		    if (((l_shmoo_param_valid & DELAY_REG) != 0) || (l_shmoo_type_valid != TEST_NONE))
     		    {
     			rc = delay_shmoo(i_target_mba, l_port, l_shmoo_type_valid, &l_left_margin, &l_right_margin, l_shmoo_param); 
     			if (rc)
diff --git a/src/usr/hwpf/hwp/memory_attributes.xml b/src/usr/hwpf/hwp/memory_attributes.xml
index a65b076d1..1b4546879 100644
--- a/src/usr/hwpf/hwp/memory_attributes.xml
+++ b/src/usr/hwpf/hwp/memory_attributes.xml
@@ -21,7 +21,7 @@
 <!--                                                                        -->
 <!-- IBM_PROLOG_END_TAG                                                     -->
 <attributes>
-<!-- $Id: memory_attributes.xml,v 1.83 2013/08/12 20:40:29 bellows Exp $ -->
+<!-- $Id: memory_attributes.xml,v 1.88 2013/09/04 18:03:12 bellows Exp $ -->
 <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
 <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
 <!-- *********************************************************************** -->
@@ -3161,21 +3161,6 @@ Firmware shares some code with the processor, so the attribute is named so they
     <persistent/>
 </attribute>
 
-<!-- Mark Bellows said it will be removed
-<attribute>
-    <id>ATTR_MEMB_NEST_FREQ</id>
-    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
-    <description>Frequency of the Centaur NEST PLL in MHz.
-consumer:  cen_mem_pll_initf
-firmware notes:  Platforms should initialize the attribute to the correct value for the system.</description>
-    <valueType>uint32</valueType>
-    <platInit/>
-    <writeable/>
-    <odmVisable/>
-    <odmChangeable/>
-</attribute>
--->
-
 <attribute>
     <id>ATTR_CDIMM_SENSOR_MAP_PRIMARY</id>
     <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
@@ -3499,6 +3484,18 @@ Will be set at an MBA level with one policy to be used</description>
 </attribute>
 
 <attribute>
+    <id>ATTR_L4_BANK_DELETE_VPD</id>
+    <targetType>TARGET_TYPE_MEMBUF_CHIP</targetType>
+    <description>L4 Bank Delete settings in VPD.
+Denotes what banks have been deleted from the L4.
+Data will be pulled from CDIMM VPD if CDIMM present.
+Data will be pulled from backplane VPD if IS DIMMs present.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <persistent/>
+</attribute>
+
+<attribute>
     <id>ATTR_MSS_DIMM_POWER_TEST_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
     <description>runtime memory throttle values adjusted by the dimm power test
@@ -3550,9 +3547,8 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>RAS weight to use for memory throttle control</description>
+    <description>RAS weight to use for memory throttle control - set in thermal procedures</description>
     <valueType>uint8</valueType>
-    <platInit/>
     <writeable/>
     <odmVisable/>
     <odmChangeable/>
@@ -3561,9 +3557,8 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>CAS weight to use for memory throttle control</description>
+    <description>CAS weight to use for memory throttle control - set in thermal procedures</description>
     <valueType>uint8</valueType>
-    <platInit/>
     <writeable/>
     <odmVisable/>
     <odmChangeable/>
@@ -3571,9 +3566,79 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 
 <!-- TODO: RTC 82331 - Add this attribute to the Accessor HWP
 <attribute>
+    <id>ATTR_VPD_CKE_PRI_MAP</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A.  Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D.  In the end, the AB and CD portions form a 32 bit word for each mba to write into the corresponding ddrphy register</description>
+    <valueType>uint32</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_CKE_PWR_MAP</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD keyword MT bytes 56 to 59 MT(56:59) for the Logical DIMM associated with port A.  Bytes 120:123 for port B, 184:187 for port C and 248:251 for port D</description>
+    <valueType>uint32</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_GPO</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD keyword MT bytes 61 MT(61) for the Logical DIMM associated with port A.  Bytes 125 for port B, 189 for port C and 253 for port D</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_RLO</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD keyword MT byte 60 bits 4:7 for the Logical DIMM associated with port A.  Byte 124 bits 4:7 for port B, 188 bits 4:7 for port C and 252 bits 4:7 for port D</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_WLO</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD keyword MT byte 60 bits 0:3 for the Logical DIMM associated with port A.  Byte 124 bits 0:3 for port B, 188 bits 0:3 for port C and 252 bits 0:3 for port D</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_TSYS_ADR</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD MR keyword byte 49 for ports A and B and byte 177 for port C and D.    This means that all ADR blocks use this value on an mba level</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
+    <id>ATTR_VPD_TSYS_DP18</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>This value comes from the VPD MR keyword byte 113 for ports A and B and byte 241 for port C and D.  This means all DP18 blocks use this value on a mba level</description>
+    <valueType>uint8</valueType>
+    <platInit/>
+    <odmVisable/>
+    <array>2</array>
+</attribute>
+
+<attribute>
     <id>ATTR_VPD_MT_CKE_PRI_MAP</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 54 and 55 MT(54:55) for the Logical DIMM associated with port A.  Bytes 118:119 for port B, 182:183 for port C and 246:247 for port D.  The AB and CD portions form a 32 bit word for each mba</description>
+    <description>OBSOLETE - See ATTR_VPD_CKE_PRI_MAP</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
@@ -3583,7 +3648,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MT_CKE_PWR_MAP</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MT bytes 56 to 59 MT(56:59) for the Logical DIMM associated with port A.  Bytes 120:123 for port B, 184:187 for port C and 248:251 for port D</description>
+    <description>OBSOLETE - See ATTR_VPD_CKE_PWR_MAP</description>
     <valueType>uint32</valueType>
     <platInit/>
     <odmVisable/>
@@ -3593,7 +3658,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MR_GPO</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MR bytes 50 MR(50) for the Logical DIMM associated with port A.  Bytes 114 for port B, 178 for port C and 242 for port D</description>
+    <description>OBSOLETE - see ATTR_VPD_GPO</description>
     <valueType>uint8</valueType>
     <platInit/>
     <odmVisable/>
@@ -3603,7 +3668,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MR_RLO</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MR byte 49 bits 4:7 for the Logical DIMM associated with port A.  Byte 113 bits 4:7 for port B, 177 bits 4:7 for port C and 241 bits 4:7 for port D</description>
+    <description>OBSOLETE - see ATTR_VPD_RLO</description>
     <valueType>uint8</valueType>
     <platInit/>
     <odmVisable/>
@@ -3613,7 +3678,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MR_WLO</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD keyword MR byte 49 bits 0:3 for the Logical DIMM associated with port A.  Byte 113 bits 0:3 for port B, 177 bits 0:3 for port C and 241 bits 0:3 for port D</description>
+    <description>OBSOLETE - see ATTR_VPD_WLO</description>
     <valueType>uint8</valueType>
     <platInit/>
     <odmVisable/>
@@ -3623,7 +3688,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MR_TSYS_ADR</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 51 for ports A and B and byte 179 for port C and D.    This means that all ADR blocks use this value on an mba level</description>
+    <description>OBSOLETE see ATTR_VPD_TSYS_ADR</description>
     <valueType>uint8</valueType>
     <platInit/>
     <odmVisable/>
@@ -3633,7 +3698,7 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
 <attribute>
     <id>ATTR_VPD_MR_TSYS_DP18</id>
     <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
-    <description>This value comes from the VPD MR keyword byte 115 for ports A and B and byte 243 for port C and D.  This means all DP18 blocks use this value on a mba level</description>
+    <description>OBSOLETE see ATTR_VPD_TSYS_DP18</description>
     <valueType>uint8</valueType>
     <platInit/>
     <odmVisable/>
@@ -3733,6 +3798,26 @@ will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on th
     <odmChangeable/>
 </attribute>
 
+<attribute>
+    <id>ATTR_MCBIST_RANDOM_SEED_VALUE</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <valueType>uint32</valueType>
+    <writeable/>
+    <odmVisable/>
+    <odmChangeable/>
+</attribute>
+
+<attribute>
+    <id>ATTR_MCBIST_RANDOM_SEED_TYPE</id>
+    <targetType>TARGET_TYPE_MBA_CHIPLET</targetType>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <valueType>uint8</valueType>
+    <writeable/>
+    <odmVisable/>
+    <odmChangeable/>
+</attribute>
+
 <!-- DO NOT EDIT THIS FILE DIRECTLY PLEASE UPDATE THE ODS FILE AND FOLLOW THE INSTRUCTION TAB -->
 <!-- PLEASE SEE MARK BELLOWS (BELLOWS.IBM.COM) OR OTHERS ON MEMORY TEAM FOR HELP -->
 </attributes>
diff --git a/src/usr/hwpf/makefile b/src/usr/hwpf/makefile
index dc90a1745..57b3efb56 100644
--- a/src/usr/hwpf/makefile
+++ b/src/usr/hwpf/makefile
@@ -116,7 +116,8 @@ HWP_ERROR_XML_FILES = hwp/fapiHwpErrorInfo.xml   \
     hwp/mc_config/mss_eff_config/memory_mss_eff_config.xml \
     hwp/mc_config/mss_eff_config/memory_mss_eff_config_cke_map.xml \
     hwp/mc_config/mss_eff_config/memory_mss_eff_config_rank_group.xml \
-    hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml
+    hwp/mc_config/mss_eff_config/memory_mss_eff_config_termination.xml \
+    hwp/build_winkle_images/p8_block_wakeup_intr/p8_block_wakeup_intr_errors.xml
 
 ## these get generated into obj/genfiles/AttributeIds.H
 HWP_ATTR_XML_FILES = hwp/memory_attributes.xml \
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 258d7260e..0252e319a 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -13067,4 +13067,57 @@ firmware notes: Platforms should initialize this attribute to AUTO (0)</descript
   </hwpfToHbAttrMap>
 </attribute>
 
+<attribute>
+    <id>MCBIST_RANDOM_SEED_VALUE</id>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_RANDOM_SEED_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_RANDOM_SEED_TYPE</id>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_RANDOM_SEED_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L4_BANK_DELETE_VPD</id>
+    <description>L4 Bank Delete settings in VPD.
+        Denotes what banks have been deleted from the L4.
+        Data will be pulled from CDIMM VPD if CDIMM present.
+        Data will be pulled from backplane VPD if IS DIMMs present.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L4_BANK_DELETE_VPD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 </attributes>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 79aaad44b..b52ea98f7 100644
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -1044,6 +1044,8 @@
     <attribute><id>MSS_DIMM_POWER_TEST_MEM_THROTTLE_DENOMINATOR</id></attribute>
     <attribute><id>MSS_THROTTLE_CONTROL_RAS_WEIGHT</id></attribute>
     <attribute><id>MSS_THROTTLE_CONTROL_CAS_WEIGHT</id></attribute>
+    <attribute><id>MCBIST_RANDOM_SEED_VALUE</id></attribute>
+    <attribute><id>MCBIST_RANDOM_SEED_TYPE</id></attribute>
 </targetType>
 
 <targetType>
@@ -1194,6 +1196,7 @@
     <attribute><id>CDIMM_SENSOR_MAP_PRIMARY</id></attribute>
     <attribute><id>CDIMM_SENSOR_MAP_SECONDARY</id></attribute>
     <attribute><id>MSS_BLUEWATERFALL_BROKEN</id></attribute>
+    <attribute><id>L4_BANK_DELETE_VPD</id></attribute>
 </targetType>
 
 <!-- Centaur L4 -->