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authorAndre Marin <aamarin@us.ibm.com>2017-08-06 19:32:09 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-08-21 14:58:21 -0400
commit87ffda53f58ef4662881bcac6cdcd534115044d4 (patch)
tree0b1cafafa474d486582d1e6e1f7e30664a0ac912 /src
parentf7a823d1fd89870c34205e2067c67d14714c3ef7 (diff)
downloadtalos-hostboot-87ffda53f58ef4662881bcac6cdcd534115044d4.tar.gz
talos-hostboot-87ffda53f58ef4662881bcac6cdcd534115044d4.zip
Modify BAD_DQ_BITMAP to DIMM target for FW to reuse w/Centaur
Change-Id: Icd3f5f2283c5deae3a937cb14fcf0eff7bc2e7a4 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43225 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com> Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com> Reviewed-by: Matt K. Light <mklight@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43237 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C8
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H79
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C62
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H10
-rw-r--r--src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml4
5 files changed, 49 insertions, 114 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
index a38857963..3a4c5b998 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mc/port.C
@@ -465,17 +465,17 @@ fapi2::ReturnCode restore_repairs( const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
fapi2::buffer<uint8_t>& o_repairs_applied,
fapi2::buffer<uint8_t>& o_repairs_exceeded)
{
- uint8_t l_bad_bits[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT];
-
- FAPI_TRY( mss::bad_dq_bitmap(i_target, &(l_bad_bits[0][0][0])) );
+ uint8_t l_bad_bits[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
o_repairs_applied = 0;
o_repairs_exceeded = 0;
for (const auto& l_dimm : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target))
{
+ FAPI_TRY( mss::bad_dq_bitmap(l_dimm, &(l_bad_bits[0][0])) );
+
FAPI_TRY( (restore_repairs_helper<fapi2::TARGET_TYPE_DIMM, MAX_RANK_PER_DIMM, BAD_DQ_BYTE_COUNT>(
- l_dimm, l_bad_bits[mss::index(l_dimm)], o_repairs_applied, o_repairs_exceeded)) );
+ l_dimm, l_bad_bits, o_repairs_applied, o_repairs_exceeded)) );
}
fapi_try_exit:
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
index 22d8f6d24..745011c1d 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/mss_attribute_accessors.H
@@ -27336,9 +27336,9 @@ fapi_try_exit:
///
/// @brief ATTR_BAD_DQ_BITMAP getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_DIMM>
+/// @param[in] const ref to the TARGET_TYPE_DIMM
/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (A)
+/// @note Generated by gen_accessors.pl generateParameters (PROC_CHIP)
/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
/// @note Bad DQ bitmap from a controller point of view. The data is a 10 byte bitmap for
/// each of 4 possible ranks. The bad DQ data is stored in NVRAM, and it is stored
@@ -27354,82 +27354,15 @@ inline fapi2::ReturnCode bad_dq_bitmap(const fapi2::Target<fapi2::TARGET_TYPE_DI
return fapi2::FAPI2_RC_INVALID_PARAMETER;
}
- uint8_t l_value[2][2][4][10];
- auto l_mca = i_target.getParent<fapi2::TARGET_TYPE_MCA>();
- auto l_mcs = l_mca.getParent<fapi2::TARGET_TYPE_MCS>();
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_BAD_DQ_BITMAP, l_mcs, l_value) );
- memcpy(o_array, &(l_value[mss::index(l_mca)][mss::index(i_target)][0]), 40);
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_BAD_DQ_BITMAP: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_BAD_DQ_BITMAP getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCA>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (B)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Bad DQ bitmap from a controller point of view. The data is a 10 byte bitmap for
-/// each of 4 possible ranks. The bad DQ data is stored in NVRAM, and it is stored
-/// in a special format translated to a DIMM Connector point of view. All of these
-/// details are hidden from the user of this
-/// attribute.
-///
-inline fapi2::ReturnCode bad_dq_bitmap(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target, uint8_t* o_array)
-{
- if (o_array == nullptr)
- {
- FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
- return fapi2::FAPI2_RC_INVALID_PARAMETER;
- }
-
- uint8_t l_value[2][2][4][10];
- auto l_mcs = i_target.getParent<fapi2::TARGET_TYPE_MCS>();
-
- FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_BAD_DQ_BITMAP, l_mcs, l_value) );
- memcpy(o_array, &(l_value[mss::index(i_target)][0]), 80);
- return fapi2::current_err;
-
-fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_BAD_DQ_BITMAP: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
- return fapi2::current_err;
-}
-
-///
-/// @brief ATTR_BAD_DQ_BITMAP getter
-/// @param[in] const ref to the fapi2::Target<fapi2::TARGET_TYPE_MCS>
-/// @param[out] uint8_t* memory to store the value
-/// @note Generated by gen_accessors.pl generateParameters (C)
-/// @return fapi2::ReturnCode - FAPI2_RC_SUCCESS iff get is OK
-/// @note Bad DQ bitmap from a controller point of view. The data is a 10 byte bitmap for
-/// each of 4 possible ranks. The bad DQ data is stored in NVRAM, and it is stored
-/// in a special format translated to a DIMM Connector point of view. All of these
-/// details are hidden from the user of this
-/// attribute.
-///
-inline fapi2::ReturnCode bad_dq_bitmap(const fapi2::Target<fapi2::TARGET_TYPE_MCS>& i_target, uint8_t* o_array)
-{
- if (o_array == nullptr)
- {
- FAPI_ERR("nullptr passed to attribute accessor %s", __func__);
- return fapi2::FAPI2_RC_INVALID_PARAMETER;
- }
-
- uint8_t l_value[2][2][4][10];
+ uint8_t l_value[4][10];
FAPI_TRY( FAPI_ATTR_GET(fapi2::ATTR_BAD_DQ_BITMAP, i_target, l_value) );
- memcpy(o_array, &l_value, 160);
+ memcpy(o_array, &l_value, 40);
return fapi2::current_err;
fapi_try_exit:
- FAPI_ERR("failed accessing ATTR_BAD_DQ_BITMAP: 0x%lx (target: %s)",
- uint64_t(fapi2::current_err), mss::c_str(i_target));
+ FAPI_ERR("failed accessing ATTR_BAD_DQ_BITMAP: 0x%lx",
+ uint64_t(fapi2::current_err));
return fapi2::current_err;
}
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
index 547fd3d54..eebb2b5f1 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C
@@ -2581,12 +2581,13 @@ fapi_try_exit:
///
fapi2::ReturnCode reset_bad_bits( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
{
- // The magic 10 is because there are 80 bits represented in this attribute, and each element is 8 bits.
- // So to get to 80, we need 10 bytes.
- uint8_t l_bad_dq[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] = { 0 };
- FAPI_TRY( mss::bad_dq_bitmap(i_target, &(l_bad_dq[0][0][0])) );
+ for( const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
+ {
+ uint8_t l_bad_dq[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
- return reset_bad_bits_helper(i_target, l_bad_dq);
+ FAPI_TRY( mss::bad_dq_bitmap(d, &(l_bad_dq[0][0])) );
+ FAPI_TRY( reset_bad_bits_helper(d, l_bad_dq) );
+ }
fapi_try_exit:
return fapi2::current_err;
@@ -2596,14 +2597,11 @@ fapi_try_exit:
/// @brief Reset the bad-bits masks for a port - helper for ease of testing
/// @note Read the bad bits from the f/w attributes and stuff them in the
/// appropriate registers.
-/// @note The magic 10 is because there are 80 bits represented in this attribute, and each element is 8 bits.
-/// So to get to 80, we need 10 bytes.
/// @param[in] i_target the fapi2 target of the port
-/// @param[in] i_bad_dq array representing the data from the bad dq bitmap
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
///
-fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- const uint8_t i_bad_dq[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] )
+fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const uint8_t i_bad_dq[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT])
{
typedef dp16Traits<TARGET_TYPE_MCA> TT;
@@ -2616,7 +2614,7 @@ fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_
{
uint64_t l_rp = 0;
uint64_t l_dimm_index = rank::get_dimm_from_rank(r);
- FAPI_TRY( mss::rank::get_pair_from_rank(i_target, r, l_rp) );
+ FAPI_TRY( mss::rank::get_pair_from_rank(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), r, l_rp) );
FAPI_INF("processing bad bits for DIMM%d rank %d (%d) rp %d", l_dimm_index, mss::index(r), r, l_rp);
@@ -2628,7 +2626,7 @@ fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_
const auto& l_addrs = TT::BIT_DISABLE_REG[l_rp];
// This is the section of the attribute we need to use. The result is an array of 10 bytes.
- const uint8_t* l_bad_bits = &(i_bad_dq[l_dimm_index][mss::index(r)][0]);
+ const uint8_t* l_bad_bits = &(i_bad_dq[mss::index(r)][0]);
// Where in the array we are, incremented by two for every DP
size_t l_byte_index = 0;
@@ -2642,7 +2640,7 @@ fapi2::ReturnCode reset_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_
l_bad_bits[l_byte_index], l_bad_bits[l_byte_index + 1]);
// TODO RTC: 163674 Only wriiting the DISABLE0 register - not sure what happened to the DQS?
- FAPI_TRY( mss::putScom(i_target, a.first, l_register_value) );
+ FAPI_TRY( mss::putScom(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), a.first, l_register_value) );
l_byte_index += 2;
}
}
@@ -2661,24 +2659,27 @@ fapi_try_exit:
///
fapi2::ReturnCode record_bad_bits( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target )
{
- const auto& l_mcs = mss::find_target<TARGET_TYPE_MCS>(i_target);
- uint8_t l_value[PORTS_PER_MCS][MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = { 0 };
+ uint8_t l_value[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
// Process the bad bits into an array. We copy these in to their own array
// as it allows the compiler to check indexes where a passed pointer wouldn't
// otherwise do.
- uint8_t l_data[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = { 0 };
- FAPI_TRY( mss::dp16::record_bad_bits_helper(i_target, l_data) );
+ uint8_t l_data[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] = {};
- // Read the attribute
- FAPI_TRY( mss::bad_dq_bitmap(l_mcs, &(l_value[0][0][0][0])) );
+ for( const auto& d : mss::find_targets<fapi2::TARGET_TYPE_DIMM>(i_target) )
+ {
+ FAPI_TRY( mss::dp16::record_bad_bits_helper(d, l_data) );
- // Modify
- memcpy( &(l_value[mss::index(i_target)][0][0][0]), &(l_data[0][0][0]),
- MAX_DIMM_PER_PORT * MAX_RANK_PER_DIMM * 10 );
+ // Read the attribute
+ FAPI_TRY( mss::bad_dq_bitmap(d, &(l_value[0][0])) );
- // Write
- FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_BAD_DQ_BITMAP, l_mcs, l_value) );
+ // Modify
+ memcpy( &(l_value[0][0]), &(l_data[0][0]),
+ MAX_RANK_PER_DIMM * 10 );
+
+ // Write
+ FAPI_TRY( FAPI_ATTR_SET(fapi2::ATTR_BAD_DQ_BITMAP, d, l_value) );
+ }
fapi_try_exit:
return fapi2::current_err;
@@ -2689,11 +2690,11 @@ fapi_try_exit:
/// @note This is different than a register write as it writes attributes which
/// cause firmware to act on the disabled bits.
/// @param[in] i_target the fapi2 target of the port
-/// @param[out] o_bad_dq an array of [MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] containing the attribute information
+/// @param[out] o_bad_dq an array of [MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] containing the attribute information
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
///
-fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- uint8_t (&o_bad_dq)[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] )
+fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t (&o_bad_dq)[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] )
{
typedef dp16Traits<TARGET_TYPE_MCA> TT;
@@ -2706,7 +2707,7 @@ fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE
{
uint64_t l_rp = 0;
uint64_t l_dimm_index = rank::get_dimm_from_rank(r);
- FAPI_TRY( mss::rank::get_pair_from_rank(i_target, r, l_rp) );
+ FAPI_TRY( mss::rank::get_pair_from_rank(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), r, l_rp) );
FAPI_INF("recording bad bits for DIMM%d rank %d (%d) rp %d", l_dimm_index, mss::index(r), r, l_rp);
@@ -2714,13 +2715,14 @@ fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE
// array in to the disable registers
{
// Grab a pointer to our argument simply to make the code a little easier to read
- uint8_t* l_bad_bits = &(o_bad_dq[l_dimm_index][mss::index(r)][0]);
+ uint8_t* l_bad_bits = &(o_bad_dq[mss::index(r)][0]);
// The values we'll pull from the registers in the scom suckah below. We only read the registers for
// our current rank pair.
std::vector< std::pair< fapi2::buffer<uint64_t>, fapi2::buffer<uint64_t> > > l_register_value;
- FAPI_TRY( mss::scom_suckah(i_target, TT::BIT_DISABLE_REG[l_rp], l_register_value) );
+ FAPI_TRY( mss::scom_suckah(mss::find_target<fapi2::TARGET_TYPE_MCA>(i_target), TT::BIT_DISABLE_REG[l_rp],
+ l_register_value) );
// Where in the array we are, incremented by two for every DP
size_t l_byte_index = 0;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
index 4a778c5f1..4b2a7a2d0 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.H
@@ -939,8 +939,8 @@ fapi2::ReturnCode reset_bad_bits(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_
/// @param[in] i_bad_dq array representing the data from the bad dq bitmap
/// @return FAPI2_RC_SUCCESS if and only if ok
///
-fapi2::ReturnCode reset_bad_bits_helper(const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- const uint8_t i_bad_dq[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10]);
+fapi2::ReturnCode reset_bad_bits_helper(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ const uint8_t i_bad_dq[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT]);
///
/// @brief Configure the DP16 io_tx config0 registers
@@ -1936,11 +1936,11 @@ fapi2::ReturnCode record_bad_bits( const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
/// @note This is different than a register write as it writes attributes which
/// cause firmware to act on the disabled bits.
/// @param[in] i_target the fapi2 target of the port
-/// @param[out] o_bad_dq an array of [MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] containing the attribute information
+/// @param[out] o_bad_dq an array of [MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] containing the attribute information
/// @return fapi2::ReturnCode FAPI2_RC_SUCCESS if bad bits can be repaired
///
-fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
- uint8_t (&o_bad_dq)[MAX_DIMM_PER_PORT][MAX_RANK_PER_DIMM][10] );
+fapi2::ReturnCode record_bad_bits_helper( const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
+ uint8_t (&o_bad_dq)[MAX_RANK_PER_DIMM][BAD_DQ_BYTE_COUNT] );
///
/// @brief Process read vref calibration errors
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml
index f15bde923..2107319a7 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/memory_dq_attributes.xml
@@ -43,7 +43,7 @@
<attribute>
<id>ATTR_BAD_DQ_BITMAP</id>
- <targetType>TARGET_TYPE_MCS</targetType>
+ <targetType>TARGET_TYPE_DIMM</targetType>
<description>
Bad DQ bitmap from a controller point of view.
The data is a 10 byte bitmap for each of 4 possible ranks.
@@ -53,7 +53,7 @@
</description>
<valueType>uint8</valueType>
<mssAccessorName>bad_dq_bitmap</mssAccessorName>
- <array>2 2 4 10</array>
+ <array>4 10</array>
<platInit/>
<initToZero/>
<writeable/>
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