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authorPatrick Williams <iawillia@us.ibm.com>2014-04-15 17:45:53 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-05-09 07:19:10 -0500
commit868e98cac34aed64ffb5f983a3662ae31af0c8a1 (patch)
tree51eb73b4c371ec4e1347f6ff7423d4b32c576436 /src
parentf1207a134bea63fc08342effe5e806aa38cc26e6 (diff)
downloadtalos-hostboot-868e98cac34aed64ffb5f983a3662ae31af0c8a1.tar.gz
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Move mailbox area to leave more room for Sapphire.
Change-Id: If39241fbbc110400177b3ef3a5e895f5ed14f2a4 RTC: 81670 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10588 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rwxr-xr-xsrc/build/citest/etc/workarounds.presimsetup17
-rwxr-xr-xsrc/build/debug/simics-debug-framework.py4
-rw-r--r--src/include/usr/vmmconst.h16
-rw-r--r--src/usr/mbox/mbox_dma_buffer.C5
4 files changed, 38 insertions, 4 deletions
diff --git a/src/build/citest/etc/workarounds.presimsetup b/src/build/citest/etc/workarounds.presimsetup
index 607724aef..cba04e3aa 100755
--- a/src/build/citest/etc/workarounds.presimsetup
+++ b/src/build/citest/etc/workarounds.presimsetup
@@ -6,7 +6,7 @@
#
# IBM CONFIDENTIAL
#
-# COPYRIGHT International Business Machines Corp. 2011,2013
+# COPYRIGHT International Business Machines Corp. 2011,2014
#
# p1
#
@@ -33,3 +33,18 @@
#echo "WSALIAS DEFAULT FIPSLEVEL env/gfwb/simics-4.2.0/simics-4.2.83/fips/fld36/fi120201a700.42" >> $sb/simu/data/simicsInfo
#echo "WSALIAS DEFAULT SIMICSLEVEL env/vtechb/simics-4.2.0/simics-4.2.83/bin" >> $sb/simu/data/simicsInfo
+echo "+++ Patching P8_MURANO.config for mailbox move."
+mkdir -p $sb/simu/configs
+grep -v "GFW_P8_HB_UNSECURE_OFFSET" \
+ $BACKING_BUILD/src/simu/configs/P8_MURANO.config > \
+ $sb/simu/configs/P8_MURANO.config
+echo "SETENV GFW_P8_HB_UNSECURE_OFFSET 58720256" >> \
+ $sb/simu/configs/P8_MURANO.config
+
+echo "+++ Patching P8_VENICE.config for mailbox move."
+grep -v "GFW_P8_HB_UNSECURE_OFFSET" \
+ $BACKING_BUILD/src/simu/configs/P8_VENICE.config > \
+ $sb/simu/configs/P8_VENICE.config
+echo "SETENV GFW_P8_HB_UNSECURE_OFFSET 58720256" >> \
+ $sb/simu/configs/P8_VENICE.config
+
diff --git a/src/build/debug/simics-debug-framework.py b/src/build/debug/simics-debug-framework.py
index 889d3bcfc..8489d56e5 100755
--- a/src/build/debug/simics-debug-framework.py
+++ b/src/build/debug/simics-debug-framework.py
@@ -515,7 +515,7 @@ def magic_instruction_callback(user_arg, cpu, arg):
mem_map_entries = (conf.system_cmp0.phys_mem).map
for entry in mem_map_entries:
#print ">> %d:%s" % (entry[0], entry[1])
- if entry[0] == (node_num*per_node):
+ if (entry[0] == (node_num*per_node)) or (entry[0] == hb_hrmor):
mem_object = simics.SIM_object_name(entry[1])
#print "Found entry %s for hrmor %d" % (mem_object, hb_hrmor)
break
@@ -542,7 +542,7 @@ def magic_instruction_callback(user_arg, cpu, arg):
tracbin[node_num],\
hb_tracBinaryBuffer,\
hb_tracBinaryBufferSz)
-
+
cmd2 = "(shell \"(fsp-trace ./%s -s %s/hbotStringFile >> %s 2>/dev/null) || true\")"\
%(tracbin[node_num],\
diff --git a/src/include/usr/vmmconst.h b/src/include/usr/vmmconst.h
index 33586a4db..df2d0f604 100644
--- a/src/include/usr/vmmconst.h
+++ b/src/include/usr/vmmconst.h
@@ -167,6 +167,22 @@ enum BlockPriority
*/
#define VMM_INTERNODE_PRESERVED_MEMORY_ADDR (96 * MEGABYTE)
+/** Region of memory reserved for unsecure memory accesses
+ *
+ * The Secure BAR is placed at 64MB so that initially, everything above
+ * is marked secure and everything below is marked unsecure. External
+ * entities, such as FSP, can only access memory in the unsecure region.
+ * Items such as the Mailbox DMA buffer need to be placed into this region.
+ *
+ * We do not want to place this region directly at zero because in some cases
+ * we load a payload at address 0 (ex. Sapphire) and need to make sure there
+ * is enough room for the payload before any reserved unsecure space.
+ *
+ * Choosing (Secure BAR - Cache Size) as the value for this region, which
+ * allows us to have a payload image up to that size and up to 'Cache Size'
+ * worth of unsecure content.
+ */
+#define VMM_UNSECURE_RESERVED_MEMORY_BASEADDR (56 * MEGABYTE)
/**
* Test Constants
diff --git a/src/usr/mbox/mbox_dma_buffer.C b/src/usr/mbox/mbox_dma_buffer.C
index f04c54aee..43c93c681 100644
--- a/src/usr/mbox/mbox_dma_buffer.C
+++ b/src/usr/mbox/mbox_dma_buffer.C
@@ -179,7 +179,8 @@ void DmaBuffer::initPhysicalArea(void*& io_addr, uint64_t& o_phys)
// Move the physical address to the start of the node (unsecure) and
// add on the DMA buffer offset inside the node.
o_phys &= ~(hrmor_base-1);
- o_phys += VmmManager::MBOX_DMA_ADDR;
+ o_phys += reinterpret_cast<uint64_t>(io_addr) +
+ VMM_UNSECURE_RESERVED_MEMORY_BASEADDR;
// Allocate a new VMM block for the buffer.
io_addr = mm_block_map(reinterpret_cast<void*>(o_phys),
@@ -195,5 +196,7 @@ void DmaBuffer::initPhysicalArea(void*& io_addr, uint64_t& o_phys)
reinterpret_cast<uint64_t*>(VmmManager::MBOX_DMA_SIZE +
reinterpret_cast<uint64_t>(io_addr)));
+ memset(io_addr, '\0', VmmManager::MBOX_DMA_SIZE);
+
}
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