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authorBrian Silver <bsilver@us.ibm.com>2014-05-27 11:19:37 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2014-06-23 14:30:17 -0500
commit7ae7a98c92c8833fa5707e78f55c89281a39c244 (patch)
treee22128bfb4936b93e1dfd13535535c819945e572 /src
parentc2c12d0e18a6104d9e37070a2b18f7881afc5dc9 (diff)
downloadtalos-hostboot-7ae7a98c92c8833fa5707e78f55c89281a39c244.tar.gz
talos-hostboot-7ae7a98c92c8833fa5707e78f55c89281a39c244.zip
Add Naples support to the kernel
Change-Id: Ie748454257938103bdb76d7ac1b5d425bc97d348 RTC: 107941 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/11298 Tested-by: Jenkins Server Reviewed-by: Douglas R. Gilbert <dgilbert@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/sys/misc.h2
-rw-r--r--src/kernel/basesegment.C1
-rw-r--r--src/kernel/cpuid.C3
-rw-r--r--src/kernel/cpumgr.C4
-rw-r--r--src/kernel/exception.C1
-rw-r--r--src/kernel/misc.C3
-rw-r--r--src/lib/syscall_misc.C1
-rw-r--r--src/lib/syscall_mmio.C1
-rw-r--r--src/usr/xscom/xscom.C1
9 files changed, 16 insertions, 1 deletions
diff --git a/src/include/sys/misc.h b/src/include/sys/misc.h
index 9d8fc7aa1..f3388e9a4 100644
--- a/src/include/sys/misc.h
+++ b/src/include/sys/misc.h
@@ -115,6 +115,8 @@ enum ProcessorCoreType
CORE_POWER8_MURANO,
/** Power8 "Venice" (high-end) core */
CORE_POWER8_VENICE,
+ /** Power8 "Naples" core */
+ CORE_POWER8_NAPLES,
CORE_UNKNOWN,
};
diff --git a/src/kernel/basesegment.C b/src/kernel/basesegment.C
index d6a7ba163..bde57a0e4 100644
--- a/src/kernel/basesegment.C
+++ b/src/kernel/basesegment.C
@@ -54,6 +54,7 @@ void BaseSegment::_init()
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
default:
iv_physMemSize = VMM_BASE_BLOCK_SIZE;
break;
diff --git a/src/kernel/cpuid.C b/src/kernel/cpuid.C
index 05d660263..638942438 100644
--- a/src/kernel/cpuid.C
+++ b/src/kernel/cpuid.C
@@ -45,6 +45,9 @@ namespace CpuID
case 0x004B0000:
return CORE_POWER8_MURANO;
+ case 0x004C0000:
+ return CORE_POWER8_NAPLES;
+
case 0x004D0000:
return CORE_POWER8_VENICE;
diff --git a/src/kernel/cpumgr.C b/src/kernel/cpumgr.C
index 228120473..ba3b08356 100644
--- a/src/kernel/cpumgr.C
+++ b/src/kernel/cpumgr.C
@@ -221,7 +221,8 @@ void CpuManager::startCPU(ssize_t i)
// Need to make the xscom mutex a per-core mutex to prevent
// multi-threaded access to the HMER.
if ((CpuID::getCpuType() == CORE_POWER8_MURANO) ||
- (CpuID::getCpuType() == CORE_POWER8_VENICE))
+ (CpuID::getCpuType() == CORE_POWER8_VENICE) ||
+ (CpuID::getCpuType() == CORE_POWER8_NAPLES))
{
const size_t num_threads = getThreadCount();
size_t cpu_idx = (cpuId / num_threads) * num_threads;
@@ -443,6 +444,7 @@ size_t CpuManager::getThreadCount()
{
case CORE_POWER8_VENICE:
case CORE_POWER8_MURANO:
+ case CORE_POWER8_NAPLES:
threads = 8;
break;
diff --git a/src/kernel/exception.C b/src/kernel/exception.C
index 6cf595d9c..aff600225 100644
--- a/src/kernel/exception.C
+++ b/src/kernel/exception.C
@@ -279,6 +279,7 @@ void kernel_execute_softpatch()
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
case CORE_UNKNOWN:
p8_softpatch_denorm_assist(t->fp_context);
break;
diff --git a/src/kernel/misc.C b/src/kernel/misc.C
index 62513ec16..ed05c431c 100644
--- a/src/kernel/misc.C
+++ b/src/kernel/misc.C
@@ -439,6 +439,7 @@ namespace KernelMisc
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
cache_columns = 4;
break;
@@ -482,6 +483,7 @@ namespace KernelMisc
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
startAddr = reinterpret_cast<uint64_t*>
( VmmManager::INITIAL_MEM_SIZE ) ;
endAddr =
@@ -532,6 +534,7 @@ namespace KernelMisc
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
case CORE_UNKNOWN:
l_scratch_addr = l_scratch_addr + 0x40;
break;
diff --git a/src/lib/syscall_misc.C b/src/lib/syscall_misc.C
index c2ad5f283..9d86bf937 100644
--- a/src/lib/syscall_misc.C
+++ b/src/lib/syscall_misc.C
@@ -61,6 +61,7 @@ size_t cpu_thread_count()
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
threads = 8;
break;
diff --git a/src/lib/syscall_mmio.C b/src/lib/syscall_mmio.C
index c044408d5..a15b1c9b4 100644
--- a/src/lib/syscall_mmio.C
+++ b/src/lib/syscall_mmio.C
@@ -64,6 +64,7 @@ static uint64_t mmio_scratch_base()
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
case CORE_UNKNOWN:
default:
return 0x40;
diff --git a/src/usr/xscom/xscom.C b/src/usr/xscom/xscom.C
index 765677fc8..1b5b06558 100644
--- a/src/usr/xscom/xscom.C
+++ b/src/usr/xscom/xscom.C
@@ -198,6 +198,7 @@ uint8_t getMaxChipsPerNode()
{
case CORE_POWER8_MURANO:
case CORE_POWER8_VENICE:
+ case CORE_POWER8_NAPLES:
case CORE_UNKNOWN:
default:
l_numOfChips = 8;
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