SW258393: INITPROC: Hostboot - proc_cen_ref_clk_enable.C v1.4

Change-Id: I9276f5e2cabf4fa0cbad294d8d683cf53799f9b4
CQ:SW258393
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10836
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Tested-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10835
Tested-by: Jenkins Server
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

4 files changed, 290 insertions, 21 deletions

diff --git a/src/usr/hwpf/hwp/slave_sbe/makefile b/src/usr/hwpf/hwp/slave_sbe/makefile
index 4e6b29f53..71268e7da 100644
--- a/src/usr/hwpf/hwp/slave_sbe/makefile
+++ b/src/usr/hwpf/hwp/slave_sbe/makefile
@@ -53,7 +53,8 @@ OBJS =  slave_sbe.o \
         proc_getecid.o \
         proc_cen_ref_clk_enable.o \
         proc_spless_sbe_startWA.o \
-        proc_reset_i2cm_bus_fence.o
+        proc_reset_i2cm_bus_fence.o \
+        proc_check_master_sbe_seeprom.o
 
 ##  NOTE: add a new directory onto the vpaths when you add a new HWP
 VPATH += ${ROOTPATH}/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_cen_ref_clk_enable.C b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_cen_ref_clk_enable.C
index a13f9f78e..d0a77e2a6 100644
--- a/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_cen_ref_clk_enable.C
+++ b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_cen_ref_clk_enable.C
@@ -20,9 +20,7 @@
 /* Origin: 30                                                             */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
-// -*- mode: C++; c-file-style: "linux";  -*-
-
-// $Id: proc_cen_ref_clk_enable.C,v 1.3 2014/02/28 17:52:45 jmcgill Exp $
+// $Id: proc_cen_ref_clk_enable.C,v 1.4 2014/04/14 18:57:01 jmcgill Exp $
 // $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_cen_ref_clk_enable.C,v $
 //------------------------------------------------------------------------------
 // *|
@@ -41,6 +39,7 @@
 //------------------------------------------------------------------------------
 // Includes
 //------------------------------------------------------------------------------
+#include "proc_check_master_sbe_seeprom.H"
 #include "proc_cen_ref_clk_enable.H"
 
 //------------------------------------------------------------------------------
@@ -63,23 +62,30 @@ fapi::ReturnCode proc_cen_ref_clk_enable(const fapi::Target & i_target,
                                          const uint8_t i_attached_centaurs)
 {
 
-    ecmdDataBufferBase fsi_data(64);
+    ecmdDataBufferBase reg_data(32);
     uint32_t           rc_ecmd = 0;
     fapi::ReturnCode   rc;
+    bool               is_master = false;
     uint8_t            configured_centaurs = 0x00;
     std::vector<fapi::Target> mcs_targets;
 
-    do {
-        rc = fapiGetScom(i_target, MBOX_FSIGP8_0x00050017, fsi_data);
-        if (rc)
+
+    do
+    {
+        // determine chip status (master/slave) to differentiate access path to FSI GP8 register
+        //   master: SCOM
+        //   slave:  CFAM
+        rc = proc_check_master_sbe_seeprom(i_target, is_master);
+        if (!rc.ok())
         {
-            FAPI_ERR("proc_cen_ref_clk_enable: fapiGetScom error (MBOX_FSIGP8_0x00050017)");
+            FAPI_ERR("proc_cen_ref_clk_enable: Error from proc_check_master_sbe_seeprom");
             break;
         }
 
-        FAPI_INF("proc_cen_ref_clk_enable: got number of attached centaurs: i_attached_centaurs=0x%02X\n",
-                 (int) i_attached_centaurs);
+        FAPI_INF("proc_cen_ref_clk_enable: Target %s is %s, attached Centaurs: 0x%02X",
+                 i_target.toEcmdString(), (is_master)?("master"):("slave"), i_attached_centaurs);
 
+        // obtain set of functional MCS chiplets
         rc = fapiGetChildChiplets(i_target,
                                   fapi::TARGET_TYPE_MCS_CHIPLET,
                                   mcs_targets,
@@ -141,7 +147,7 @@ fapi::ReturnCode proc_cen_ref_clk_enable(const fapi::Target & i_target,
                     break;
                 }
 
-                rc_ecmd |= fsi_data.setBit(FSI_GP8_CENTAUR_REFCLOCK_START_BIT+
+                rc_ecmd |= reg_data.setBit(FSI_GP8_CENTAUR_REFCLOCK_START_BIT+
                                            refclock_bit);
             }
         }
@@ -151,7 +157,8 @@ fapi::ReturnCode proc_cen_ref_clk_enable(const fapi::Target & i_target,
         }
         if (rc_ecmd)
         {
-            FAPI_ERR("proc_cen_ref_clk_enable: Error (0x%x) setting up ecmdDataBufferBase", rc_ecmd);
+            FAPI_ERR("proc_cen_ref_clk_enable: Error (0x%x) setting up refclock enable OR data buffer",
+                     rc_ecmd);
             rc.setEcmdError(rc_ecmd);
             break;
         }
@@ -167,13 +174,58 @@ fapi::ReturnCode proc_cen_ref_clk_enable(const fapi::Target & i_target,
             break;
         }
 
-        FAPI_INF("proc_cen_ref_clk_enable: Enable refclk for Centaur ...");
+        FAPI_INF("proc_cen_ref_clk_enable: Enable refclk for functional Centaur chips...");
+        if (is_master)
+        {
+            ecmdDataBufferBase scom_data(64);
+            rc = fapiGetScom(i_target, MBOX_FSIGP8_0x00050017, scom_data);
+            if (rc)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: fapiGetScom error (MBOX_FSIGP8_0x00050017)");
+                break;
+            }
+            
+            rc_ecmd |= scom_data.setOr(reg_data.getWord(0), 0, 32);
+            if (rc_ecmd)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: Error (0x%x) setting up FSI GP8 write data buffer (SCOM)",
+                         rc_ecmd);
+                rc.setEcmdError(rc_ecmd);
+                break;
+            }
 
-        rc = fapiPutScom(i_target, MBOX_FSIGP8_0x00050017, fsi_data);
-        if (rc)
+            rc = fapiPutScom(i_target, MBOX_FSIGP8_0x00050017, scom_data);
+            if (rc)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: fapiPutScom error (MBOX_FSIGP8_0x00050017)");
+                break;
+            }
+        }
+        else
         {
-            FAPI_ERR("proc_cen_ref_clk_enable: fapiPutScom error (MBOX_FSIGP8_0x00050017)");
-            break;
+            ecmdDataBufferBase cfam_data(32);
+            rc = fapiGetCfamRegister(i_target, CFAM_FSI_GP8_0x00002817, cfam_data);
+            if (rc)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: fapiGetCfamRegister error (CFAM_FSI_GP8_0x00001017)");
+                break;
+            }
+            
+            rc_ecmd |= cfam_data.setOr(reg_data.getWord(0), 0, 32);
+            if (rc_ecmd)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: Error (0x%x) setting up FSI GP8 write data buffer (CFAM)",
+                         rc_ecmd);
+                rc.setEcmdError(rc_ecmd);
+                break;
+            }
+
+            rc = fapiPutCfamRegister(i_target, CFAM_FSI_GP8_0x00002817, cfam_data);
+            if (rc)
+            {
+                FAPI_ERR("proc_cen_ref_clk_enable: fapiPutCfamRegister error (CFAM_FSI_GP8_0x00001017)");
+                break;
+            }
         }
     } while(0);  // end do
 
@@ -184,6 +236,3 @@ fapi::ReturnCode proc_cen_ref_clk_enable(const fapi::Target & i_target,
 
 
 } // extern "C"
-/* Local Variables: */
-/* c-basic-offset: 4 */
-/* End: */
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.C b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.C
new file mode 100644
index 000000000..ce43ea9f2
--- /dev/null
+++ b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.C
@@ -0,0 +1,127 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.C $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2014                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_check_master_sbe_seeprom.C,v 1.1 2013/09/23 22:04:00 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_check_master_sbe_seeprom.C,v $
+//------------------------------------------------------------------------------
+// *|
+// *! (C) Copyright International Business Machines Corp. 2011
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+// *|
+// *! TITLE       : proc_check_master_sbe_seeprom.C
+// *! DESCRIPTION : Determine if given chip is the drawer master (FAPI)
+// *!
+// *! OWNER NAME  : Joe McGill    Email: jmcgill@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include "proc_check_master_sbe_seeprom.H"
+#include "p8_scom_addresses.H"
+
+
+extern "C"
+{
+
+//------------------------------------------------------------------------------
+// Function definitions
+//------------------------------------------------------------------------------
+
+fapi::ReturnCode proc_check_master_sbe_seeprom(
+    const fapi::Target & i_target,
+    bool & o_is_master)
+{
+    fapi::ReturnCode rc;
+    uint32_t rc_ecmd = 0;
+    ecmdDataBufferBase data;
+
+    bool pri_master = false;
+    uint8_t chip_id;
+
+    FAPI_DBG("proc_check_master_sbe_seeprom: Start");
+
+    do
+    {
+        // read SBE vital to determine primary/secondary master bit state
+        rc = fapiGetScom(i_target,
+                         MBOX_SBEVITAL_0x0005001C,
+                         data);
+
+        if (!rc.ok())
+        {
+            FAPI_ERR("proc_check_master_sbe_seeprom: Error from fapiGetScom (MBOX_SBEVITAL_0x005001C)");
+            break;
+        }
+
+        // extract primary/secondary master bit
+        pri_master = data.isBitClear(MBOX_SBEVITAL_SBE_SELECT_MODE_MASTER_BIT);
+
+        // read device ID register to determine chip position
+        rc = fapiGetScom(i_target,
+                         PCBMS_DEVICE_ID_0x000F000F,
+                         data);
+
+        if (!rc.ok())
+        {
+            FAPI_ERR("proc_check_master_sbe_seeprom: Error from fapiGetScom (PCBMS_DEVICE_ID_0x000F000F)");
+            break;
+        }
+
+        // extract socketID and chip position fields
+        rc_ecmd |= data.extractToRight(
+            &chip_id,
+            PCBMS_DEVICE_ID_CHIP_ID_START_BIT,
+            (PCBMS_DEVICE_ID_CHIP_ID_END_BIT-
+             PCBMS_DEVICE_ID_CHIP_ID_START_BIT)+1);
+
+        // check data buffer manipulation return code
+        if (rc_ecmd)
+        {
+            FAPI_ERR("proc_check_master_sbe_seeprom: Error 0x%X extracting socket/chip position",
+                     rc_ecmd);
+            rc.setEcmdError(rc_ecmd);
+            break;
+        }
+
+        // compare SBE Vital/Device ID fields with expected values
+        // for master chip
+        if ((pri_master && (chip_id == PCBMS_DEVICE_ID_PRIMARY_MASTER)) ||
+            (!pri_master && (chip_id == PCBMS_DEVICE_ID_ALTERNATE_MASTER)))
+        {
+            o_is_master = true;
+        }
+        else
+        {
+            o_is_master = false;
+        }
+    } while(0);
+
+    FAPI_DBG("proc_check_master_sbe_seeprom: End");
+    return rc;
+}
+
+
+} // extern "C"
diff --git a/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.H b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.H
new file mode 100644
index 000000000..0631176ab
--- /dev/null
+++ b/src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.H
@@ -0,0 +1,92 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/hwpf/hwp/slave_sbe/proc_cen_ref_clk_enable/proc_check_master_sbe_seeprom.H $ */
+/*                                                                        */
+/* IBM CONFIDENTIAL                                                       */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2014                   */
+/*                                                                        */
+/* p1                                                                     */
+/*                                                                        */
+/* Object Code Only (OCO) source materials                                */
+/* Licensed Internal Code Source Materials                                */
+/* IBM HostBoot Licensed Internal Code                                    */
+/*                                                                        */
+/* The source code for this program is not published or otherwise         */
+/* divested of its trade secrets, irrespective of what has been           */
+/* deposited with the U.S. Copyright Office.                              */
+/*                                                                        */
+/* Origin: 30                                                             */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+// $Id: proc_check_master_sbe_seeprom.H,v 1.1 2013/09/23 22:04:00 jmcgill Exp $
+// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/proc_check_master_sbe_seeprom.H,v $
+//------------------------------------------------------------------------------
+// *! (C) Copyright International Business Machines Corp. 2012
+// *! All Rights Reserved -- Property of IBM
+// *! *** IBM Confidential ***
+//------------------------------------------------------------------------------
+// *! TITLE       : proc_check_master_sbe_seeprom.H
+// *! DESCRIPTION : Determine if given chip is the drawer master (FAPI)
+// *!
+// *! OWNER NAME  : Joe McGill        Email: jmcgill@us.ibm.com
+// *!
+//------------------------------------------------------------------------------
+
+#ifndef PROC_CHECK_MASTER_SBE_SEEPROM_H_
+#define PROC_CHECK_MASTER_SBE_SEEPROM_H_
+
+//------------------------------------------------------------------------------
+// Includes
+//------------------------------------------------------------------------------
+#include <fapi.H>
+
+
+//------------------------------------------------------------------------------
+// Constant definitions
+//------------------------------------------------------------------------------
+
+// SBE Vital register bit/field definitions
+const uint32_t MBOX_SBEVITAL_SBE_SELECT_MODE_MASTER_BIT = 10;
+
+// Device ID register bit/field definitions
+const uint32_t PCBMS_DEVICE_ID_CHIP_ID_START_BIT = 36;
+const uint32_t PCBMS_DEVICE_ID_CHIP_ID_END_BIT = 39;
+
+const uint32_t PCBMS_DEVICE_ID_PRIMARY_MASTER = 0x00;
+const uint32_t PCBMS_DEVICE_ID_ALTERNATE_MASTER = 0x02;
+
+
+//------------------------------------------------------------------------------
+// Structure definitions
+//------------------------------------------------------------------------------
+
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode
+(*proc_check_master_sbe_seeprom_FP_t)(const fapi::Target &,
+                                      bool &);
+
+
+extern "C" {
+
+//------------------------------------------------------------------------------
+// Function prototypes
+//------------------------------------------------------------------------------
+
+/**
+ * @brief HWP which determines if a given chip is the drawer master
+ *
+ * @param[in]  i_target    Processor target
+ * @param[out] o_is_master Master state
+ *
+ * @return ReturnCode
+ */
+fapi::ReturnCode proc_check_master_sbe_seeprom(
+    const fapi::Target & i_target,
+    bool & o_is_master);
+
+
+} // extern "C"
+
+#endif // PROC_CHECK_MASTER_SBE_SEEPROM_H_