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authorSunil Kumar <skumar8j@in.ibm.com>2019-04-29 03:34:39 -0500
committerChristian R Geddes <crgeddes@us.ibm.com>2019-07-24 10:46:05 -0500
commit6b03894470e30343885917d3db131b091ef6e7c7 (patch)
treed10257baea91ad44817c1e9f875a1c93442a0633 /src
parent18aa5d9e32a32ddb70d038507774a88ed7f644fc (diff)
downloadtalos-hostboot-6b03894470e30343885917d3db131b091ef6e7c7.tar.gz
talos-hostboot-6b03894470e30343885917d3db131b091ef6e7c7.zip
OCMB changes to suit PPE compilation.
Change-Id: If1146defe839abe50a35daa633d8bfc2e9aa1bdf Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/76637 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Christian R Geddes <crgeddes@us.ibm.com> Reviewed-by: MURULIDHAR NATARAJU <murulidhar@in.ibm.com> Reviewed-by: RAJA DAS <rajadas2@in.ibm.com> Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A Stofer <stofer@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/77309
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H70
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H15
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H8
-rw-r--r--src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H13
-rw-r--r--src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml3
-rw-r--r--src/import/generic/memory/lib/utils/endian_utils.H36
-rw-r--r--src/import/generic/memory/lib/utils/mss_field.H40
-rw-r--r--src/import/generic/memory/lib/utils/mss_generic_check.H25
-rw-r--r--src/import/generic/memory/lib/utils/shared/mss_generic_consts.H4
-rw-r--r--src/import/generic/procedures/xml/error_info/generic_error.xml1
10 files changed, 168 insertions, 47 deletions
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
index c4acf2ced..3bfa33238 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c.H
@@ -38,12 +38,27 @@
#include <fapi2.H>
#include <i2c_access.H>
-
#include <vector>
-#include <lib/i2c/exp_i2c_fields.H>
-#include <generic/memory/lib/utils/pos.H>
-#include <generic/memory/lib/utils/endian_utils.H>
-#include <generic/memory/lib/utils/poll.H>
+
+#ifdef __PPE__
+ #include <exp_i2c_fields.H>
+ #include <endian_utils.H>
+#else
+ #include <generic/memory/lib/utils/poll.H>
+ #include <lib/i2c/exp_i2c_fields.H>
+ #include <generic/memory/lib/utils/pos.H>
+ #include <generic/memory/lib/utils/endian_utils.H>
+#endif
+
+
+//Macro
+#ifdef __PPE__
+ #define TARGIDFORMAT "0x%08X"
+ #define TARGID i_target.get()
+#else
+ #define TARGIDFORMAT "%s"
+ #define TARGID mss::c_str(i_target)
+#endif
namespace mss
{
@@ -83,13 +98,14 @@ inline fapi2::ReturnCode status_code( const fapi2::Target<fapi2::TARGET_TYPE_OCM
// Technically many cmds have their own status code decoding..but SUCCESS is always 0.
// If it's anything else we can just look up the status code
+
FAPI_ASSERT( l_status == status_codes::SUCCESS,
fapi2::MSS_EXP_I2C_FW_STATUS_CODE_FAILED().
set_TARGET(i_target).
set_STATUS_CODE(l_status).
set_CMD_ID(i_cmd_id),
- "Status code did not return SUCCESS (%d), received (%d) for %s",
- status_codes::SUCCESS, l_status, mss::c_str(i_target) );
+ "Status code did not return SUCCESS (%d), received (%d) for " TARGIDFORMAT ,
+ status_codes::SUCCESS, l_status, TARGID );
return fapi2::FAPI2_RC_SUCCESS;
@@ -112,6 +128,7 @@ inline void fw_status_setup(size_t& o_size,
o_cmd_id.push_back(FW_STATUS);
}
+#ifndef __PPE__
///
/// @brief EXP_FW_BYPASS_4SEC_TIMEOUT setup helper function
/// @param[out] o_cmd_id the explorer command ID
@@ -121,6 +138,7 @@ inline void fw_bypass_download_window_setup(std::vector<uint8_t>& o_cmd_id)
o_cmd_id.clear();
o_cmd_id.push_back(FW_BYPASS_4SEC_TIMEOUT);
}
+#endif
///
/// @brief get EXP_FW_STATUS bytes
@@ -190,7 +208,7 @@ inline fapi2::ReturnCode fw_status(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_C
// This is a base function that will be utilized by the platform code
// As such, we don't want to pull in more libraries than we need to: it would cause extra dependencies
// So, we're decomposing the polling library below
- fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
+ //fapi2::ReturnCode l_rc = fapi2::FAPI2_RC_SUCCESS;
bool l_busy = true;
uint8_t l_boot_stage = 0;
uint64_t l_loop = 0;
@@ -211,28 +229,28 @@ inline fapi2::ReturnCode fw_status(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_C
FAPI_TRY( fapi2::delay( i_delay, 200) );
}
- FAPI_DBG("%s stopped on loop %u/%u", mss::c_str(i_target), l_loop, i_loops);
-
+ FAPI_DBG(TARGIDFORMAT " stopped on loop %u/%u", TARGID , l_loop, i_loops);
// Check that Explorer is not still in FW_BUSY state
+
FAPI_ASSERT( !l_busy,
fapi2::MSS_EXP_I2C_FW_STATUS_BUSY().
set_TARGET(i_target),
- "Polling timeout on FW_STATUS command (still FW_BUSY) for %s",
- mss::c_str(i_target) );
-
+ "Polling timeout on FW_STATUS command (still FW_BUSY) for " TARGIDFORMAT,
+ TARGID );
// Check that Explorer is in RUNTIME_FW boot stage
FAPI_ASSERT( (l_boot_stage == EXPECTED_BOOT_STAGE),
fapi2::MSS_EXP_I2C_WRONG_BOOT_STAGE().
set_TARGET(i_target).
set_BOOT_STAGE(l_boot_stage).
set_EXPECTED_BOOT_STAGE(EXPECTED_BOOT_STAGE),
- "Polling timeout on FW_STATUS command (wrong boot stage: 0x%01x, expected 0x%01x) for %s",
- l_boot_stage, EXPECTED_BOOT_STAGE, mss::c_str(i_target) );
+ "Polling timeout on FW_STATUS command (wrong boot stage: 0x%01x, expected 0x%01x) for " TARGIDFORMAT,
+ l_boot_stage, EXPECTED_BOOT_STAGE, TARGID );
fapi_try_exit:
return fapi2::current_err;
}
+#ifndef __PPE__
///
/// @brief EXP_FW_BOOT_CONFIG setup
/// @param[in,out] io_data the data to go to boot config
@@ -390,6 +408,7 @@ fapi_try_exit:
return fapi2::current_err;
}
+#endif
///
/// @brief Perform a register write operation on the given OCMB chip
/// @param[in] i_target the OCMB target
@@ -416,13 +435,21 @@ inline fapi2::ReturnCode fw_reg_write(const fapi2::Target<fapi2::TARGET_TYPE_OC
// currently are
// Byte 2:5 = Address
forceBE(i_addr, l_be_vector);
- l_cmd_vector.insert(l_cmd_vector.end(), l_be_vector.begin(), l_be_vector.end());
+
+ for(std::vector<uint8_t>::iterator it = l_be_vector.begin(); it != l_be_vector.end(); ++it)
+ {
+ l_cmd_vector.push_back(*it);
+ }
l_be_vector.clear();
forceBE(l_input_data, l_be_vector);
// Byte 6:9 = Data
- l_cmd_vector.insert(l_cmd_vector.end(), l_be_vector.begin(), l_be_vector.end());
+
+ for(std::vector<uint8_t>::iterator it = l_be_vector.begin(); it != l_be_vector.end(); ++it)
+ {
+ l_cmd_vector.push_back(*it);
+ }
// Use fapi2 putI2c interface to execute command
FAPI_TRY(fapi2::putI2c(i_target, l_cmd_vector),
@@ -468,7 +495,11 @@ inline fapi2::ReturnCode fw_reg_read(const fapi2::Target<fapi2::TARGET_TYPE_OCMB
// directly to the cmd_vector in the same order it
// currently is in
// Byte 2:5 = Address
- l_cmd_vector.insert(l_cmd_vector.end(), l_tmp_vector.begin(), l_tmp_vector.end());
+
+ for(std::vector<uint8_t>::iterator it = l_tmp_vector.begin(); it != l_tmp_vector.end(); ++it)
+ {
+ l_cmd_vector.push_back(*it);
+ }
// Use fapi2 putI2c interface to execute command
FAPI_TRY(fapi2::putI2c(i_target, l_cmd_vector),
@@ -554,6 +585,8 @@ inline uint32_t trans_micro_i2c_scom_addr(const uint32_t i_addr)
return (i_addr | OCMB_UNCACHED_OFFSET) ;
}
+#ifndef __PPE__
+
///
/// @brief Issue the DOWNLOAD command to the given OCMB chip
/// @param[in] i_target the OCMB target
@@ -600,6 +633,7 @@ fapi_try_exit:
return fapi2::current_err;
}
+#endif
}// i2c
}// exp
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H
index 02ab0fc98..9d2181b12 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_fields.H
@@ -36,9 +36,14 @@
#ifndef _MSS_EXP_I2C_FIELDS_H_
#define _MSS_EXP_I2C_FIELDS_H_
-#include <generic/memory/lib/utils/mss_field.H>
-#include <lib/shared/exp_consts.H>
#include <functional>
+#ifdef __PPE__
+ #include <mss_field.H>
+ #include <exp_consts.H>
+#else
+ #include <generic/memory/lib/utils/mss_field.H>
+ #include <lib/shared/exp_consts.H>
+#endif
namespace mss
{
@@ -241,6 +246,7 @@ inline fapi2::ReturnCode get_field(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_C
return mss::get_field<endian::BIG, F, TT>(i_target, i_data, EXP_I2C_GET_FIELD, o_value);
}
+#ifndef __PPE__
///
/// @brief Explorer I2C field setter
/// @tparam IT Input type
@@ -461,6 +467,8 @@ inline fapi2::ReturnCode set_fw_mode(const fapi2::Target<fapi2::TARGET_TYPE_OCMB
}// boot_cfg
+#endif
+
namespace status
{
@@ -478,6 +486,7 @@ inline fapi2::ReturnCode get_boot_stage(const fapi2::Target<fapi2::TARGET_TYPE_O
return get_field<fields::BOOT_STAGE>(i_target, i_data, o_setting);
}
+
///
/// @brief STATUS_CODE getter
/// @param[in] i_target the OCMB target
@@ -492,6 +501,7 @@ inline fapi2::ReturnCode get_status_code(const fapi2::Target<fapi2::TARGET_TYPE_
return get_field<fields::STATUS_CODE>(i_target, i_data, o_setting);
}
+#ifndef __PPE__
///
/// @brief CMD_ID getter
/// @param[in] i_target the OCMB target
@@ -505,6 +515,7 @@ inline fapi2::ReturnCode get_cmd_id(const fapi2::Target<fapi2::TARGET_TYPE_OCMB_
{
return get_field<fields::CMD_ID>(i_target, i_data, o_setting);
}
+#endif
}// status
}// i2c
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H
index f1d811245..b2813abec 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/i2c/exp_i2c_scom.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -36,7 +36,11 @@
#ifndef _MSS_EXP_I2C_SCOM_H_
#define _MSS_EXP_I2C_SCOM_H_
-#include <lib/i2c/exp_i2c.H>
+#ifdef __PPE__
+ #include <exp_i2c.H>
+#else
+ #include <lib/i2c/exp_i2c.H>
+#endif
namespace mss
diff --git a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
index 41f3ec3f7..8d0339a00 100644
--- a/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
+++ b/src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/shared/exp_consts.H
@@ -36,7 +36,9 @@
#ifndef MSS_EXP_CONSTS_H
#define MSS_EXP_CONSTS_H
-#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#ifndef __PPE__
+ #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#endif
namespace mss
{
@@ -46,6 +48,7 @@ namespace exp
constexpr uint32_t OCMB_ADDR_SHIFT = 3;
+#ifndef __PPE__
///
/// @brief enum list for the indexes for the address delays
/// @note Taken from 07-MAY-19 firwmare document
@@ -127,6 +130,8 @@ enum sizes
MAX_MRANK_PER_PORT = MAX_DIMM_PER_PORT * MAX_RANK_PER_DIMM,
};
+#endif
+
///
/// @brief explorer ffdc codes
///
@@ -241,6 +246,7 @@ enum status_codes
FW_BUSY = 0xFE,
};
+#ifndef __PPE__
///
/// @brief status codes for FW_BOOT_CONFIG
///
@@ -258,6 +264,7 @@ enum fw_boot_cfg_status
FW_BOOT_CFG_UNSUPPORTED_SERDES_FREQ = 0x04,
};
+#endif
///
/// @brief I2C boot stage options
/// @note certain cmds work in certain boot stages
@@ -305,9 +312,9 @@ enum addrSide
RHS = 0x01
};
-
}// i2c
+#ifndef __PPE__
namespace omi
{
@@ -371,6 +378,8 @@ enum response_arg
};
}// omi
+#endif
+
}// exp
}// mss
diff --git a/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml b/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml
index 9a4d6844f..3e3586421 100644
--- a/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml
+++ b/src/import/chips/ocmb/explorer/procedures/xml/error_info/mss_exp_errors.xml
@@ -356,6 +356,7 @@
Explorer status code for command ID EXP_FW_STATUS
did not return SUCCESS
</description>
+ <ffdc>TARGET</ffdc>
<ffdc>STATUS_CODE</ffdc>
<ffdc>CMD_ID</ffdc>
<callout>
@@ -377,6 +378,7 @@
Received FW_BUSY status after polling timeout for
command ID EXP_FW_STATUS
</description>
+ <ffdc>TARGET</ffdc>
<ffdc>STATUS_CODE</ffdc>
<callout>
<procedure>CODE</procedure>
@@ -397,6 +399,7 @@
Received incorrect boot stage from
command ID EXP_FW_STATUS
</description>
+ <ffdc>TARGET</ffdc>
<ffdc>BOOT_STAGE</ffdc>
<ffdc>EXPECTED_BOOT_STAGE</ffdc>
<callout>
diff --git a/src/import/generic/memory/lib/utils/endian_utils.H b/src/import/generic/memory/lib/utils/endian_utils.H
index 20bfd7caa..94b9dbc0d 100644
--- a/src/import/generic/memory/lib/utils/endian_utils.H
+++ b/src/import/generic/memory/lib/utils/endian_utils.H
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2018 */
+/* Contributors Listed Below - COPYRIGHT 2018,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -37,9 +37,14 @@
#ifndef _ENDIAN_UTILS_H_
#define _ENDIAN_UTILS_H_
-#include <cstdint>
#include <vector>
-#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+
+#ifdef __PPE__
+ #include <mss_generic_consts.H>
+#else
+ #include <cstdint>
+ #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+#endif
namespace mss
{
@@ -67,6 +72,7 @@ void forceLE(const T& i_input, std::vector<uint8_t>& io_data)
}
}
+#ifndef __PPE__
///
/// @brief Forces native data into LE order for an array
/// @tparam T the data type to process
@@ -82,7 +88,7 @@ inline void forceLEArray(const T* i_input, const uint64_t i_size, std::vector<ui
forceLE(i_input[i], io_data);
}
}
-
+#endif
///
/// @brief Forces native data into BE order
/// @tparam T the data type to process
@@ -98,20 +104,31 @@ void forceBE(const T& i_input, std::vector<uint8_t>& io_data)
std::vector<uint8_t> l_tempBuffer;
// This loop will put i_input into l_tempBuffer in BE order
- for(size_t i = 0; i < sizeof(i_input); i++)
+
+ for(size_t i = sizeof(i_input); i > 0; i--)
{
// Grab the lowest order byte and add it to the front of the vector
const uint8_t l_byte = l_temp & 0xFF;
- l_tempBuffer.insert(l_tempBuffer.begin(), l_byte);
+ l_tempBuffer.push_back(l_byte);
// Shift higher byte value into lowest no matter existing endianness
l_temp >>= BITS_PER_BYTE;
}
// Put the new BE formatted data at the end of the input buffer
- io_data.insert(io_data.end(), l_tempBuffer.begin(), l_tempBuffer.end());
+
+ std::vector<uint8_t>::iterator it = l_tempBuffer.end();
+ --it; //Move iterator to the last element.
+
+ for(uint8_t i = l_tempBuffer.size(); i > 0; --i)
+ {
+ io_data.push_back(*it);
+ --it;
+ }
+
}
+#ifndef __PPE__
///
/// @brief Forces native data into BE order for an array
/// @tparam T the data type to process
@@ -127,6 +144,7 @@ inline void forceBEArray(const T* i_input, const uint64_t i_size, std::vector<ui
forceBE(i_input[i], io_data);
}
}
+#endif
///
/// @brief Converts LE data into native order
@@ -165,6 +183,7 @@ bool readLE(const std::vector<uint8_t>& i_input, uint32_t& io_idx, T& o_data)
return true;
}
+#ifndef __PPE__
///
/// @brief Converts LE data into native order
/// @tparam T the data type to output to
@@ -188,6 +207,7 @@ bool readLEArray(const std::vector<uint8_t>& i_input, const uint32_t i_size, uin
return l_passing;
}
+#endif
///
/// @brief Converts BE data into native order
@@ -225,6 +245,7 @@ bool readBE(const std::vector<uint8_t>& i_input, uint32_t& io_idx, T& o_data)
return true;
}
+#ifndef __PPE__
///
/// @brief Converts BE data into native order
/// @tparam T the data type to output to
@@ -248,6 +269,7 @@ bool readBEArray(const std::vector<uint8_t>& i_input, const uint32_t i_size, uin
return l_passing;
}
+#endif
}
diff --git a/src/import/generic/memory/lib/utils/mss_field.H b/src/import/generic/memory/lib/utils/mss_field.H
index 122086b9d..d6bdeaaed 100644
--- a/src/import/generic/memory/lib/utils/mss_field.H
+++ b/src/import/generic/memory/lib/utils/mss_field.H
@@ -37,8 +37,21 @@
#ifndef _MSS_FIELD_H_
#define _MSS_FIELD_H_
-#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
-#include <generic/memory/lib/utils/mss_generic_check.H>
+#ifdef __PPE__
+ #include <mss_generic_check.H>
+#else
+ #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+ #include <generic/memory/lib/utils/mss_generic_check.H>
+#endif
+
+//Macro
+#ifdef __PPE__
+ #define TARGIDFORMAT "0x%08X"
+ #define TARGTID i_target.get()
+#else
+ #define TARGIDFORMAT "%s"
+ #define TARGTID spd::c_str(i_target)
+#endif
namespace mss
{
@@ -190,18 +203,18 @@ inline fapi2::ReturnCode get_field(const fapi2::Target<T>& i_target,
.set_LIST_SIZE(i_data.size())
.set_FUNCTION(i_ffdc_codes)
.set_TARGET(i_target),
- "Out of bounds indexing (with %d) on a list of size %d for %s",
+ "Out of bounds indexing (with %d) on a list of size %d for " TARGIDFORMAT,
BYTE,
i_data.size(),
- spd::c_str(i_target));
+ TARGTID);
{
// Extracting desired bits
const fapi2::buffer<OT> l_buffer(i_data[BYTE]);
l_buffer.template extractToRight<F.get_start(), F.get_length()>(o_value);
- FAPI_DBG("%s data[%d] = 0x%02x. Field with start bit %d, bit len %d, has data 0x%02x.",
- spd::c_str(i_target),
+ FAPI_DBG(TARGIDFORMAT " data[%d] = 0x%02x. Field with start bit %d, bit len %d, has data 0x%02x.",
+ TARGTID,
BYTE,
i_data[BYTE],
F.get_start(),
@@ -214,6 +227,7 @@ inline fapi2::ReturnCode get_field(const fapi2::Target<T>& i_target,
fapi_try_exit:
return fapi2::current_err;
}
+#ifndef __PPE__
///
/// @brief Helper function to set byte field information
@@ -274,6 +288,7 @@ inline fapi2::ReturnCode set_field(const fapi2::Target<T>& i_target,
fapi_try_exit:
return fapi2::current_err;
}
+#endif
///
/// @brief byte field reader
@@ -303,7 +318,7 @@ inline fapi2::ReturnCode get_field( const fapi2::Target<T>& i_target,
{
IT l_temp = 0;
FAPI_TRY( (get_field<E, F>(i_target, i_data, i_ffdc_codes, l_temp)),
- "Failed get_field() for %s", spd::c_str(i_target) );
+ "Failed get_field() for " TARGIDFORMAT, TARGTID );
// Test if retrieved data seems valid
FAPI_TRY( check::invalid_value(i_target,
@@ -313,29 +328,31 @@ inline fapi2::ReturnCode get_field( const fapi2::Target<T>& i_target,
F.get_byte(i_data),
l_temp,
i_ffdc_codes),
- "Failed fail_for_invalid_value() for %s", spd::c_str(i_target) );
+ "Failed fail_for_invalid_value() for " TARGIDFORMAT, TARGTID );
+
// Output should only change if data check passes
o_value = static_cast<OT>(l_temp);
-
FAPI_ASSERT( o_value == l_temp,
fapi2::MSS_CONVERSION_ERROR()
.set_ORIGINAL_VAL(l_temp)
.set_CONVERTED_VAL(o_value)
.set_TARGET(i_target)
.set_FUNCTION(i_ffdc_codes),
- "Conversion error between original %d to converted %d value for %s",
- l_temp, o_value, spd::c_str(i_target) );
+ "Conversion error between original %d to converted %d value for " TARGIDFORMAT,
+ l_temp, o_value, TARGTID);
FAPI_DBG("%s: 0x%02x for %s",
TT::FIELD_STR,
o_value,
spd::c_str(i_target));
+
fapi_try_exit:
return fapi2::current_err;
}
+#ifndef __PPE__
///
/// @brief byte field writer
/// @tparam E endian type
@@ -388,6 +405,7 @@ inline fapi2::ReturnCode set_field( const fapi2::Target<T>& i_target,
fapi_try_exit:
return fapi2::current_err;
}
+#endif
}// mss
diff --git a/src/import/generic/memory/lib/utils/mss_generic_check.H b/src/import/generic/memory/lib/utils/mss_generic_check.H
index f31440e14..45428b8c3 100644
--- a/src/import/generic/memory/lib/utils/mss_generic_check.H
+++ b/src/import/generic/memory/lib/utils/mss_generic_check.H
@@ -37,15 +37,18 @@
#define _MSS_GENERIC_CHECK_H_
#include <fapi2.H>
-#include <generic/memory/lib/utils/shared/mss_generic_consts.H>
-#include <generic/memory/lib/utils/scom.H>
-#include <generic/memory/lib/utils/c_str.H>
+
+#ifndef __PPE__
+ #include <generic/memory/lib/utils/shared/mss_generic_consts.H>
+ #include <generic/memory/lib/utils/scom.H>
+ #include <generic/memory/lib/utils/c_str.H>
+#endif
namespace mss
{
namespace check
{
-
+#ifndef __PPE__
///
/// @brief Checks whether any FIRs have lit up on a target
/// @tparam MC MC type for which to check FIR's
@@ -175,6 +178,7 @@ fapi2::ReturnCode fir_or_pll_fail( const fapi2::Target<T>& i_target,
#endif
}
+#endif
///
/// @brief Checks conditional passes and implements traces & exits if it fails
/// @tparam T fapi2 target type
@@ -196,6 +200,18 @@ inline fapi2::ReturnCode invalid_value(const fapi2::Target<T>& i_target,
const FFDC i_ffdc_codes,
const char* i_err_str = "")
{
+#ifdef __PPE__
+ FAPI_ASSERT(i_conditional,
+ fapi2::MSS_FAILED_DATA_INTEGRITY_CHECK().
+ set_VALUE(i_data).
+ set_BYTE(i_byte_index).
+ set_TARGET(i_target).
+ set_FFDC_CODE(i_ffdc_codes),
+ "%s Byte %d, Data returned: %d.",
+ i_err_str,
+ i_byte_index,
+ i_data);
+#else
FAPI_ASSERT(i_conditional,
fapi2::MSS_FAILED_DATA_INTEGRITY_CHECK().
set_VALUE(i_data).
@@ -208,6 +224,7 @@ inline fapi2::ReturnCode invalid_value(const fapi2::Target<T>& i_target,
i_byte_index,
i_data);
+#endif
return fapi2::FAPI2_RC_SUCCESS;
fapi_try_exit:
diff --git a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
index 37901f21b..72970ae63 100644
--- a/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
+++ b/src/import/generic/memory/lib/utils/shared/mss_generic_consts.H
@@ -38,7 +38,9 @@
#ifndef _MSS_GENERIC_CONSTS_H_
#define _MSS_GENERIC_CONSTS_H_
-#include <cstdint>
+#ifndef __PPE__
+ #include <cstdint>
+#endif
namespace mss
{
diff --git a/src/import/generic/procedures/xml/error_info/generic_error.xml b/src/import/generic/procedures/xml/error_info/generic_error.xml
index eed7aff57..d1930edfa 100644
--- a/src/import/generic/procedures/xml/error_info/generic_error.xml
+++ b/src/import/generic/procedures/xml/error_info/generic_error.xml
@@ -687,6 +687,7 @@
Settings are incorrect for received data.
This could be code problem (decoding) or bad data.
</description>
+ <ffdc>TARGET</ffdc>
<ffdc>VALUE</ffdc>
<ffdc>BYTE</ffdc>
<ffdc>FFDC_CODE</ffdc>
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