Import register constants from KIS codebase, update start.S to use.

2 files changed, 157 insertions, 31 deletions

diff --git a/src/include/kernel/ppcconsts.S b/src/include/kernel/ppcconsts.S
new file mode 100644
index 000000000..c8346df59
--- /dev/null
+++ b/src/include/kernel/ppcconsts.S
@@ -0,0 +1,124 @@
+#*--------------------------------------------------------------------*#
+#*  Register Constants                                                *#
+#*--------------------------------------------------------------------*#
+
+                .set r0,0
+                .set r1,1
+                .set r2,2
+                .set r3,3
+                .set r4,4
+                .set r5,5
+                .set r6,6
+                .set r7,7
+                .set r8,8
+                .set r9,9
+                .set r10,10
+                .set r11,11
+                .set r12,12
+                .set r13,13
+                .set r14,14
+                .set r15,15
+                .set r16,16
+                .set r17,17
+                .set r18,18
+                .set r19,19
+                .set r20,20
+                .set r21,21
+                .set r22,22
+                .set r23,23
+                .set r24,24
+                .set r25,25
+                .set r26,26 
+                .set r27,27
+                .set r28,28
+                .set r29,29
+                .set r30,30
+                .set r31,31
+
+#*--------------------------------------------------------------------*#
+#*  CR Register Constants                                             *#
+#*--------------------------------------------------------------------*#
+
+                .set cr0,0
+                .set cr1,1
+                .set cr2,2
+                .set cr3,3
+                .set cr4,4
+                .set cr5,5
+                .set cr6,6
+                .set cr7,7
+                .set lt,0
+                .set gt,1
+                .set eq,2
+                .set so,3
+
+#*--------------------------------------------------------------------*#
+#*  SR Register Constants                                             *#
+#*--------------------------------------------------------------------*#
+
+                .set sr0,0
+                .set sr1,1
+                .set sr2,2
+                .set sr3,3
+                .set sr4,4
+                .set sr5,5
+                .set sr6,6
+                .set sr7,7
+                .set sr8,8
+                .set sr9,9
+                .set sr10,10
+                .set sr11,11
+                .set sr12,12
+                .set sr13,13
+                .set sr14,14
+                .set sr15,15
+
+#*--------------------------------------------------------------------*#
+#*  SPR Constants                                                     *#
+#*--------------------------------------------------------------------*#
+
+                .set XER,1
+                .set LR,8
+                .set CTR,9
+                .set DSISR,18
+                .set DAR,19
+                .set DEC,22
+                .set SDR1,25
+                .set SRR0,26
+                .set SRR1,27
+                .set SPRG0,272
+                .set SPRG1,273
+                .set SPRG2,274
+                .set SPRG3,275
+                .set EAR,282
+                .set TBL,284
+                .set TBU,285
+                .set PVR,287
+                .set IBAT0U,528
+                .set IBAT0L,529
+                .set IBAT1U,530
+                .set IBAT1L,531
+                .set IBAT2U,532
+                .set IBAT2L,533
+                .set IBAT3U,534
+                .set IBAT3L,535
+
+                .set DBAT0U,536
+                .set DBAT0L,537
+                .set DBAT1U,538
+                .set DBAT1L,539
+                .set DBAT2U,540
+                .set DBAT2L,541
+                .set DBAT3U,542
+                .set DBAT3L,543
+
+                .set DMISS,976
+                .set DCMP,977
+                .set HASH1,978
+                .set HASH2,979
+                .set IMISS,980   
+                .set ICMP,981
+                .set RPA,982
+                .set HID0,1008
+                .set IABR,1010
+
diff --git a/src/kernel/start.S b/src/kernel/start.S
index 9e8a560ba..b935e0bbb 100644
--- a/src/kernel/start.S
+++ b/src/kernel/start.S
@@ -1,58 +1,60 @@
+.include "kernel/ppcconsts.S"
+
 .section .text.intvects
 
 .global _start
 _start:
     ;// Enter 64 bit mode
-    mfmsr 0
-    lis 11, 0x8000
-    sldi 11,11, 32
-    or 11,11,0
-    mtmsr 11
+    mfmsr r0
+    lis r11, 0x8000
+    sldi r11,r11, 32
+    or r11,r11,r0
+    mtmsr r11
     isync
     
     ;// Relocate code
     bl pre_relocate	;// fill LR with address
 pre_relocate:
-    mflr 2
-    lis 1,0x0010
-    cmpl 0,2,1		;// Check LR is less than 1MB
+    mflr r2
+    lis r1,0x0010
+    cmpl cr0,r2,r1		;// Check LR is less than 1MB
     blt finished_relocate	;// No need to relocate if less than 1MB
     
     ;// Get addresses for relocation.
     ;// Write address in r5
     ;// Read address in r1
-    li 5,0
-    lis 1, -1	;// fill r1 with ffff..ff0000
+    li r5,0
+    lis r1, -1	;// fill r1 with ffff..ff0000
 
-    and 1,1,2	;// and with pre_relocate's address from r2 to get start of
-		;// rom section.
+    and r1,r1,r2 ;// and with pre_relocate's address from r2 to get start of
+		 ;// rom section.
     
     ;// Update LR to low address.
-    clrldi 2,2,48  ;// Equiv to ~(0x0FFFF)
+    clrldi r2,r2,48  ;// Equiv to ~(0x0FFFF)
     mtlr 2
 
     ;// Moving 1MB , so load r2 with (1MB / 8 bytes per word)
-    lis 2, 0x2
-    mtctr 2
+    lis r2, 0x2
+    mtctr r2
 relocate_loop:		
     ;// The dcbst/sync/icbi/isync sequence comes from PowerISA
-    ld 4, 0(1)
-    std 4, 0(5)
-    dcbst 0,5
+    ld r4, 0(r1)
+    std r4, 0(r5)
+    dcbst 0,r5
     sync
-    icbi 0,5
+    icbi 0,r5
     isync
-    addi 1,1,8
-    addi 5,5,8
+    addi r1,r1,8
+    addi r5,r5,8
     bdnz+ relocate_loop
     
     ;// Now that we've relocated, erase exception prefix.
-    mfmsr 11
+    mfmsr r11
     
-    rldicl 11,11,57,1  ;// Erase bit 6 ( equiv to r11 & ~(0x40))
-    rotldi 11,11,7
+    rldicl r11,r11,57,1  ;// Erase bit 6 ( equiv to r11 & ~(0x40))
+    rotldi r11,r11,7
     
-    mtmsr 11
+    mtmsr r11
     
     ;// Jump to low address.
     blr
@@ -68,14 +70,14 @@ intvect_system_reset:
 .section .text
 _main:
     ;// Set up initial TOC Base
-    lis 2, main@h
-    ori 2, 2, main@l
-    ld 2,8(2)
+    lis r2, main@h
+    ori r2, r2, main@l
+    ld r2,8(r2)
     
     ;// Set up initial stack, space for 8 double-words
-    lis 1, kernel_stack@h
-    ori 1, 1, kernel_stack@l
-    addi 1, 1, 16320
+    lis r1, kernel_stack@h
+    ori r1, r1, kernel_stack@l
+    addi r1, r1, 16320
 
     ;// Call main.
     bl main