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author | Thi Tran <thi@us.ibm.com> | 2016-08-18 11:35:45 -0500 |
---|---|---|
committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-08-24 23:24:43 -0400 |
commit | 197a3ca38bf3a0430b7887de8e73a9846cedbf53 (patch) | |
tree | f693633789d4ff2246ad169312876b6976fdc56e /src | |
parent | 7a7a175b5614b4908b6487689801678322bed5ce (diff) | |
download | talos-hostboot-197a3ca38bf3a0430b7887de8e73a9846cedbf53.tar.gz talos-hostboot-197a3ca38bf3a0430b7887de8e73a9846cedbf53.zip |
p9_mss_setup_bars: Incorrect addr unit programmed in MC configuration regs
Change-Id: I9e20a51d84389fba81e286606d6ca0945aaacaca
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28469
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28472
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C | 52 | ||||
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 20 |
2 files changed, 53 insertions, 19 deletions
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C index ce6d302b7..5361fb520 100644 --- a/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C +++ b/src/import/chips/p9/procedures/hwp/nest/p9_mss_setup_bars.C @@ -590,9 +590,9 @@ fapi2::ReturnCode getBarData(const mcsPortGroupInfo_t i_portInfo[], } else { - o_mcsBarData.MCFGPA_HOLE_valid[ii] = 0; - o_mcsBarData.MCFGPA_HOLE_LOWER_addr[ii] = 0; - o_mcsBarData.MCFGPA_HOLE_UPPER_addr[ii] = 0; + o_mcsBarData.MCFGPMA_HOLE_valid[ii] = 0; + o_mcsBarData.MCFGPMA_HOLE_LOWER_addr[ii] = 0; + o_mcsBarData.MCFGPMA_HOLE_UPPER_addr[ii] = 0; } } @@ -875,10 +875,17 @@ fapi2::ReturnCode writeMCBarData( MCS_MCFGP_GROUP_SIZE_LEN>( l_data.MCFGP_group_size); - // Group base address (bits 24:47) + // Group base address (bits 24:47) 0b000000000000000000000001 = 4GB + // 000000001 (base addr of 4GB) + // 000000010 (base addr of 8GB) + // 000000100 (base addr of 16GB) + // 000001000 (base addr of 32GB) + // 000010000 (base addr of 64GB) + // 000100000 (base addr of 128GB) + // 001000000 (base addr of 256GB) l_scomData.insertFromRight<MCS_MCFGP_GROUP_BASE_ADDRESS, MCS_MCFGP_GROUP_BASE_ADDRESS_LEN>( - l_data.MCFGP_groupBaseAddr); + (l_data.MCFGP_groupBaseAddr >> 2)); } // Channel per group (bits 1:4) @@ -915,10 +922,17 @@ fapi2::ReturnCode writeMCBarData( MCS_MCFGPM_GROUP_SIZE_LEN>( l_data.MCFGPM_group_size); - // Group base address (bits 24:47) + // Group base address (bits 24:47), 0b000000000000000000000001 = 4GB + // 000000001 (base addr of 4GB) + // 000000010 (base addr of 8GB) + // 000000100 (base addr of 16GB) + // 000001000 (base addr of 32GB) + // 000010000 (base addr of 64GB) + // 000100000 (base addr of 128GB) + // 001000000 (base addr of 256GB) l_scomData.insertFromRight<MCS_MCFGPM_GROUP_BASE_ADDRESS, MCS_MCFGPM_GROUP_BASE_ADDRESS_LEN>( - l_data.MCFGPM_groupBaseAddr); + (l_data.MCFGPM_groupBaseAddr >> 2)); } @@ -938,13 +952,15 @@ fapi2::ReturnCode writeMCBarData( l_scomData.setBit<MCS_MCFGPA_HOLE0_VALID>(); // Hole 0 lower addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPA_HOLE0_LOWER_ADDRESS, MCS_MCFGPA_HOLE0_LOWER_ADDRESS_LEN>( - l_data.MCFGPA_HOLE_LOWER_addr[0]); + (l_data.MCFGPA_HOLE_LOWER_addr[0] >> 2)); // Hole 0 upper addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPA_HOLE0_UPPER_ADDRESS, MCS_MCFGPA_HOLE0_UPPER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_UPPER_addr[0]); + (l_data.MCFGPMA_HOLE_UPPER_addr[0] >> 2)); } // Hole 1 @@ -954,13 +970,15 @@ fapi2::ReturnCode writeMCBarData( l_scomData.setBit<MCS_MCFGPA_HOLE0_VALID>(); // Hole 1 lower addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPA_HOLE1_LOWER_ADDRESS, MCS_MCFGPA_HOLE1_LOWER_ADDRESS_LEN>( - l_data.MCFGPA_HOLE_LOWER_addr[1]); + (l_data.MCFGPA_HOLE_LOWER_addr[1] >> 2)); // Hole 1 upper addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPA_HOLE1_UPPER_ADDRESS, MCS_MCFGPA_HOLE1_UPPER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_UPPER_addr[1]); + (l_data.MCFGPMA_HOLE_UPPER_addr[1] >> 2)); } // Write to reg @@ -979,29 +997,33 @@ fapi2::ReturnCode writeMCBarData( l_scomData.setBit<MCS_MCFGPMA_HOLE0_VALID>(); // Hole 0 lower addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPMA_HOLE0_LOWER_ADDRESS, MCS_MCFGPMA_HOLE0_LOWER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_LOWER_addr[0]); + ( l_data.MCFGPMA_HOLE_LOWER_addr[0] >> 2)); // Hole 0 upper addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPMA_HOLE0_UPPER_ADDRESS, MCS_MCFGPMA_HOLE0_UPPER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_UPPER_addr[0]); + (l_data.MCFGPMA_HOLE_UPPER_addr[0] >> 2)); } // Hole 1 if (l_data.MCFGPMA_HOLE_valid[1] == true) { // MCFGPMA HOLE1 valid (bit 0) + // 0b0000000001 = 4GB l_scomData.setBit<MCS_MCFGPMA_HOLE1_VALID>(); // Hole 1 lower addr l_scomData.insertFromRight<MCS_MCFGPMA_HOLE1_LOWER_ADDRESS, MCS_MCFGPMA_HOLE1_LOWER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_LOWER_addr[1]); + (l_data.MCFGPMA_HOLE_LOWER_addr[1] >> 2)); // Hole 1 upper addr + // 0b0000000001 = 4GB l_scomData.insertFromRight<MCS_MCFGPMA_HOLE1_UPPER_ADDRESS, MCS_MCFGPMA_HOLE1_UPPER_ADDRESS_LEN>( - l_data.MCFGPMA_HOLE_UPPER_addr[1]); + (l_data.MCFGPMA_HOLE_UPPER_addr[1] >> 2)); } // Write to reg diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index fa4032224..9d9fba78a 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -10209,10 +10209,22 @@ the tmgt code has been updated to have the correct type for MSS_MEM_WATT_TARGET- <attribute> <id>MSS_MCS_GROUP_32</id> - <description>Data Structure from eff grouping to setup bars to help determine different groups - Non- Mirroring [0-7] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address - // Mirroring [8-15] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address -Measured in GB</description> + <description> + Data Structure from eff grouping to setup bars to help determine + different groups + Non-Mirroring array[0-7] [0.17]: 0-- Port size; 1-- No of ports in group; 2-- Total group size of non-mirroring; + 3-- Base address; 4-11-- PortID number in group; + 12-- Alt Memory valid(0); 13-- Alt Memory valid (1); + 14-- Alt Group size (0); 15-- Alt Group size(1); + 16-- Alt Base address (0); 17-- Alt Base address (1); + + 13-- Alternate Group Size; 14-- Alternate Base address + Mirroring array[8-15] [0:17]: 0-- Port size; 1-- No of ports in group; 2-- Total group size of mirroring; + 3-- Base address; 4-11-- PortID number; + 12-- Alt Memory valid(0); 13-- Alt Memory valid (1); + 14-- Alt Group size (0); 15-- Alt Group size(1); + 16-- Alt Base address (0); 17-- Alt Base address (1); + </description> <simpleType> <uint32_t> </uint32_t> |