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author | crgeddes <crgeddes@us.ibm.com> | 2016-05-10 15:56:56 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-11 11:31:43 -0400 |
commit | 1d150b6e4e679d4c1248e9e49c1d2ccec2483b63 (patch) | |
tree | 28e07ac8e79d5b650de0371f86ed0cac1c6f5096 /src | |
parent | e768d55c213a4a8e0639a17c2bedba5e7cace010 (diff) | |
download | talos-hostboot-1d150b6e4e679d4c1248e9e49c1d2ccec2483b63.tar.gz talos-hostboot-1d150b6e4e679d4c1248e9e49c1d2ccec2483b63.zip |
Add memory_mrw_attributes.xml attributes to HB
MRW attributes set by mrw script from mru values. This
file contains mostly system policy information about
various attributes for memory processes. Adds attributes,
ensures correct volatility, type, description, accessibility,
and adds attributes to correct type (SYSTEM).
Change-Id: I38ddd5b2e49f3a7770ab8efbd29706718eafa84e
RTC:134081
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/24350
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Elizabeth K. Liner <eliner@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/usr/targeting/common/xmltohb/attribute_types.xml | 178 | ||||
-rwxr-xr-x | src/usr/targeting/common/xmltohb/target_types.xml | 18 |
2 files changed, 196 insertions, 0 deletions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml index 5ef2bdbf3..dec59cba5 100644 --- a/src/usr/targeting/common/xmltohb/attribute_types.xml +++ b/src/usr/targeting/common/xmltohb/attribute_types.xml @@ -25287,4 +25287,182 @@ DEPRECATED!!!! </hwpfToHbAttrMap> </attribute> +<attribute> + <id>MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT</id> + <description> + Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_port + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_SLOT</id> + <description> + Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_slot + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_SLOT</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_MEM_M_DRAM_CLOCKS</id> + <description> + Machine Readable Workbook for the number of M DRAM clocks. + One approach to curbing DRAM power usage is by throttling + traffic through a programmable N commands over M window. + </description> + <simpleType> + <uint32_t> + </uint32_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_MEM_M_DRAM_CLOCKS</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_AVDD_OFFSET_DISABLE</id> + <description> + Used for to determine whether to apply an offset to AVDD. Supplied by MRW. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_AVDD_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VDD_OFFSET_DISABLE</id> + <description> + Used for to determine whether to apply an offset to VDD. Supplied by MRW + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VDD_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VCS_OFFSET_DISABLE</id> + <description> + Used for to determine whether to apply an offset to VCS. Supplied by MRW. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VCS_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VPP_OFFSET_DISABLE</id> + <description> + Used for to determine whether to apply an offset to VPP. Supplied by MRW. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VPP_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_VDDR_OFFSET_DISABLE</id> + <description> + Used for to determine whether to apply an offset to VDDR. Supplied by MRW. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_VDDR_OFFSET_DISABLE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_FINE_REFRESH_MODE</id> + <description> + Fine refresh mode. + Should be defaulted to normal mode. + This is for DDR4 MRS3. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>non-volatile</persistency> + <readable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_FINE_REFRESH_MODE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + +<attribute> + <id>MRW_TEMP_REF_RANGE</id> + <description> + Temp ref range. + Should be defaulted to extended range. + This is for DDR4 MRS4. + </description> + <simpleType> + <uint8_t> + </uint8_t> + </simpleType> + <persistency>volatile-zeroed</persistency> + <readable/> + <writeable/> + <hwpfToHbAttrMap> + <id>ATTR_MRW_TEMP_REF_RANGE</id> + <macro>DIRECT</macro> + </hwpfToHbAttrMap> +</attribute> + + </attributes> diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml index 9df796ee2..6575b9289 100755 --- a/src/usr/targeting/common/xmltohb/target_types.xml +++ b/src/usr/targeting/common/xmltohb/target_types.xml @@ -2072,6 +2072,24 @@ <attribute><id>MSS_DRAMINIT_RESET_DISABLE</id></attribute> <attribute><id>MSS_VDDR_OVERIDE_SPD</id></attribute> <attribute><id>ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id></attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_PORT</id></attribute> + <attribute><id>MRW_SAFEMODE_MEM_THROTTLED_N_COMMANDS_PER_SLOT</id></attribute> + <attribute><id>MRW_THERMAL_MEMORY_POWER_LIMIT</id></attribute> + <attribute><id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id></attribute> + <attribute><id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id></attribute> + <attribute><id>MRW_MEM_M_DRAM_CLOCKS</id></attribute> + <attribute><id>MRW_MAX_DRAM_DATABUS_UTIL</id></attribute> + <attribute><id>MRW_MCS_PREFETCH_RETRY_THRESHOLD</id></attribute> + <attribute><id>MRW_POWER_CONTROL_REQUESTED</id></attribute> + <attribute><id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id></attribute> + <attribute><id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id></attribute> + <attribute><id>MRW_AVDD_OFFSET_DISABLE</id></attribute> + <attribute><id>MRW_VDD_OFFSET_DISABLE</id></attribute> + <attribute><id>MRW_VCS_OFFSET_DISABLE</id></attribute> + <attribute><id>MRW_VPP_OFFSET_DISABLE</id></attribute> + <attribute><id>MRW_VDDR_OFFSET_DISABLE</id></attribute> + <attribute><id>MRW_FINE_REFRESH_MODE</id></attribute> + <attribute><id>MRW_TEMP_REF_RANGE</id></attribute> </targetType> <!-- enc-node-power9 --> |