WOF: VRM timing, WOF and VDM enblement attributes additions

Change-Id: I1ff55edf512f1a3ec4b6b1c1773726e31ae2e611
RTC:169800
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38207
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: AMIT KUMAR <akumar3@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38310
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M. Crowell <dcrowell@us.ibm.com>

10 files changed, 746 insertions, 184 deletions

diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
index c5e97a696..54ee44d63 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_hcd_memmap_base.H
@@ -364,7 +364,8 @@ HCD_CONST(CME_QUEUED_SCAN_DISABLE_BIT_POS,      0x00000002)
 HCD_CONST(CME_SKIP_CORE_POWEROFF_BIT_POS,       0x00000001)
 HCD_CONST(CME_QM_FLAG_RESCLK_ENABLE,            0x8000)
 HCD_CONST(CME_QM_FLAG_SYS_IVRM_ENABLE,          0x4000)
-HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE,           0x2000)
+HCD_CONST(CME_QM_FLAG_SYS_VDM_ENABLE,           0x2000)
+HCD_CONST(CME_QM_FLAG_SYS_WOF_ENABLE,           0x1000)
 
 /// CME Hcode
 
@@ -399,6 +400,7 @@ HCD_CONST(CPMR_DEBUG_REGION_OFFSET,             CPMR_TRACE_REGION_OFFSET + CPMR_
 HCD_CONST(CPMR_DEBUG_REGION_SIZE,               (64 * ONE_KB)) // 192K + 64K = 256K
 
 
+
 //---------------------------------------------------------------------------------------
 
 /// PPMR Header
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
index 16f40325c..44b50df67 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pm_hcd_flags.h
@@ -149,9 +149,17 @@ typedef union pgpe_flags
         uint16_t  dpll_droop_protect_enable     : 1;
         uint16_t  reserved7                     : 1;
         uint16_t  occ_ipc_immed_response        : 1;
-        uint16_t  reserved_9_15                 : 7;
+        uint16_t  wof_ipc_immed_response        : 1;
+        uint16_t  enable_fratio                 : 1;
+        uint16_t  enable_vratio                 : 1;
+        uint16_t  vratio_modifier               : 1;
+        uint16_t  reserved_13_15                : 7;
 #else
-        uint16_t  reserved_9_15                 : 7;
+        uint16_t  reserved_13_15                : 7;
+        uint16_t  vratio_modifier               : 1;
+        uint16_t  enable_vratio                 : 1;
+        uint16_t  enable_fratio                 : 1;
+        uint16_t  wof_ipc_immed_response        : 1;
         uint16_t  occ_ipc_immed_response        : 1;
         uint16_t  reserved7                     : 1;
         uint16_t  dpll_droop_protect_enable     : 1;
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
index f339a6276..a45f93fcc 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_common.h
@@ -418,7 +418,7 @@ typedef struct __attribute__((__packed__)) WofTablesHeader
 typedef struct __attribute__((__packed__)) HomerSysVFRTLayout
 {
     VFRTHeaderLayout_t vfrtHeader;
-    uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE];
+    uint8_t vfrt_data[VFRT_FRATIO_SIZE][VFRT_VRATIO_SIZE];
 } HomerSysVFRTLayout_t;
 
 
@@ -427,7 +427,7 @@ typedef struct __attribute__((__packed__)) HomerSysVFRTLayout
 typedef struct __attribute__((__packed__)) HomerVFRTLayout
 {
     VFRTHeaderLayout_t vfrtHeader;
-    uint8_t vfrt_data[VFRT_VRATIO_SIZE][VFRT_FRATIO_SIZE];
+    uint8_t vfrt_data[VFRT_FRATIO_SIZE][VFRT_VRATIO_SIZE];
     uint8_t padding[128];
 } HomerVFRTLayout_t;
 
diff --git a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
index a6cd8b943..a089611cb 100644
--- a/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
+++ b/src/import/chips/p9/procedures/hwp/lib/p9_pstates_pgpe.h
@@ -244,6 +244,9 @@ typedef struct
     /// All operating points
     VpdOperatingPoint operating_points_set[NUM_VPD_PTS_SET][VPD_PV_POINTS];
 
+    //DPLL pstate 0 value
+    uint32_t dpll_pstate0_value;
+
     // @todo DPLL Droop Settings.  These need communication to SGPE for STOP
 
 } GlobalPstateParmBlock;
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
index dc58fe18b..3e39c4149 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_hcode_image_build.C
@@ -668,6 +668,7 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO
     uint32_t     sgpeFlag  = 0;
     uint16_t     qmFlags   = 0;
     pgpe_flags_t pgpeFlags;
+    pgpeFlags.value = 0;
 
     const fapi2::Target<fapi2::TARGET_TYPE_SYSTEM> FAPI_SYSTEM;
     cmeHeader_t* pCmeHdr = (cmeHeader_t*) & i_pChipHomer->cpmrRegion.cmeSramRegion[CME_INT_VECTOR_SIZE];
@@ -784,6 +785,7 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO
     if( attrVal )
     {
         qmFlags |= CME_QM_FLAG_RESCLK_ENABLE;
+        pgpeFlags.fields.resclk_enable = 1;
     }
 
     FAPI_DBG("Resonant Clock Enable  :   %s", attrVal ? "TRUE" : "FALSE" );
@@ -796,10 +798,26 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO
     if( attrVal )
     {
         qmFlags |= CME_QM_FLAG_SYS_IVRM_ENABLE;
+        pgpeFlags.fields.ivrm_enable = 1;
     }
 
     FAPI_DBG("System IVRM Enable   :   %s", attrVal ? "TRUE" : "FALSE" );
 
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_VDM_ENABLE,
+                           FAPI_SYSTEM,
+                           attrVal),
+             "Error from FAPI_ATTR_GET for attribute ATTR_VDM_ENABLE" );
+
+    if( attrVal )
+    {
+        qmFlags |= CME_QM_FLAG_SYS_VDM_ENABLE;
+        pgpeFlags.fields.vdm_enable = 1;
+    }
+
+    FAPI_DBG("System VDM Enable   :   %s", attrVal ? "TRUE" : "FALSE" );
+
+
+
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_SYSTEM_WOF_ENABLED,
                            FAPI_SYSTEM,
                            attrVal),
@@ -808,13 +826,13 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO
     if( attrVal )
     {
         qmFlags |= CME_QM_FLAG_SYS_WOF_ENABLE;
+        pgpeFlags.fields.wof_enable = 1;
     }
 
     FAPI_DBG("System WOF Enable   :   %s", attrVal ? "TRUE" : "FALSE" );
 
     // Set PGPE Header Flags from Attributes
     FAPI_DBG(" -------------------- PGPE Flags -----------------");
-    pgpeFlags.value = 0;
     FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_PGPE_HCODE_FUNCTION_ENABLE,
                            FAPI_SYSTEM,
                            attrVal),
@@ -828,6 +846,44 @@ fapi2::ReturnCode updateImageFlags( Homerlayout_t* i_pChipHomer, CONST_FAPI2_PRO
 
     FAPI_DBG("PGPE Hcode Mode        :   %s", attrVal ? "PSTATES Enabled" : "OCC IPC Immediate Response Mode" );
 
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_WOF_ENABLE_FRATIO,
+                           FAPI_SYSTEM,
+                           attrVal),
+             "Error from FAPI_ATTR_GET for attribute ATTR_WOF_ENABLE_FRATIO" );
+
+    if( attrVal )
+    {
+        pgpeFlags.fields.enable_fratio = 1;
+    }
+
+    FAPI_DBG("System FRATIO ENABLE   :   %s", attrVal ? "TRUE" : "FALSE" );
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_WOF_ENABLE_VRATIO,
+                           FAPI_SYSTEM,
+                           attrVal),
+             "Error from FAPI_ATTR_GET for attribute ATTR_WOF_ENABLE_VRATIO" );
+
+    if( attrVal )
+    {
+        pgpeFlags.fields.enable_vratio = 1;
+    }
+
+    FAPI_DBG("System VRATIO ENABLE   :   %s", attrVal ? "TRUE" : "FALSE" );
+
+    FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_WOF_VRATIO_SELECT,
+                           FAPI_SYSTEM,
+                           attrVal),
+             "Error from FAPI_ATTR_GET for attribute ATTR_WOF_VRATIO_SELECT" );
+
+    if( attrVal )
+    {
+        pgpeFlags.fields.vratio_modifier = 1;
+    }
+
+    FAPI_DBG("System VRATIO SELECT:   %s", attrVal ? "TRUE" : "FALSE" );
+
+
+
     // Updating flag fields in the headers
     pCmeHdr->g_cme_mode_flags       =   SWIZZLE_4_BYTE(cmeFlag);
     pCmeHdr->g_cme_qm_mode_flags    =   SWIZZLE_2_BYTE(qmFlags);
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
index 630842a85..813795019 100644
--- a/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
+++ b/src/import/chips/p9/procedures/hwp/pm/p9_pstate_parameter_block.C
@@ -341,6 +341,14 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
         // Calculate pre-calculated slopes
         p9_pstate_compute_PsV_slopes(l_operating_points, &l_globalppb);
 
+        l_globalppb.dpll_pstate0_value = revle32((revle32(l_globalppb.reference_frequency_khz) + revle32(
+                                             l_globalppb.frequency_step_khz) - 1) / revle32(
+                                             l_globalppb.frequency_step_khz));
+
+        FAPI_INF("l_globalppb.dpll_pstate0_value %X", revle32(l_globalppb.dpll_pstate0_value));
+
+
+
         // -----------------------------------------------
         // Local parameter block
         // -----------------------------------------------
@@ -365,6 +373,7 @@ p9_pstate_parameter_block( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_
         l_localppb.dpll_pstate0_value = revle32((revle32(l_localppb.operating_points[ULTRA].frequency_mhz) * 1000 / revle32(
                 l_globalppb.frequency_step_khz)));
 
+        FAPI_INF("l_localppb.dpll_pstate0_value %X", revle32(l_localppb.dpll_pstate0_value));
         // -----------------------------------------------
         // OCC parameter block
         // -----------------------------------------------
@@ -511,12 +520,16 @@ fapi2::ReturnCode
 proc_get_attributes ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_target,
                       AttributeList* io_attr)
 {
+    const uint32_t EXT_VRM_TRANSITION_START_NS = 8000;
+    const uint32_t EXT_VRM_TRANSITION_RATE_INC_UV_PER_US = 10000;
+    const uint32_t EXT_VRM_TRANSITION_RATE_DEC_UV_PER_US = 10000;
+    const uint32_t EXT_VRM_STABILIZATION_TIME_NS = 5;
+    const uint32_t EXT_VRM_STEPSIZE_MV = 50;
     // --------------------------
     // attributes not yet defined
     // --------------------------
     io_attr->attr_dpll_bias                 = 0;
     io_attr->attr_undervolting              = 0;
-
     // ---------------------------------------------------------------
     // set ATTR_PROC_DPLL_DIVIDER
     // ---------------------------------------------------------------
@@ -604,12 +617,36 @@ proc_get_attributes ( const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& i_targe
     // allowed for this system.
     io_attr->attr_pm_safe_frequency_mhz = io_attr->attr_freq_core_floor_mhz;
 
-    // Hardcode for now... @todo RTC 169800
-    io_attr->attr_ext_vrm_transition_start_ns = 8000;
-    io_attr->attr_ext_vrm_transition_rate_inc_uv_per_us = 10000;  // 10mV/us
-    io_attr->attr_ext_vrm_transition_rate_dec_uv_per_us = 10000;  // 10mV/us
-    io_attr->attr_ext_vrm_stabilization_time_us = 5;
-    io_attr->attr_ext_vrm_step_size_mv = 50;
+
+    DATABLOCK_GET_ATTR(ATTR_EXTERNAL_VRM_TRANSITION_START_NS, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                       attr_ext_vrm_transition_start_ns);
+    DATABLOCK_GET_ATTR(ATTR_EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                       attr_ext_vrm_transition_rate_inc_uv_per_us);
+    DATABLOCK_GET_ATTR(ATTR_EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                       attr_ext_vrm_transition_rate_dec_uv_per_us);
+    DATABLOCK_GET_ATTR(ATTR_EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                       attr_ext_vrm_stabilization_time_us);
+    DATABLOCK_GET_ATTR(ATTR_EXTERNAL_VRM_STEPSIZE, fapi2::Target<fapi2::TARGET_TYPE_SYSTEM>(),
+                       attr_ext_vrm_step_size_mv);
+
+
+    io_attr->attr_ext_vrm_transition_start_ns =
+        (io_attr->attr_ext_vrm_transition_start_ns) ? io_attr->attr_ext_vrm_transition_start_ns : EXT_VRM_TRANSITION_START_NS;
+
+    io_attr->attr_ext_vrm_transition_rate_inc_uv_per_us =
+        (io_attr->attr_ext_vrm_transition_rate_inc_uv_per_us) ? io_attr->attr_ext_vrm_transition_rate_inc_uv_per_us :
+        EXT_VRM_TRANSITION_RATE_INC_UV_PER_US;  // 10mV/us
+
+    io_attr->attr_ext_vrm_transition_rate_dec_uv_per_us =
+        (io_attr->attr_ext_vrm_transition_rate_dec_uv_per_us) ? io_attr->attr_ext_vrm_transition_rate_dec_uv_per_us :
+        EXT_VRM_TRANSITION_RATE_DEC_UV_PER_US;  // 10mV/us
+
+    io_attr->attr_ext_vrm_stabilization_time_us =
+        (io_attr->attr_ext_vrm_stabilization_time_us) ? io_attr->attr_ext_vrm_stabilization_time_us :
+        EXT_VRM_STABILIZATION_TIME_NS;
+
+    io_attr->attr_ext_vrm_step_size_mv = (io_attr->attr_ext_vrm_step_size_mv) ? io_attr->attr_ext_vrm_step_size_mv :
+                                         EXT_VRM_STEPSIZE_MV;
 
 fapi_try_exit:
     return fapi2::current_err;
@@ -1583,20 +1620,21 @@ void p9_pstate_compute_vpd_pts(VpdOperatingPoint (*o_operating_points)[VPD_PV_PO
 {
     int p = 0;
 
-    const uint8_t pv_op_order[VPD_PV_POINTS] = VPD_PV_ORDER;
-
     //RAW POINTS. We just copy them as is
     for (p = 0; p < VPD_PV_POINTS; p++)
     {
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].vdd_mv = revle32(i_gppb->operating_points[p].vdd_mv) ;
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].vcs_mv = revle32(i_gppb->operating_points[p].vcs_mv);
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].idd_100ma = revle32(i_gppb->operating_points[p].idd_100ma);
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].ics_100ma = revle32(i_gppb->operating_points[p].ics_100ma);
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].frequency_mhz = revle32(i_gppb->operating_points[p].frequency_mhz);
-        o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].pstate = i_gppb->operating_points[p].pstate;
-        FAPI_INF("Raw o_operating_points[%d][pv_op_order[%d]].pstate %u",
+        o_operating_points[VPD_PT_SET_RAW][p].vdd_mv = (i_gppb->operating_points[p].vdd_mv) ;
+        o_operating_points[VPD_PT_SET_RAW][p].vcs_mv = (i_gppb->operating_points[p].vcs_mv);
+        o_operating_points[VPD_PT_SET_RAW][p].idd_100ma = (i_gppb->operating_points[p].idd_100ma);
+        o_operating_points[VPD_PT_SET_RAW][p].ics_100ma = (i_gppb->operating_points[p].ics_100ma);
+        o_operating_points[VPD_PT_SET_RAW][p].frequency_mhz = (i_gppb->operating_points[p].frequency_mhz);
+        o_operating_points[VPD_PT_SET_RAW][p].pstate = i_gppb->operating_points[p].pstate;
+        FAPI_INF("Raw o_operating_points[%d][[%d]].pstate %u",
                  VPD_PT_SET_RAW, p,
-                 o_operating_points[VPD_PT_SET_RAW][pv_op_order[p]].pstate);
+                 o_operating_points[VPD_PT_SET_RAW][p].pstate);
+
+        FAPI_INF("GP:PS=%x,Vdd=%x", revle32(o_operating_points[VPD_PT_SET_RAW][p].vdd_mv),
+                 revle32(o_operating_points[VPD_PT_SET_RAW][p].frequency_mhz));
     }
 
     //SYSTEM PARAMS APPLIED POINTS
@@ -1604,47 +1642,56 @@ void p9_pstate_compute_vpd_pts(VpdOperatingPoint (*o_operating_points)[VPD_PV_PO
     //that integer division doesn't result in 0 for intermediate terms
     for (p = 0; p < VPD_PV_POINTS; p++)
     {
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].vdd_mv =
-            revle32((i_gppb->operating_points[p].vdd_mv * 1000 +
-                     ((i_gppb->operating_points[p].idd_100ma * 100) * (i_gppb->vdd_sysparm.loadline_uohm +
-                             i_gppb->vdd_sysparm.distloss_uohm)) +
-                     (i_gppb->vdd_sysparm.distoffset_uv)) / 1000) ;
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].vcs_mv =
-            revle32( (i_gppb->operating_points[p].vcs_mv * 1000 +
-                      ((i_gppb->operating_points[p].ics_100ma * 100) * (i_gppb->vcs_sysparm.loadline_uohm +
-                              i_gppb->vcs_sysparm.distloss_uohm)) +
+        o_operating_points[VPD_PT_SET_SYSP][p].vdd_mv =
+            revle32((revle32(i_gppb->operating_points[p].vdd_mv) * 1000 +
+                     (revle32(i_gppb->operating_points[p].idd_100ma) * 100 * revle32(i_gppb->vdd_sysparm.loadline_uohm +
+                             i_gppb->vdd_sysparm.distloss_uohm)) / 1000 +
+                     revle32(i_gppb->vdd_sysparm.distoffset_uv)) / 1000) ;
+        o_operating_points[VPD_PT_SET_SYSP][p].vcs_mv =
+            revle32( (revle32(i_gppb->operating_points[p].vcs_mv) * 1000 +
+                      (revle32(i_gppb->operating_points[p].ics_100ma) * 100 * (i_gppb->vcs_sysparm.loadline_uohm +
+                              i_gppb->vcs_sysparm.distloss_uohm) / 1000) +
                       (i_gppb->vcs_sysparm.distoffset_uv)) / 1000) ;
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].idd_100ma = revle32(i_gppb->operating_points[p].idd_100ma);
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].ics_100ma = revle32(i_gppb->operating_points[p].ics_100ma);
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].frequency_mhz = revle32(i_gppb->operating_points[p].frequency_mhz);
-        o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].pstate = i_gppb->operating_points[p].pstate;
+        o_operating_points[VPD_PT_SET_SYSP][p].idd_100ma = (i_gppb->operating_points[p].idd_100ma);
+        o_operating_points[VPD_PT_SET_SYSP][p].ics_100ma = (i_gppb->operating_points[p].ics_100ma);
+        o_operating_points[VPD_PT_SET_SYSP][p].frequency_mhz = (i_gppb->operating_points[p].frequency_mhz);
+        o_operating_points[VPD_PT_SET_SYSP][p].pstate = i_gppb->operating_points[p].pstate;
 
-        FAPI_INF(" sys o_operating_points[%d][pv_op_order[%d]].pstate %u",
+        FAPI_INF(" sys o_operating_points[%d][[%d]].pstate %u",
                  VPD_PT_SET_SYSP, p,
-                 o_operating_points[VPD_PT_SET_SYSP][pv_op_order[p]].pstate);
+                 o_operating_points[VPD_PT_SET_SYSP][p].pstate);
+
+        FAPI_INF("SP:PS=%x,Vdd=%x", revle32(o_operating_points[VPD_PT_SET_SYSP][p].vdd_mv),
+                 revle32( o_operating_points[VPD_PT_SET_SYSP][p].frequency_mhz));
     }
 
     //BIASED POINTS
     for (p = 0; p < VPD_PV_POINTS; p++)
     {
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].vdd_mv = ((revle32(i_gppb->operating_points[p].vdd_mv) *
-                (200 + i_gppb->ext_biases[p].vdd_ext_hp)) / 200);
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].vcs_mv = ((revle32(i_gppb->operating_points[p].vcs_mv) *
-                (200 + i_gppb->ext_biases[p].vcs_ext_hp)) / 200);
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].idd_100ma = revle32(i_gppb->operating_points[p].idd_100ma);
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].ics_100ma = revle32(i_gppb->operating_points[p].ics_100ma);
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].frequency_mhz = ((revle32(
-                    i_gppb->operating_points[p].frequency_mhz) *
-                (200 + i_gppb->ext_biases[p].frequency_hp)) / 200);
+        o_operating_points[VPD_PT_SET_BIASED][p].vdd_mv = revle32((revle32(i_gppb->operating_points[p].vdd_mv) *
+                (200 + revle32(i_gppb->ext_biases[p].vdd_ext_hp))) / 200);
+        o_operating_points[VPD_PT_SET_BIASED][p].vcs_mv = revle32((revle32(i_gppb->operating_points[p].vcs_mv) *
+                (200 + revle32(i_gppb->ext_biases[p].vcs_ext_hp))) / 200);
+        o_operating_points[VPD_PT_SET_BIASED][p].idd_100ma = (i_gppb->operating_points[p].idd_100ma);
+        o_operating_points[VPD_PT_SET_BIASED][p].ics_100ma = (i_gppb->operating_points[p].ics_100ma);
+        o_operating_points[VPD_PT_SET_BIASED][p].frequency_mhz = revle32(((
+                    revle32( i_gppb->operating_points[p].frequency_mhz)) *
+                (200 + revle32(i_gppb->ext_biases[p].frequency_hp))) / 200);
+
+        FAPI_INF("Bi:PS=%x,Vdd=%x", revle32(o_operating_points[VPD_PT_SET_BIASED][p].vdd_mv),
+                 revle32(o_operating_points[VPD_PT_SET_BIASED][p].frequency_mhz));
     }
 
     for (p = 0; p < VPD_PV_POINTS; p++)
     {
-        o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].pstate =
-            (((o_operating_points[VPD_PT_SET_BIASED][ULTRA].frequency_mhz -
-               o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].frequency_mhz) * 1000) /
+        o_operating_points[VPD_PT_SET_BIASED][p].pstate =
+            (((revle32(o_operating_points[VPD_PT_SET_BIASED][ULTRA].frequency_mhz) -
+               revle32(o_operating_points[VPD_PT_SET_BIASED][p].frequency_mhz)) * 1000) /
              revle32(i_gppb->frequency_step_khz));
-
+        FAPI_INF("Bi:Pstate %x  %x %x %x", (o_operating_points[VPD_PT_SET_BIASED][p].pstate),
+                 revle32(o_operating_points[VPD_PT_SET_BIASED][ULTRA].frequency_mhz),
+                 revle32(o_operating_points[VPD_PT_SET_BIASED][p].frequency_mhz),
+                 revle32(i_gppb->frequency_step_khz));
     }
 
     //BIASED POINTS and SYSTEM PARMS APPLIED POINTS
@@ -1652,24 +1699,27 @@ void p9_pstate_compute_vpd_pts(VpdOperatingPoint (*o_operating_points)[VPD_PV_PO
     //that integer division doesn't result in 0 for intermediate terms
     for (p = 0; p < VPD_PV_POINTS; p++)
     {
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].vdd_mv =
-            (((o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].vdd_mv * 1000) +
-              ((o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].idd_100ma * 100) *
-               revle32((i_gppb->vdd_sysparm.loadline_uohm + i_gppb->vdd_sysparm.distloss_uohm))) +
-              revle32((i_gppb->vdd_sysparm.distoffset_uv))) / 1000 );
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].vcs_mv =
-            (((o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].vcs_mv * 1000) +
-              ((o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].ics_100ma * 100) *
-               revle32((i_gppb->vcs_sysparm.loadline_uohm + i_gppb->vcs_sysparm.distloss_uohm))) +
-              revle32((i_gppb->vcs_sysparm.distoffset_uv))) / 1000 );
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].idd_100ma =
-            (o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].idd_100ma);
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].ics_100ma =
-            (o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].ics_100ma);
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].frequency_mhz =
-            (o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].frequency_mhz);
-        o_operating_points[VPD_PT_SET_BIASED_SYSP][pv_op_order[p]].pstate =
-            o_operating_points[VPD_PT_SET_BIASED][pv_op_order[p]].pstate;
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].vdd_mv =
+            revle32(((revle32(o_operating_points[VPD_PT_SET_BIASED][p].vdd_mv) * 1000) +
+                     ((revle32(o_operating_points[VPD_PT_SET_BIASED][p].idd_100ma) * 100) *
+                      (revle32(i_gppb->vdd_sysparm.loadline_uohm + i_gppb->vdd_sysparm.distloss_uohm))) / 1000 +
+                     (revle32(i_gppb->vdd_sysparm.distoffset_uv))) / 1000 );
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].vcs_mv =
+            revle32(((revle32(o_operating_points[VPD_PT_SET_BIASED][p].vcs_mv) * 1000) +
+                     ((revle32(o_operating_points[VPD_PT_SET_BIASED][p].ics_100ma) * 100) *
+                      (revle32(i_gppb->vcs_sysparm.loadline_uohm + i_gppb->vcs_sysparm.distloss_uohm))) / 1000 +
+                     (revle32(i_gppb->vcs_sysparm.distoffset_uv))) / 1000 );
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].idd_100ma =
+            (o_operating_points[VPD_PT_SET_BIASED][p].idd_100ma);
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].ics_100ma =
+            (o_operating_points[VPD_PT_SET_BIASED][p].ics_100ma);
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].frequency_mhz =
+            (o_operating_points[VPD_PT_SET_BIASED][p].frequency_mhz);
+        o_operating_points[VPD_PT_SET_BIASED_SYSP][p].pstate =
+            o_operating_points[VPD_PT_SET_BIASED][p].pstate;
+
+        FAPI_INF("BS:PS=%x,Vdd=%x", revle32(o_operating_points[VPD_PT_SET_BIASED_SYSP][p].vdd_mv),
+                 revle32(o_operating_points[VPD_PT_SET_BIASED_SYSP][p].frequency_mhz));
 
     }
 }
@@ -1705,93 +1755,98 @@ void p9_pstate_compute_PsV_slopes(VpdOperatingPoint i_operating_points[][4],
         //RAW VPD PTS SLOPES
         //
         //convert to a fixed-point number
-        eVidFP[VPD_PV_POWERSAVE] = i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_NOMINAL] = i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_TURBO] = i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_ULTRA] = i_operating_points[VPD_PT_SET_RAW][VPD_PV_ULTRA].vdd_mv << EVID_SLOPE_FP_SHIFT;
-
-        FAPI_INF("eVidFP[VPD_PV_POWERSAVE] %u %04x", eVidFP[VPD_PV_POWERSAVE],
-                 i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].vdd_mv);
-        FAPI_INF("eVidFP[NOMINAL] %u %04x", eVidFP[VPD_PV_NOMINAL], i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].vdd_mv);
-        FAPI_INF("eVidFP[TURBO] %u %04x", eVidFP[VPD_PV_TURBO], i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].vdd_mv);
-        FAPI_INF("eVidFP[ULTRA] %u %04x", eVidFP[VPD_PV_ULTRA], i_operating_points[VPD_PT_SET_RAW][VPD_PV_ULTRA].vdd_mv);
+        eVidFP[POWERSAVE] = revle32(revle32(i_operating_points[VPD_PT_SET_RAW][POWERSAVE].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[NOMINAL] = revle32(revle32(i_operating_points[VPD_PT_SET_RAW][NOMINAL].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[TURBO] = revle32(revle32(i_operating_points[VPD_PT_SET_RAW][TURBO].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[ULTRA] = revle32(revle32(i_operating_points[VPD_PT_SET_RAW][ULTRA].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+
+        FAPI_INF("eVidFP[POWERSAVE] %x %04x", revle32(eVidFP[POWERSAVE]),
+                 revle32(i_operating_points[VPD_PT_SET_RAW][POWERSAVE].vdd_mv));
+        FAPI_INF("eVidFP[NOMINAL] %x %04x", revle32(eVidFP[NOMINAL]),
+                 revle32(i_operating_points[VPD_PT_SET_RAW][NOMINAL].vdd_mv));
+        FAPI_INF("eVidFP[TURBO] %x %04x", revle32(eVidFP[TURBO]), revle32(i_operating_points[VPD_PT_SET_RAW][TURBO].vdd_mv));
+        FAPI_INF("eVidFP[ULTRA] %x %04x", revle32(eVidFP[ULTRA]), revle32(i_operating_points[VPD_PT_SET_RAW][ULTRA].vdd_mv));
 
         // ULTRA TURBO pstate check is not required..because it's pstate will be
         // 0
-        if (!(i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].pstate) ||
-            !(i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].pstate) ||
-            !(i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].pstate))
+        if (!(i_operating_points[VPD_PT_SET_RAW][POWERSAVE].pstate) ||
+            !(i_operating_points[VPD_PT_SET_RAW][NOMINAL].pstate) ||
+            !(i_operating_points[VPD_PT_SET_RAW][TURBO].pstate))
         {
             FAPI_ERR("PSTATE value shouldn't be zero for VPD_PT_SET_RAW");
             break;
         }
 
         //Calculate slopes
-        tmp = (uint32_t)(eVidFP[VPD_PV_NOMINAL] - eVidFP[VPD_PV_POWERSAVE]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].pstate +
-                         i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] = revle16((uint16_t)tmp);
-        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL])), (tmp));
-
-        tmp = (uint32_t)(eVidFP[VPD_PV_TURBO] - eVidFP[VPD_PV_NOMINAL]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].pstate +
-                         i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] = revle16((uint16_t)tmp);
-        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO])), (tmp));
-
-        tmp = (uint32_t)(eVidFP[VPD_PV_ULTRA] - eVidFP[VPD_PV_TURBO]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_RAW][VPD_PV_ULTRA].pstate +
-                         i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] = revle16((uint16_t)tmp);
-        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA])), (tmp));
+        tmp = revle32((revle32(eVidFP[NOMINAL]) - revle32(eVidFP[POWERSAVE])) /
+                      ((uint32_t)(-i_operating_points[VPD_PT_SET_RAW][NOMINAL].pstate +
+                                  i_operating_points[VPD_PT_SET_RAW][POWERSAVE].pstate)));
+        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] = revle16( revle32(tmp));
+        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] %X tmp %X %X",
+                 revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL]), revle32(tmp));
+
+
+        tmp = revle32((revle32(eVidFP[TURBO]) - revle32(eVidFP[NOMINAL])) /
+                      ((uint32_t)(-i_operating_points[VPD_PT_SET_RAW][TURBO].pstate +
+                                  i_operating_points[VPD_PT_SET_RAW][NOMINAL].pstate)));
+        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] = revle16( revle32(tmp));
+        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] %X tmp %X %X",
+                 revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO]), revle32(tmp));
+
+
+        tmp = revle32((revle32(eVidFP[ULTRA]) - revle32(eVidFP[TURBO])) /
+                      ((uint32_t)(-i_operating_points[VPD_PT_SET_RAW][ULTRA].pstate +
+                                  i_operating_points[VPD_PT_SET_RAW][TURBO].pstate)));
+        o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] = revle16( revle32(tmp));
+        FAPI_INF("PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] %X tmp %X %X",
+                 revle16(o_gppb->PsVSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA]), revle32(tmp));
 
         //Calculate inverted slopes
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].pstate +
-                           i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].vdd_mv -
-                             i_operating_points[VPD_PT_SET_RAW][VPD_PV_POWERSAVE].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] = revle16((uint16_t)tmp);
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_RAW][NOMINAL].pstate +
+                                   i_operating_points[VPD_PT_SET_RAW][POWERSAVE].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_RAW][NOMINAL].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_RAW][POWERSAVE].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] = revle16( revle32(tmp));
         FAPI_INF("VPsSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL] %X tmp %X",
-                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL])), (tmp));
+                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_POWERSAVE_NOMINAL])), revle32(tmp));
+
 
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].pstate +
-                           i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].vdd_mv -
-                             i_operating_points[VPD_PT_SET_RAW][VPD_PV_NOMINAL].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] = revle16((uint16_t)tmp);
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_RAW][TURBO].pstate +
+                                   i_operating_points[VPD_PT_SET_RAW][NOMINAL].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_RAW][TURBO].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_RAW][NOMINAL].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] = revle16( revle32(tmp));
         FAPI_INF("VPsSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO] %X tmp %X",
-                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO])), (tmp));
+                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_NOMINAL_TURBO])), revle32(tmp));
 
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_RAW][VPD_PV_ULTRA].pstate +
-                           i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_RAW][VPD_PV_ULTRA].vdd_mv -
-                             i_operating_points[VPD_PT_SET_RAW][VPD_PV_TURBO].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] = revle16((uint16_t)tmp);
+
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_RAW][ULTRA].pstate +
+                                   i_operating_points[VPD_PT_SET_RAW][TURBO].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_RAW][ULTRA].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_RAW][TURBO].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] = revle16( revle32(tmp));
         FAPI_INF("VPsSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA] %X tmp %X",
-                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA])), (tmp));
+                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_RAW][REGION_TURBO_ULTRA])), revle32(tmp));
 
         //
         //BIASED VPD PTS SLOPES
         //
         //convert to fixed-point number
-        eVidFP[VPD_PV_POWERSAVE] = i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_NOMINAL] = i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_TURBO] = i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].vdd_mv << EVID_SLOPE_FP_SHIFT;
-        eVidFP[VPD_PV_ULTRA] = i_operating_points[VPD_PT_SET_BIASED][VPD_PV_ULTRA].vdd_mv << EVID_SLOPE_FP_SHIFT;
+        eVidFP[POWERSAVE] = revle32(revle32(i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[NOMINAL] = revle32(revle32(i_operating_points[VPD_PT_SET_BIASED][NOMINAL].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[TURBO] = revle32(revle32(i_operating_points[VPD_PT_SET_BIASED][TURBO].vdd_mv) << EVID_SLOPE_FP_SHIFT);
+        eVidFP[ULTRA] = revle32(revle32(i_operating_points[VPD_PT_SET_BIASED][ULTRA].vdd_mv) << EVID_SLOPE_FP_SHIFT);
 
-        FAPI_INF("eVidFP[VPD_PV_POWERSAVE] Biased %u", eVidFP[VPD_PV_POWERSAVE]);
-        FAPI_INF("eVidFP[NOMINAL] Biased %u", eVidFP[VPD_PV_NOMINAL]);
-        FAPI_INF("eVidFP[TURBO] Biased %u", eVidFP[VPD_PV_TURBO]);
-        FAPI_INF("eVidFP[ULTRA] Biased %u", eVidFP[VPD_PV_ULTRA]);
+        FAPI_INF("eVidFP[POWERSAVE] Biased %x", revle32(eVidFP[POWERSAVE]));
+        FAPI_INF("eVidFP[NOMINAL] Biased %x", revle32(eVidFP[NOMINAL]));
+        FAPI_INF("eVidFP[TURBO] Biased %x", revle32(eVidFP[TURBO]));
+        FAPI_INF("eVidFP[ULTRA] Biased %x", revle32(eVidFP[ULTRA]));
 
         // ULTRA TURBO pstate check is not required..because it's pstate will be
         // 0
-        if (!(i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].pstate) ||
-            !(i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate) ||
-            !(i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].pstate))
+        if (!(i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].pstate) ||
+            !(i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate) ||
+            !(i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate))
         {
             FAPI_ERR("PSTATE value shouldn't be zero for VPD_PT_SET_BIASED");
             break;
@@ -1799,56 +1854,70 @@ void p9_pstate_compute_PsV_slopes(VpdOperatingPoint i_operating_points[][4],
 
         //Calculate slopes
         FAPI_INF(" num %u denom %u %u %u",
-                 (uint32_t)(eVidFP[VPD_PV_NOMINAL] - eVidFP[VPD_PV_POWERSAVE]),
-                 (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate +
-                            i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].pstate),
-                 (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate),
-                 (uint32_t)i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].pstate);
-        tmp = (uint32_t)(eVidFP[VPD_PV_NOMINAL] - eVidFP[VPD_PV_POWERSAVE]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate +
-                         i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] = revle16((uint16_t)tmp);
+                 (uint32_t)(eVidFP[NOMINAL] - eVidFP[POWERSAVE]),
+                 (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate +
+                            i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].pstate),
+                 (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate),
+                 (uint32_t)i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].pstate);
+
+
+        tmp = revle32((uint32_t)(revle32(eVidFP[NOMINAL]) - revle32(eVidFP[POWERSAVE])) /
+                      (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate +
+                                 i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].pstate));
+        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] = revle16(revle32(tmp));
         FAPI_INF("PsVSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL])), (tmp));
+                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL])), revle32(tmp));
+
 
-        tmp = (uint32_t)(eVidFP[VPD_PV_TURBO] - eVidFP[VPD_PV_NOMINAL]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].pstate +
-                         i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] = revle16((uint16_t)tmp);
+        tmp = revle32((uint32_t)(revle32(eVidFP[TURBO]) - revle32(eVidFP[NOMINAL])) /
+                      (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate +
+                                 i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate));
+        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] = revle16(revle32(tmp));
         FAPI_INF("PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO])), (tmp));
+                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO])), revle32(tmp));
 
-        tmp = (uint32_t)(eVidFP[VPD_PV_ULTRA] - eVidFP[VPD_PV_TURBO]) /
-              (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_ULTRA].pstate +
-                         i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].pstate);
-        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] = revle16((uint16_t)tmp);
+        tmp = revle32((uint32_t)(revle32(eVidFP[TURBO]) - revle32(eVidFP[NOMINAL])) /
+                      (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate +
+                                 i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate));
+        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] = revle16(revle32(tmp));
+        FAPI_INF("PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] %X tmp %X",
+                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO])), revle32(tmp));
+
+
+        tmp = revle32((uint32_t)(revle32(eVidFP[ULTRA]) - revle32(eVidFP[TURBO])) /
+                      (uint32_t)(-i_operating_points[VPD_PT_SET_BIASED][ULTRA].pstate +
+                                 i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate));
+        o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] = revle16(revle32(tmp));
         FAPI_INF("PsVSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] %X tmp %X",
-                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA])), (tmp));
+                 (revle16(o_gppb->PsVSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA])), revle32(tmp));
+
 
         //Calculate inverted slopes
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate +
-                           i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].vdd_mv -
-                             i_operating_points[VPD_PT_SET_BIASED][VPD_PV_POWERSAVE].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] = revle16((uint16_t)tmp);
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate +
+                                   i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_BIASED][NOMINAL].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_BIASED][POWERSAVE].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] = revle16(revle32(tmp));
         FAPI_INF ("VPsSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL] %X tmp %X",
-                  (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL])), (tmp));
-
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].pstate +
-                           i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].vdd_mv -
-                             i_operating_points[VPD_PT_SET_BIASED][VPD_PV_NOMINAL].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] = revle16((uint16_t)tmp);
-        FAPI_INF("VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] %X tmp %X",
-                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO])), (tmp));
-
-        tmp =  (uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][VPD_PV_ULTRA].pstate +
-                           i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].pstate) << EVID_SLOPE_FP_SHIFT)
-               / (uint32_t) (i_operating_points[VPD_PT_SET_BIASED][VPD_PV_ULTRA].vdd_mv -
-                             i_operating_points[VPD_PT_SET_BIASED][VPD_PV_TURBO].vdd_mv);
-        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] = revle16((uint16_t)tmp);
-        FAPI_INF("VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] %X tmp %X",
-                 (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA])), (tmp));
+                  (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_POWERSAVE_NOMINAL])), revle32(tmp));
+
+
+
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate +
+                                   i_operating_points[VPD_PT_SET_BIASED][NOMINAL].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_BIASED][TURBO].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_BIASED][NOMINAL].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] = revle16(revle32(tmp));
+        FAPI_INF ("VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO] %X tmp %X",
+                  (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_NOMINAL_TURBO])), revle32(tmp));
+
+        tmp =  revle32((uint32_t)((-i_operating_points[VPD_PT_SET_BIASED][ULTRA].pstate +
+                                   i_operating_points[VPD_PT_SET_BIASED][TURBO].pstate) << EVID_SLOPE_FP_SHIFT)
+                       / (uint32_t) (revle32(i_operating_points[VPD_PT_SET_BIASED][ULTRA].vdd_mv) -
+                                     revle32(i_operating_points[VPD_PT_SET_BIASED][TURBO].vdd_mv)));
+        o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] = revle16(revle32(tmp));
+        FAPI_INF ("VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA] %X tmp %X",
+                  (revle16(o_gppb->VPsSlopes[VPD_SLOPES_BIASED][REGION_TURBO_ULTRA])), revle32(tmp));
     }
     while(0);
 }
@@ -2534,9 +2603,9 @@ void p9_pstate_update_vfrt(uint8_t* i_pBuffer,
         l_type = (o_vfrt_data->vfrtHeader.type_version) >> 4;
 
         //Initialize VFRT data part
-        for (l_index_0 = 0; l_index_0 < VFRT_VRATIO_SIZE; ++l_index_0)
+        for (l_index_0 = 0; l_index_0 < VFRT_FRATIO_SIZE; ++l_index_0)
         {
-            for (l_index_1 = 0; l_index_1 < VFRT_FRATIO_SIZE; ++l_index_1)
+            for (l_index_1 = 0; l_index_1 < VFRT_VRATIO_SIZE; ++l_index_1)
             {
                 l_freq = (l_type) ? HOMER_VERSION_FREQUENCY(*i_pBuffer, i_reference_freq) : SYSTEM_VERSION_FRQUENCY(*i_pBuffer);
                 o_vfrt_data->vfrt_data[l_index_0][l_index_1] = HOMER_VFRT_VALUE(l_freq, i_reference_freq);
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
index 005c95260..c01086c5b 100644
--- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
+++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml
@@ -43,7 +43,7 @@
 
       Provided by the Machine Readable Workbook after system characterization.
     </description>
-    <valueType>uint8</valueType>
+    <valueType>uint32</valueType>
     <platInit/>
   </attribute>
   <!-- ********************************************************************* -->
@@ -64,7 +64,90 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_START_NS</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Delay (binary in nanoseconds) from the time the VRM receives the write
+    voltage command until the voltage actually moves.   This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 8000ns (eg 8us)) if this attribute is
+    zero.  Note: the smallest possible delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    increasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero.  Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    decreasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero. Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    Time (binary in nanoseconds) to allow the voltage rail to stabilize before
+    considering the transition to be fully complete.  This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 5000ns (5us) if this attribute is zero.
+    Note: the smallest delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <valueType>uint32</valueType>
+    <initToZero/>
+    <platInit/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
     <id>ATTR_AVSBUS_FREQUENCY</id>
+
     <targetType>TARGET_TYPE_SYSTEM</targetType>
     <!-- <<<<<<< PROC_CHIP POSSIBLE -->
     <description>
@@ -834,6 +917,52 @@
   </attribute>
   <!-- ********************************************************************* -->
   <attribute>
+    <id>ATTR_WOF_ENABLE_FRATIO</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled, defines the Frequency Ratio calculation performed.
+    (THIS IS NOT SUPPORTED IN P9 GA1!).
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FIXED=0, STEPPED=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_WOF_ENABLE_VRATIO</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled, defines the Voltage Ratio calculation performed.
+    THIS IS NOT SUPPORTED AT PRESENT. GA1 SUPPORT IS TBD).
+    </description>
+    <valueType>uint8</valueType>
+    <enum>FIXED=0, STEPPED=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+  <!-- ********************************************************************* -->
+  <attribute>
+    <id>ATTR_WOF_VRATIO_SELECT</id>
+    <targetType>TARGET_TYPE_SYSTEM</targetType>
+    <description>
+    If wof_enabled AND ATTR_WOF_ENABLE_VRATIO = CALCULATED, this attribute
+    selects the Vratio calculation type.
+    ACTIVE_CORES: Vratio is the number of active cores to the
+    number of good cores
+    FULL: Vratio is Vaverage to Vclip(Fclip) where Vclip(Fclip) is
+    the normal interpolated regulator voltage (including load line uplife @ RDP
+    current) derated with presently measured Idd current (from the AVSBus) and
+    the loadline.
+
+    </description>
+    <valueType>uint8</valueType>
+    <enum>ACTIVE_CORES=0, FULL=1</enum>
+    <platInit/>
+    <initToZero/>
+  </attribute>
+
+  <attribute>
     <id>ATTR_PBAX_GROUPID</id>
     <targetType>TARGET_TYPE_PROC_CHIP</targetType>
     <description>
diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
index 2c157a87b..1fb25fb81 100644
--- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
+++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml
@@ -181,7 +181,53 @@
         <id>ATTR_CME_CHTM_TRACE_MEMORY_CONFIG</id>
         <default>0x00</default>
     </attribute>
+    <attribute>
+        <id>ATTR_EXTERNAL_VRM_STEPSIZE</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_START_NS</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id>
+        <default>0x00</default>
+    </attribute>
+    <attribute>
+        <id>ATTR_VDM_ENABLE</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_SYSTEM_WOF_ENABLED</id>
+        <default>0x00</default>
+    </attribute>
+
+    <attribute>
+        <id>ATTR_WOF_ENABLE_FRATIO</id>
+        <default>0x00</default>
+    </attribute>
+    <attribute>
+        <id>ATTR_WOF_ENABLE_VRATIO</id>
+        <default>0x00</default>
+    </attribute>
 
+    <attribute>
+        <id>ATTR_WOF_VRATIO_SELECT</id>
+        <default>0x00</default>
+    </attribute>
 
 <!-- =====================================================================
      End of temporary definitions
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index 990c02991..17fb66c2d 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -2468,6 +2468,26 @@
 </attribute>
 
 <attribute>
+    <id>FABRIC_NODE_ID</id>
+    <description>
+        DEPRECATED!!!!
+        Chip attribute.
+        Logical fabric node the chip belongs to.
+        Provided by the Machine Readable Workbook.
+        Can vary across drawers.
+    </description>
+    <simpleType><uint8_t>
+        <default>0</default>
+    </uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FABRIC_NODE_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
     <id>FABRIC_GROUP_ID</id>
     <description>
         Chip attribute.
@@ -5526,7 +5546,7 @@ Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang
       Provided by the Machine Readable Workbook after system characterization.
     </description>
     <simpleType>
-        <uint8_t></uint8_t>
+        <uint32_t></uint32_t>
     </simpleType>
     <persistency>non-volatile</persistency>
     <readable/>
@@ -5535,6 +5555,109 @@ Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang
         <macro>DIRECT</macro>
     </hwpfToHbAttrMap>
 </attribute>
+<attribute>
+    <id>EXTERNAL_VRM_TRANSITION_START_NS</id>
+    <description>
+    Delay (binary in nanoseconds) from the time the VRM receives the write
+    voltage command until the voltage actually moves.   This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 8000ns (eg 8us)) if this attribute is
+    zero.  Note: the smallest possible delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_START_NS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+
+<attribute>
+    <id>EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    increasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero.  Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id>
+    <description>
+    Transition rate (binary in microVolts per microsecond) of the VRM for an
+    decreasing voltage transition.   This is used as part of the overall voltage
+    transition time calculation
+    Firmware provides a default value of 10000 uV/us (eg 10mV/us) if this
+    attribute is zero. Note: the fastest possible rate is limited to 1uV/us.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id>
+    <description>
+    Time (binary in nanoseconds) to allow the voltage rail to stabilize before
+    considering the transition to be fully complete.  This value is used for
+    both increasing and decreasing transitions as part of the overall voltage
+    transition time calculation.
+    Firmware provides a default value of 5000ns (5us) if this attribute is zero.
+    Note: the smallest delay is limited to 1ns.
+
+    Consumer: p9_pstate_parameter_block ->
+                        Pstate Parameter Block (PSPB) for PGPE
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
 
 <attribute>
     <id>EXTERNAL_VRM_STEPDELAY</id>
@@ -20147,6 +20270,130 @@ Measured in GB</description>
     </enumerator>
 </enumerationType>
 
+<attribute>
+    <id>WOF_ENABLE_FRATIO</id>
+    <description>
+    If wof_enabled, defines the Frequency Ratio calculation performed.
+    (THIS IS NOT SUPPORTED IN P9 GA1!).
+
+    Producer: MRWB
+
+    Consumers: p9_hcode_image_build.C
+
+    </description>
+    <simpleType>
+      <uint8_t>
+        <default>FIXED</default>
+      </uint8_t>
+    </simpleType>
+    <hwpfToHbAttrMap>
+        <id>ATTR_WOF_ENABLE_FRATIO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<enumerationType>
+    <id>WOF_ENABLE_FRATIO</id>
+    <description>Enumeration for Work Load Optimized Frequency ratio</description>
+    <enumerator>
+        <name>FIXED</name>
+        <value>0x00</value>
+    </enumerator>
+    <enumerator>
+        <name>STEPPED</name>
+        <value>0x01</value>
+    </enumerator>
+</enumerationType>
+
+
+<attribute>
+    <id>WOF_ENABLE_VRATIO</id>
+    <description>
+    If wof_enabled, defines the Voltage Ratio calculation performed.
+    THIS IS NOT SUPPORTED AT PRESENT. GA1 SUPPORT IS TBD).
+
+    Producer: MRWB
+
+    Consumers: p9_hcode_image_build.C
+
+    </description>
+    <simpleType>
+      <uint8_t>
+        <default>FIXED</default>
+      </uint8_t>
+    </simpleType>
+    <hwpfToHbAttrMap>
+        <id>ATTR_WOF_ENABLE_VRATIO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<enumerationType>
+    <id>WOF_ENABLE_VRATIO</id>
+    <description>Enumeration for Work Load Optimized Frequency ratio</description>
+    <enumerator>
+        <name>FIXED</name>
+        <value>0x00</value>
+    </enumerator>
+    <enumerator>
+        <name>STEPPED</name>
+        <value>0x01</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>WOF_VRATIO_SELECT</id>
+    <description>
+    If wof_enabled AND ATTR_WOF_ENABLE_VRATIO = CALCULATED, this attribute
+    selects the Vratio calculation type.
+    ACTIVE_CORES: Vratio is the number of active cores to the
+    number of good cores
+    FULL: Vratio is Vaverage to Vclip(Fclip) where Vclip(Fclip) is
+    the normal interpolated regulator voltage (including load line uplife @ RDP
+    current) derated with presently measured Idd current (from the AVSBus) and
+    the loadline.
+
+
+    Producer: MRWB
+
+    Consumers: p9_hcode_image_build.C
+
+    </description>
+    <simpleType>
+      <uint8_t>
+        <default>ACTIVE_CORES</default>
+      </uint8_t>
+    </simpleType>
+    <hwpfToHbAttrMap>
+        <id>ATTR_WOF_VRATIO_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<enumerationType>
+    <id>WOF_VRATIO_SELECT</id>
+    <description>Enumeration for Work Load Optimized Frequency ratio</description>
+    <enumerator>
+        <name>ACTIVE_CORES</name>
+        <value>0x00</value>
+    </enumerator>
+    <enumerator>
+        <name>FULL</name>
+        <value>0x01</value>
+    </enumerator>
+</enumerationType>
+
+
+
 <enumerationType>
     <id>WOF_POWER_LIMIT</id>
     <description>Enumeration to select WOF Power Limit</description>
@@ -20174,10 +20421,6 @@ Measured in GB</description>
         <default>0</default>
       </uint8_t>
     </simpleType>
-    <hwpfToHbAttrMap>
-        <id>ATTR_WOF_POWER_LIMIT</id>
-        <macro>DIRECT</macro>
-    </hwpfToHbAttrMap>
     <persistency>non-volatile</persistency>
     <readable/>
     <writeable/>
@@ -20216,9 +20459,7 @@ Measured in GB</description>
      -->
      </description>
     <simpleType>
-        <uint8_t>
-          <default>0</default>
-        </uint8_t>
+        <uint8_t></uint8_t>
     </simpleType>
     <persistency>non-volatile</persistency>
     <readable/>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 0f6a6e5c9..7c41b78d7 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -130,6 +130,7 @@
         <id>FSI_GP_REG_SCOM_ACCESS</id>
         <default>1</default>
     </attribute>
+    <attribute><id>FABRIC_NODE_ID</id></attribute><!-- DEPRECATED -->
     <attribute><id>FABRIC_GROUP_ID</id></attribute>
     <attribute><id>PROC_EFF_FABRIC_GROUP_ID</id></attribute>
     <attribute><id>FABRIC_CHIP_ID</id></attribute>
@@ -647,6 +648,10 @@
     <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id></attribute>
     <attribute><id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id></attribute>
     <attribute><id>MSS_MRW_THERMAL_MEMORY_POWER_LIMIT</id></attribute>
+    <attribute><id>EXTERNAL_VRM_TRANSITION_START_NS</id></attribute>
+    <attribute><id>EXTERNAL_VRM_TRANSITION_RATE_INC_UV_PER_US</id></attribute>
+    <attribute><id>EXTERNAL_VRM_TRANSITION_RATE_DEC_UV_PER_US</id></attribute>
+    <attribute><id>EXTERNAL_VRM_TRANSITION_STABILIZATION_TIME_NS</id></attribute>
     <attribute><id>EXTERNAL_VRM_STEPSIZE</id></attribute>
     <attribute><id>EXTERNAL_VRM_STEPDELAY</id></attribute>
     <attribute><id>PM_SPIVID_FREQUENCY</id></attribute>
@@ -896,6 +901,9 @@
     <attribute><id>DPLL_VDM_RESPONSE</id></attribute>
     <attribute><id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id></attribute>
     <attribute><id>SYSTEM_WOF_ENABLED</id></attribute>
+    <attribute><id>WOF_VRATIO_SELECT</id></attribute>
+    <attribute><id>WOF_ENABLE_VRATIO</id></attribute>
+    <attribute><id>WOF_ENABLE_FRATIO</id></attribute>
     <attribute><id>WOF_POWER_LIMIT</id></attribute>
     <attribute><id>SYS_VFRT_STATIC_DATA_ENABLE</id></attribute>
     <attribute><id>WOF_TABLE_LID_NUMBER</id></attribute>