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author | Sudheendra K Srivathsa <sudheendraks@in.ibm.com> | 2016-02-12 01:42:35 -0500 |
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committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-04-25 10:14:38 -0400 |
commit | 372b25bed366f1284e38a548614265bdcd60d092 (patch) | |
tree | 029cd39f5cf018a657e71fa765c722873e0f1409 /src | |
parent | 2fdfa6778b4947d5da2e8096fe8b004dd302d6d7 (diff) | |
download | talos-hostboot-372b25bed366f1284e38a548614265bdcd60d092.tar.gz talos-hostboot-372b25bed366f1284e38a548614265bdcd60d092.zip |
p9_setup_evid L2 commit
Change-Id: I923c0d7da9e825dbbb4a111648fc3457da22d572
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/20613
Tested-by: Jenkins Server
Tested-by: PPE CI
Tested-by: Hostboot CI
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/22272
Tested-by: FSP CI Jenkins
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r-- | src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml | 33 | ||||
-rw-r--r-- | src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml | 6 |
2 files changed, 39 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml index 852f72c26..0d94a0791 100644 --- a/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml +++ b/src/import/chips/p9/procedures/xml/attribute_info/pm_plat_attributes.xml @@ -119,6 +119,22 @@ </attribute> <!-- ********************************************************************* --> <attribute> + <id>ATTR_VCS_AVSBUS_BUSNUM</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Defines the AVSBus (0 or 1) which has the chip VCS rail VRM + + Producer: Machine Readable Workbook + Consumers: p9_set_evid; + p9_set_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <valueType>uint8</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> + <attribute> <id>ATTR_VDD_AVSBUS_RAIL</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> <description> @@ -152,6 +168,23 @@ <platInit/> </attribute> <!-- ********************************************************************* --> + <attribute> + <id>ATTR_VCS_AVSBUS_RAIL</id> + <targetType>TARGET_TYPE_PROC_CHIP</targetType> + <description> + Defines the AVSBus rail selector number (0 - 15) for the VCS VRM on the bus + defined by ATTR_AVSBUS_VDN_BUSNUM. + + Producer: Machine Readable Workbook + Consumers: + p9_set_avsbus_voltage (tool); + p9_build_pstate_datablock -> + Pstate Parameter Block (PSPB) for PGPE + </description> + <valueType>uint8</valueType> + <platInit/> + </attribute> + <!-- ********************************************************************* --> <attribute> <id>ATTR_VCS_I2C_BUSNUM</id> <targetType>TARGET_TYPE_PROC_CHIP</targetType> diff --git a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml index a1b1e9927..9bee6f910 100644 --- a/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml +++ b/src/import/hwpf/fapi2/xml/attribute_info/hb_temp_defaults.xml @@ -63,6 +63,12 @@ <attribute> <id>ATTR_PM_FIRINIT_DONE_ONCE_FLAG</id> </attribute> + <attribute> + <id>ATTR_VCS_AVSBUS_BUSNUM</id> + </attribute> + <attribute> + <id>ATTR_VCS_AVSBUS_RAIL</id> + </attribute> <!-- ===================================================================== End of temporary definitions ================================================================= --> |