summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorcrgeddes <crgeddes@us.ibm.com>2017-06-14 13:22:26 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-07-17 11:45:33 -0400
commit34573c857dd3b2420b80c4b904803a7c767b6ff4 (patch)
tree88b1e248c9d4e6c408fc5ffdd4a972e9d8935386 /src
parent96e89adf0a232f69fd20e72902d850c631131d90 (diff)
downloadtalos-hostboot-34573c857dd3b2420b80c4b904803a7c767b6ff4.tar.gz
talos-hostboot-34573c857dd3b2420b80c4b904803a7c767b6ff4.zip
Add in PSU infrastructure for stashKeyAddr sbe chip op
For mpipl we need to pass an address through the SBE. To do this the SBE is writing functionality that takes in uint8_t key and a uint64_t value and from this chipOp and stores it in the bootloader image (before 12k exception vector but after magic keyword). I also cleaned up some prior naming inconsitencies in this commit RTC: 173362 Change-Id: Id6dc47ed0e34f50f74fc894007dd144b2f7bfe81 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/41844 Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/usr/sbeio/sbe_psudd.H73
-rw-r--r--src/include/usr/sbeio/sbeioif.H12
-rw-r--r--src/usr/sbeio/makefile1
-rw-r--r--src/usr/sbeio/sbe_stashKeyAddr.C85
-rw-r--r--src/usr/sbeio/sbe_systemConfig.C2
5 files changed, 153 insertions, 20 deletions
diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H
index efedebae4..e03aa5552 100644
--- a/src/include/usr/sbeio/sbe_psudd.H
+++ b/src/include/usr/sbeio/sbe_psudd.H
@@ -102,7 +102,8 @@ class SbePsu
{
SBE_PSU_SET_FFDC_ADDRESS = 0x04,
SBE_PSU_GENERIC_MSG_QUIESCE = 0x05,
- SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06
+ SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06,
+ SBE_PSU_MSG_STASH_KEY_ADDR = 0x07,
};
/**
@@ -121,7 +122,7 @@ class SbePsu
* @brief enums for SBE system config control flags
*/
//BYTE 2 & 3, Control Flags
- enum psuSystemConfigControlFlags
+ enum psuCommonControlFlags
{
SBE_REQUIRE_RESPONSE = 0x0100,
SBE_REQUIRE_ACK = 0x0200,
@@ -199,6 +200,26 @@ class SbePsu
* 0x4 - Reg 2 is non-reserved (read or write this reg)
* 0x8 - Reg 3 is non-reserved (read or write this reg)
*/
+ enum psuStashKeyAddrNonReservedMsgs
+ {
+ SBE_STASH_KEY_ADDR_REQ_USED_REGS = 0x07,
+ SBE_STASH_KEY_ADDR_RSP_USED_REGS = 0x01,
+ };
+
+
+ /**
+ * @brief non reserved word enums
+ *
+ * Shows which of the request and response msg registers are
+ * not reserved. Reserved registers do not need to be written
+ * or read.
+ *
+ * This is a 4 bit field:
+ * 0x1 - Reg 0 is non-reserved (read or write this reg)
+ * 0x2 - Reg 1 is non-reserved (read or write this reg)
+ * 0x4 - Reg 2 is non-reserved (read or write this reg)
+ * 0x8 - Reg 3 is non-reserved (read or write this reg)
+ */
enum psuSetFFDCAddrNonReservedMsgs
{
SBE_SET_FFDC_ADDR_REQ_USED_REGS = 0x0F,
@@ -267,14 +288,14 @@ class SbePsu
struct //setSystemConfig
{
- uint16_t cd2_SetSystemConfig_Reserved;
- uint16_t cd2_SetSystemConfig_ControlFlags;
- uint16_t cd2_SetSystemConfig_SeqID;
- uint8_t cd2_SetSystemConfig_CommandClass;
- uint8_t cd2_SetSystemConfig_Command;
- uint64_t cd2_SetSystemConfig_SystemFabricIdMap ;
- uint64_t cd2_SetSystemConfig_MbxReg2reserved;
- uint64_t cd2_SetSystemConfig_MbxReg3reserved;
+ uint16_t cd7_SetSystemConfig_Reserved;
+ uint16_t cd7_SetSystemConfig_ControlFlags;
+ uint16_t cd7_SetSystemConfig_SeqID;
+ uint8_t cd7_SetSystemConfig_CommandClass;
+ uint8_t cd7_SetSystemConfig_Command;
+ uint64_t cd7_SetSystemConfig_SystemFabricIdMap ;
+ uint64_t cd7_SetSystemConfig_MbxReg2reserved;
+ uint64_t cd7_SetSystemConfig_MbxReg3reserved;
} PACKED;
struct //for 'Put Ring from Image' message
@@ -295,14 +316,29 @@ class SbePsu
struct //psuQuiesce
{
- uint16_t cd4_PsuQuiesce_Reserved;
- uint16_t cd4_PsuQuiesce_ControlFlags;
- uint16_t cd4_PsuQuiesce_SeqID;
- uint8_t cd4_PsuQuiesce_CommandClass;
- uint8_t cd4_PsuQuiesce_Command;
- uint64_t cd4_PsuQuiesce_MbxReg1reserved;
- uint64_t cd4_PsuQuiesce_MbxReg2reserved;
- uint64_t cd4_PsuQuiesce_MbxReg3reserved;
+ uint16_t cd7_PsuQuiesce_Reserved;
+ uint16_t cd7_PsuQuiesce_ControlFlags;
+ uint16_t cd7_PsuQuiesce_SeqID;
+ uint8_t cd7_PsuQuiesce_CommandClass;
+ uint8_t cd7_PsuQuiesce_Command;
+ uint64_t cd7_PsuQuiesce_MbxReg1reserved;
+ uint64_t cd7_PsuQuiesce_MbxReg2reserved;
+ uint64_t cd7_PsuQuiesce_MbxReg3reserved;
+ } PACKED;
+
+ struct //stashKeyAddr
+ {
+ uint16_t cd7_stashKeyAddr_MbxReg0Reserved; //Mbx Reg 0
+ uint16_t cd7_stashKeyAddr_ControlFlags; //Mbx Reg 0
+ uint16_t cd7_stashKeyAddr_SeqID; //Mbx Reg 0
+ uint8_t cd7_stashKeyAddr_CommandClass; //Mbx Reg 0
+ uint8_t cd7_stashKeyAddr_Command; //Mbx Reg 0
+ uint32_t cd7_stashKeyAddr_MbxReg1ReservedA; //Mbx Reg 1
+ uint16_t cd7_stashKeyAddr_MbxReg1ReservedB; //Mbx Reg 1
+ uint8_t cd7_stashKeyAddr_MbxReg1ReservedC; //Mbx Reg 1
+ uint8_t cd7_stashKeyAddr_Key; //Mbx Reg 1
+ uint64_t cd7_stashKeyAddr_Value; //Mbx Reg 2
+ uint64_t cd7_stashKeyAddr_MbxReg3Reserved; //Mbx Reg 3
} PACKED;
struct //setFFDCAddress
@@ -318,7 +354,6 @@ class SbePsu
uint64_t cd7_setFFDCAddr_CommAddr; // mbxReg3
} PACKED;
-
psuCommand(uint16_t i_controlFlags, //Mbx Reg 0 input
uint8_t i_commandClass, //Mbx Reg 0 input
uint8_t i_command) : //Mbx Reg 0 input
diff --git a/src/include/usr/sbeio/sbeioif.H b/src/include/usr/sbeio/sbeioif.H
index 15f310261..d34bfbcf2 100644
--- a/src/include/usr/sbeio/sbeioif.H
+++ b/src/include/usr/sbeio/sbeioif.H
@@ -86,6 +86,18 @@ namespace SBEIO
errlHndl_t sendPsuQuiesceSbe(TARGETING::Target * i_target);
/**
+ * @brief Sends a PSU chipOp to quiesce the SBE
+ *
+ * @param[in] i_key The key used to identify what the value is
+ * @param[in] i_value Value that will be passed (likely an address)
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t sendPsuStashKeyAddrRequest(const uint8_t i_key,
+ const uint64_t i_value);
+
+ /**
* @brief Get SCOM via SBE FIFO
*
* @param[in] i_target Target to access
diff --git a/src/usr/sbeio/makefile b/src/usr/sbeio/makefile
index bd42fe8fe..91aac40bd 100644
--- a/src/usr/sbeio/makefile
+++ b/src/usr/sbeio/makefile
@@ -35,6 +35,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc
OBJS += sbe_psudd.o
OBJS += sbe_coreStateControl.o
OBJS += sbe_psuQuiesce.o
+OBJS += sbe_stashKeyAddr.o
OBJS += sbe_continueMpipl.o
OBJS += sbe_systemConfig.o
OBJS += sbe_fifodd.o
diff --git a/src/usr/sbeio/sbe_stashKeyAddr.C b/src/usr/sbeio/sbe_stashKeyAddr.C
new file mode 100644
index 000000000..a6af2ba6a
--- /dev/null
+++ b/src/usr/sbeio/sbe_stashKeyAddr.C
@@ -0,0 +1,85 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/sbeio/sbe_stashKeyAddr.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2012,2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+* @file sbe_stashKeyAddr.C
+* @brief Send command to stash key-value pair in the SBE
+*/
+
+#include <config.h>
+#include <trace/interface.H>
+#include <errl/errlmanager.H>
+#include <sbeio/sbeioif.H>
+#include <sbeio/sbe_psudd.H>
+
+extern trace_desc_t* g_trac_sbeio;
+
+#define SBE_TRACD(printf_string,args...) \
+TRACDCOMP(g_trac_sbeio,"psuStashKeyAddr: " printf_string,##args)
+
+#define SBE_TRACF(printf_string,args...) \
+TRACFCOMP(g_trac_sbeio,"psuStashKeyAddr: " printf_string,##args)
+
+namespace SBEIO
+{
+
+ /**
+ * @brief Sends a PSU chipOp to stash a key-address pair in the SBE
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t sendPsuStashKeyAddrRequest(const uint8_t i_key,
+ const uint64_t i_value,
+ TARGETING::Target * i_procChip)
+ {
+ errlHndl_t errl = NULL;
+
+ SBE_TRACD(ENTER_MRK "sending psu stashKeyAddr request from HB to SBE on proc %d",
+ i_procChip->getAttr<TARGETING::ATTR_POSITION>());
+
+ // set up PSU command message
+ SbePsu::psuCommand l_psuCommand(
+ SbePsu::SBE_REQUIRE_RESPONSE |
+ SbePsu::SBE_REQUIRE_ACK, //control flags
+ SbePsu::SBE_PSU_GENERIC_MESSAGE, //command class
+ SbePsu::SBE_PSU_MSG_STASH_KEY_ADDR); //command
+ SbePsu::psuResponse l_psuResponse;
+
+ l_psuCommand.cd7_stashKeyAddr_Key = i_key;
+ l_psuCommand.cd7_stashKeyAddr_Value = i_value;
+
+ errl = SBEIO::SbePsu::getTheInstance().performPsuChipOp(i_procChip,
+ &l_psuCommand,
+ &l_psuResponse,
+ SbePsu::MAX_PSU_SHORT_TIMEOUT_NS,
+ SbePsu::SBE_STASH_KEY_ADDR_REQ_USED_REGS,
+ SbePsu::SBE_STASH_KEY_ADDR_RSP_USED_REGS);
+
+ SBE_TRACD(EXIT_MRK "stashKeyAddr");
+
+ return errl;
+ };
+
+} //end namespace SBEIO
diff --git a/src/usr/sbeio/sbe_systemConfig.C b/src/usr/sbeio/sbe_systemConfig.C
index 4f84460b9..1b0409b2b 100644
--- a/src/usr/sbeio/sbe_systemConfig.C
+++ b/src/usr/sbeio/sbe_systemConfig.C
@@ -75,7 +75,7 @@ namespace SBEIO
SbePsu::psuResponse l_psuResponse;
// set up PSU command message
- l_psuCommand.cd2_SetSystemConfig_SystemFabricIdMap = i_systemConfig;
+ l_psuCommand.cd7_SetSystemConfig_SystemFabricIdMap = i_systemConfig;
errl = SBEIO::SbePsu::getTheInstance().performPsuChipOp(i_procChip,
&l_psuCommand,
OpenPOWER on IntegriCloud