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| author | Prem Shanker Jha <premjha2@in.ibm.com> | 2018-01-24 05:25:08 -0600 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-01-26 11:41:09 -0500 |
| commit | 8c89a1b7b92dd037063f0a9697433b20eec97b23 (patch) | |
| tree | 58bb45414fcdc32a5f4e1e662fac41d9d00ef875 /src | |
| parent | 4db7aa5d3c6b817bf742b80cd922b7dc1858f8b2 (diff) | |
| download | talos-hostboot-8c89a1b7b92dd037063f0a9697433b20eec97b23.tar.gz talos-hostboot-8c89a1b7b92dd037063f0a9697433b20eec97b23.zip | |
PM : Changed FFDC collection to XIR mode.
On a secure system, it is not possible to access SPRs of
PPE engines as it involves RAMMING. So, commit changes PPE
state collection to XIR mode which doesn't need RAMMING.
CQ: SW415110
Change-Id: I9eedcc5af11a55e72840053c6f666a784dda52e2
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52520
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RANGANATHPRASAD G. BRAHMASAMUDRA <prasadbgr@in.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52528
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
3 files changed, 6 insertions, 6 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C index 80fd89287..56349e46d 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_core.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -141,7 +141,7 @@ fapi2::ReturnCode collectCoreTimeoutFailInfo( const fapi2::Target < fapi2::TARGE set_PROC_CHIP_TARGET( i_processing_info.procTgt ). set_CME_BASE_ADDRESS( l_cmeBaseAddress ). set_SGPE_BASE_ADDRESS( l_sgpeBaseAddress ). - set_CME_STATE_MODE( SNAPSHOT ). + set_CME_STATE_MODE( XIRS ). set_SGPE_STATE_MODE( XIRS ), "Timed Out In Setting Core Special Wakeup"); fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C index b0d200455..72683fd16 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_eq.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -147,7 +147,7 @@ fapi2::ReturnCode collectEqTimeoutFailInfo( const fapi2::Target < fapi2::TARGET_ set_NUM_FUNC_EX( l_ex_vector.size() ). set_PROC_CHIP_TARGET( i_processing_info.procTgt ). set_PPE_BASE_ADDRESS_LIST( l_ppeBaseAddressList ). - set_PPE_STATE_MODE( SNAPSHOT ), + set_PPE_STATE_MODE( XIRS ), "Timed Out In Setting The EQ Special Wakeup" ); fapi_try_exit: diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C index e7fc24617..768c28c3c 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup_ex.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -177,7 +177,7 @@ fapi2::ReturnCode collectExTimeoutFailInfo( const fapi2::Target < fapi2::TARGET_ set_PROC_CHIP_TARGET( i_processing_info.procTgt ). set_CME_BASE_ADDRESS( l_cmeBaseAddress ). set_SGPE_BASE_ADDRESS( l_sgpeBaseAddress ). - set_CME_STATE_MODE( SNAPSHOT ). + set_CME_STATE_MODE( XIRS ). set_SGPE_STATE_MODE( XIRS ), "Timed Out In Setting The EX Special Wakeup" ); |
