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authorStephen Glancy <sglancy@us.ibm.com>2017-04-19 10:23:57 -0500
committerDaniel M. Crowell <dcrowell@us.ibm.com>2017-05-07 22:09:35 -0400
commitd0c2ed576770ca6ac8ea77bee118fecc72614451 (patch)
treea03831688e1e58048886a235ce5cf08fca0fc0bb /src
parent2beb5810ed764391d2e085e78884c1d2d6b67f1d (diff)
downloadtalos-hostboot-d0c2ed576770ca6ac8ea77bee118fecc72614451.tar.gz
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Fixes RD VREF runtime calculation
Change-Id: Ie24cb609dfea8ed53406b7c231129ccb40b8ddc1 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39773 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Louis Stermole <stermole@us.ibm.com> Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39808 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/cal_timers.H5
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C3
-rw-r--r--src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H4
3 files changed, 8 insertions, 4 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/cal_timers.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/cal_timers.H
index e7bb30248..c1a465fc9 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/cal_timers.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/cal_timers.H
@@ -215,7 +215,8 @@ inline fapi2::ReturnCode cal_timer_setup(const fapi2::Target<T>& i_target,
l_total_cycles += i_cal_steps_enabled.getBit<WRITE_CTR>() ? l_write_cntr_cycles : 0;
l_total_cycles += i_cal_steps_enabled.getBit<COARSE_WR>() ? coarse_wr_cycles(i_target) : 0;
l_total_cycles += i_cal_steps_enabled.getBit<COARSE_RD>() ? coarse_rd_cycles(i_target) : 0;
- l_total_cycles += i_cal_steps_enabled.getBit<READ_CTR_2D_VREF>() ? rc::vref_guess_time(i_target) : 0;
+ l_total_cycles += ((l_vref_cal_enable != 0)
+ && i_cal_steps_enabled.getBit<READ_CTR_2D_VREF>()) ? rc::vref_guess_time(i_target) : 0;
// Now we have to decide if we're going to abort on an error or keep going. If we keep going,
// then we want our initial delay to be the expected time to completion - we don't have much
@@ -251,7 +252,7 @@ inline fapi2::ReturnCode cal_timer_setup(const fapi2::Target<T>& i_target,
// Fudge some for sim irregularities. This will increase time to a complete timeout but won't
// really effect valid training unless these cycles are needed. So this isn't a bad thing ...
// AKA watchdog timer
- i_poll.iv_poll_count *= 10;
+ i_poll.iv_poll_count *= 2;
FAPI_INF("cal abort on error? %s. tc: %luc, id: %luns(%lusc), d: %lu(%lusc), pc: %lu",
(cal_abort_on_error ? "yup" : "nope"), l_total_cycles, i_poll.iv_initial_delay,
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
index c3d3151f5..5ba4e2986 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C
@@ -997,7 +997,8 @@ fapi2::ReturnCode execute_cal_steps_helper( const fapi2::Target<fapi2::TARGET_TY
// If we got a cal timeout, or another CCS error just leave now. If we got success, check the error
// bits for a cal failure. We'll return the proper ReturnCode so all we need to do is FAPI_TRY.
- FAPI_TRY( mss::ccs::execute(l_mcbist, l_program, i_target) );
+ FAPI_TRY( mss::ccs::execute(l_mcbist, l_program, i_target), "%s failed to execute CCS program for cal steps 0x%04lx",
+ mss::c_str(i_target), uint16_t(i_cal_steps_enabled) );
fapi_try_exit:
return fapi2::current_err;
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
index 09fd26965..e23b8a47a 100644
--- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
+++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/read_cntrl.H
@@ -409,6 +409,7 @@ inline uint64_t vref_guess_time( const fapi2::Target<T>& i_target )
{
constexpr uint64_t THRESHOLD_KHZ = 500;
constexpr uint64_t FUDGE = 100;
+ constexpr uint64_t NUM_LOOPS = 50;
uint64_t l_guess_time = 0;
uint64_t l_freq;
FAPI_TRY( mss::freq(i_target.template getParent<fapi2::TARGET_TYPE_MCBIST>(), l_freq) );
@@ -421,7 +422,8 @@ inline uint64_t vref_guess_time( const fapi2::Target<T>& i_target )
// exceeds the 500 KHz threshold.
// For example, a 1333 MHz clock must have value be slight more than 1333 MHz /
// 500 KHz = 2,666, rounded up to a final value of 2700.
- l_guess_time = (l_freq * MHZ_TO_KHZ) / THRESHOLD_KHZ + FUDGE;
+ // That's all one loop, so we multiply by a constant number of loops for safety's sake
+ l_guess_time = NUM_LOOPS * ((l_freq * MHZ_TO_KHZ) / THRESHOLD_KHZ + FUDGE);
FAPI_INF("VREF guess wait time: %u (freq: %lu)", l_guess_time, l_freq);
return l_guess_time;
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