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| author | Daniel Howe <dchowe@us.ibm.com> | 2017-10-03 12:06:52 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2018-04-03 14:13:39 -0400 |
| commit | bd3148541fc2d5d8fdf2901bebbe3f8530d4ceca (patch) | |
| tree | 2f4da81da2556712db747184fac04a5e2fd8f98a /src | |
| parent | da512cac4ed43ab674545df891c736d1e8204208 (diff) | |
| download | talos-hostboot-bd3148541fc2d5d8fdf2901bebbe3f8530d4ceca.tar.gz talos-hostboot-bd3148541fc2d5d8fdf2901bebbe3f8530d4ceca.zip | |
Update settings to allow xlink psave
Change-Id: I274b763348fbc906a92846415c000ba7d86d9e13
CQ: SW421691
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55042
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/55058
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C | 21 |
1 files changed, 20 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C index 2c6e0de24..858a7ca77 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C @@ -5,7 +5,7 @@ /* */ /* OpenPOWER HostBoot Project */ /* */ -/* Contributors Listed Below - COPYRIGHT 2016,2017 */ +/* Contributors Listed Below - COPYRIGHT 2016,2018 */ /* [+] International Business Machines Corp. */ /* */ /* */ @@ -29,6 +29,12 @@ using namespace fapi2; +constexpr uint64_t literal_0b1 = 0b1; +constexpr uint64_t literal_0b00011 = 0b00011; +constexpr uint64_t literal_0b00001 = 0b00001; +constexpr uint64_t literal_0x01 = 0x01; +constexpr uint64_t literal_0xFF = 0xFF; +constexpr uint64_t literal_0b001 = 0b001; constexpr uint64_t literal_0 = 0; constexpr uint64_t literal_0x1 = 0x1; constexpr uint64_t literal_0x20 = 0x20; @@ -96,6 +102,19 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC fapi2::ENUM_ATTR_PROC_FABRIC_X_ATTACHED_CHIP_CNFG_TRUE); fapi2::buffer<uint64_t> l_scom_buffer; { + FAPI_TRY(fapi2::getScom( TGT0, 0x501241aull, l_scom_buffer )); + + l_scom_buffer.insert<1, 1, 63, uint64_t>(literal_0b1 ); + l_scom_buffer.insert<2, 1, 63, uint64_t>(literal_0b1 ); + l_scom_buffer.insert<3, 1, 63, uint64_t>(literal_0b1 ); + l_scom_buffer.insert<35, 5, 59, uint64_t>(literal_0b00011 ); + l_scom_buffer.insert<27, 5, 59, uint64_t>(literal_0b00001 ); + l_scom_buffer.insert<16, 8, 56, uint64_t>(literal_0x01 ); + l_scom_buffer.insert<8, 8, 56, uint64_t>(literal_0xFF ); + l_scom_buffer.insert<5, 3, 61, uint64_t>(literal_0b001 ); + FAPI_TRY(fapi2::putScom(TGT0, 0x501241aull, l_scom_buffer)); + } + { FAPI_TRY(fapi2::getScom( TGT0, 0x501340aull, l_scom_buffer )); if (l_def_X0_ENABLED) |
