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| author | Joachim Fenkes <fenkes@de.ibm.com> | 2017-04-28 11:20:48 +0200 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-03 13:19:27 -0400 |
| commit | a258ae0062275881db2d0c29511e609a1a1ce514 (patch) | |
| tree | 0d91b4b19aa88432e3473ee2cdd43cdb8ed00bb9 /src | |
| parent | f08f9a6bd3e26e212f3df35e6205d216d234c288 (diff) | |
| download | talos-hostboot-a258ae0062275881db2d0c29511e609a1a1ce514.tar.gz talos-hostboot-a258ae0062275881db2d0c29511e609a1a1ce514.zip | |
p9_sbe_chiplet_reset: Revert NX_1 hang pulse back to 34s
The hang pulse setting of 68s is not supported by the PCB slave,
and NX can deal with a 34s hang pulse too, so revert back to 34s.
We could change the chiplet's base divider and adapt all other hang
pulse settings, but that would be a huge code ripup as it breaks
uniformity among chiplets.
Change-Id: I17ae92e58d713d54256083f43eabd9ce4be7167f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39795
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-by: Jenny Huynh <jhuynh@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39798
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H index cd0853f6b..47692349b 100644 --- a/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H +++ b/src/import/chips/p9/procedures/hwp/perv/p9_sbe_chiplet_reset.H @@ -69,7 +69,6 @@ enum P9_SBE_CHIPLET_RESET_Public_Constants HANG_PULSE_0X17 = 0x17, HANG_PULSE_0X18 = 0x18, HANG_PULSE_0X22 = 0x22, - HANG_PULSE_0X23 = 0x23, HANG_PULSE_0X13 = 0x13, HANG_PULSE_0X03 = 0x03, OPCG_ALIGN_SETTING = 0x5000000000003020ull, |
