adjust HWP logic dependent on X/O freq attributes

  attributes adjusted to store PLL mesh speed
  multiply by appropriate factor to reach bus operational speed

Change-Id: Idba653d5f760516bb4f91a16730e65b6da957584
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29465
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Thi N. Tran <thi@us.ibm.com>
Reviewed-by: CHRISTINA L. GRAVES <clgraves@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29467
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

4 files changed, 48 insertions, 36 deletions

diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
index d214ad533..b167d9ea9 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ab_hp_scom.C
@@ -47,6 +47,7 @@ constexpr auto literal_13 = 13;
 constexpr auto literal_14 = 14;
 constexpr auto literal_15 = 15;
 constexpr auto literal_1600 = 1600;
+constexpr auto literal_16 = 16;
 constexpr auto literal_2577 = 2577;
 
 fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP>& TGT0,
@@ -184,8 +185,8 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_A_CMD_RATE_4B_R = (((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % ((
-                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2));
+        auto l_def_A_CMD_RATE_4B_R = (((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % (((
+                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_16) * literal_1600) * literal_2));
         fapi2::ATTR_PROC_FABRIC_A_BUS_WIDTH_Type l_TGT1_ATTR_PROC_FABRIC_A_BUS_WIDTH;
         l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_A_BUS_WIDTH, TGT1, l_TGT1_ATTR_PROC_FABRIC_A_BUS_WIDTH);
 
@@ -195,10 +196,10 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_A_CMD_RATE_D = ((l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2);
+        auto l_def_A_CMD_RATE_D = (((l_TGT1_ATTR_FREQ_A_MHZ * literal_16) * literal_1600) * literal_2);
         auto l_def_A_CMD_RATE_4B_N = ((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577);
-        auto l_def_A_CMD_RATE_2B_R = (((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % ((
-                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_1600) * literal_2));
+        auto l_def_A_CMD_RATE_2B_R = (((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577) % (((
+                                          l_TGT1_ATTR_FREQ_A_MHZ * literal_16) * literal_1600) * literal_2));
         auto l_def_A_CMD_RATE_2B_N = ((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) * literal_2577);
         {
             l_rc = fapi2::getScom( TGT0, 0x501180bull, l_scom_buffer );
@@ -859,7 +860,7 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_X_CMD_RATE_4B_R = ((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) % l_TGT1_ATTR_FREQ_X_MHZ);
+        auto l_def_X_CMD_RATE_4B_R = ((literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ) % (l_TGT1_ATTR_FREQ_X_MHZ * literal_8));
         fapi2::ATTR_PROC_FABRIC_X_BUS_WIDTH_Type l_TGT1_ATTR_PROC_FABRIC_X_BUS_WIDTH;
         l_rc = FAPI_ATTR_GET(fapi2::ATTR_PROC_FABRIC_X_BUS_WIDTH, TGT1, l_TGT1_ATTR_PROC_FABRIC_X_BUS_WIDTH);
 
@@ -869,9 +870,9 @@ fapi2::ReturnCode p9_fbc_ab_hp_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC_
             break;
         }
 
-        auto l_def_X_CMD_RATE_D = l_TGT1_ATTR_FREQ_X_MHZ;
+        auto l_def_X_CMD_RATE_D = (l_TGT1_ATTR_FREQ_X_MHZ * literal_8);
         auto l_def_X_CMD_RATE_4B_N = (literal_6 * l_TGT1_ATTR_FREQ_PB_MHZ);
-        auto l_def_X_CMD_RATE_2B_R = ((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) % l_TGT1_ATTR_FREQ_X_MHZ);
+        auto l_def_X_CMD_RATE_2B_R = ((literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ) % (l_TGT1_ATTR_FREQ_X_MHZ * literal_8));
         auto l_def_X_CMD_RATE_2B_N = (literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ);
         {
             l_rc = fapi2::getScom( TGT0, 0x501180full, l_scom_buffer );
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
index a9213d96d..f347508c2 100644
--- a/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
+++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_fbc_ioe_tl_scom.C
@@ -36,6 +36,7 @@ constexpr auto literal_0xFFFFFFFFFFFFFFFF = 0xFFFFFFFFFFFFFFFF;
 constexpr auto literal_0x1 = 0x1;
 constexpr auto literal_0x20 = 0x20;
 constexpr auto literal_12 = 12;
+constexpr auto literal_8 = 8;
 constexpr auto literal_10 = 10;
 constexpr auto literal_0b0010001 = 0b0010001;
 constexpr auto literal_11 = 11;
@@ -112,12 +113,18 @@ fapi2::ReturnCode p9_fbc_ioe_tl_scom(const fapi2::Target<fapi2::TARGET_TYPE_PROC
             break;
         }
 
-        auto l_def_X_RATIO_12_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_12 * l_TGT1_ATTR_FREQ_PB_MHZ));
-        auto l_def_X_RATIO_11_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_11 * l_TGT1_ATTR_FREQ_PB_MHZ));
-        auto l_def_X_RATIO_10_10 = ((literal_10 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
-        auto l_def_X_RATIO_10_11 = ((literal_11 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
-        auto l_def_X_RATIO_10_12 = ((literal_12 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
-        auto l_def_X_RATIO_10_13 = ((literal_13 * l_TGT1_ATTR_FREQ_X_MHZ) >= (literal_10 * l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_12_10 = ((literal_10 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_12 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_11_10 = ((literal_10 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_11 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_10 = ((literal_10 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_10 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_11 = ((literal_11 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_10 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_12 = ((literal_12 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_10 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
+        auto l_def_X_RATIO_10_13 = ((literal_13 * (l_TGT1_ATTR_FREQ_X_MHZ * literal_8)) >= (literal_10 *
+                                    l_TGT1_ATTR_FREQ_PB_MHZ));
         {
             l_rc = fapi2::getScom( TGT0, 0x501340aull, l_scom_buffer );
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
index 2134acb53..3e1c89211 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.C
@@ -815,25 +815,29 @@ extern "C"
         fapi2::buffer<uint64_t> data(0x0);
         uint32_t longest_delay = 0;
         uint32_t freq_x = 0;
-        uint32_t freq_a = 0;
+        uint32_t freq_o = 0;
 
 
         FAPI_DBG("Start");
         // retrieve X-bus and A-bus frequencies
         FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_X_MHZ, FAPI_SYSTEM, freq_x),
                  "Failure reading XBUS frequency attribute!");
-        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_A_MHZ, FAPI_SYSTEM, freq_a),
-                 "Failure reading ABUS frequency attribute!");
+        FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_FREQ_A_MHZ, FAPI_SYSTEM, freq_o),
+                 "Failure reading OBUS frequency attribute!");
+
+        // multiply attribute (mesh speed) speed by link factor
+        freq_x *= 8;
+        freq_o *= 16;
 
         // Bus frequencies are global for the system (i.e. A0 and A1 will always run with the same frequency)
-        FAPI_DBG("XBUS=%dMHz ABUS=%dMHz", freq_x, freq_a);
+        FAPI_DBG("XBUS=%dMHz OBUS=%dMHz", freq_x, freq_o);
 
         // Find the most-delayed path in the topology; this is the MDMT's delay
-        FAPI_TRY(calculate_longest_topolopy_delay(i_tod_node, freq_x, freq_a, longest_delay),
+        FAPI_TRY(calculate_longest_topolopy_delay(i_tod_node, freq_x, freq_o, longest_delay),
                  "Failure calculating longest topology delay!");
         FAPI_DBG("the longest delay is %d TOD-grid-cycles.", longest_delay);
 
-        FAPI_TRY(set_topology_delays(i_tod_node, freq_x, freq_a, longest_delay),
+        FAPI_TRY(set_topology_delays(i_tod_node, freq_x, freq_o, longest_delay),
                  "Unable to set topology delays!");
 
         // Finally, the MDMT delay must include additional TOD-grid-cycles to account for staging latches in slaves
@@ -849,7 +853,7 @@ extern "C"
     //---------------------------------------------------------------------------------
     fapi2::ReturnCode calculate_longest_topolopy_delay(tod_topology_node* i_tod_node,
             const uint32_t     i_freq_x,
-            const uint32_t     i_freq_a,
+            const uint32_t     i_freq_o,
             uint32_t&          o_longest_delay)
     {
         uint32_t node_delay = 0;
@@ -857,7 +861,7 @@ extern "C"
 
         FAPI_DBG("Start");
 
-        FAPI_TRY(calculate_node_link_delay(i_tod_node, i_freq_x, i_freq_a, node_delay),
+        FAPI_TRY(calculate_node_link_delay(i_tod_node, i_freq_x, i_freq_o, node_delay),
                  "Failure calculating single node delay!");
         o_longest_delay = node_delay;
 
@@ -866,7 +870,7 @@ extern "C"
              ++child)
         {
             tod_topology_node* tod_node = *child;
-            FAPI_TRY(calculate_longest_topolopy_delay(tod_node, i_freq_x, i_freq_a, node_delay),
+            FAPI_TRY(calculate_longest_topolopy_delay(tod_node, i_freq_x, i_freq_o, node_delay),
                      "Failure calculating topology delay!");
 
             if (node_delay > current_longest_delay)
@@ -887,7 +891,7 @@ extern "C"
     //---------------------------------------------------------------------------------
     fapi2::ReturnCode calculate_node_link_delay(tod_topology_node* i_tod_node,
             const uint32_t     i_freq_x,
-            const uint32_t     i_freq_a,
+            const uint32_t     i_freq_o,
             uint32_t&          o_node_delay)
     {
         fapi2::buffer<uint64_t> data(0x0);
@@ -964,7 +968,7 @@ extern "C"
                                  || (l_TGT0_ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG[0] != 0)),
                                 fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY_RX().set_TARGET(target).set_RX(OBUS0),
                                 "i_tod_node->i_bus_rx is set to OBUS0 and it is not enabled");
-                    bus_freq = i_freq_x;
+                    bus_freq = i_freq_o;
                     data.setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_0>().setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_1>();
                     bus_mode_addr = PU_IOE_PB_OLINK_DLY_0123_REG;
                     bus_mode_sel_even = PB_OLINK_DLY_FMR0_LINK_DELAY_START_BIT;
@@ -977,7 +981,7 @@ extern "C"
                                  || (l_TGT0_ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG[1] != 0)),
                                 fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY_RX().set_TARGET(target).set_RX(OBUS1),
                                 "i_tod_node->i_bus_rx is set to OBUS1 and it is not enabled");
-                    bus_freq = i_freq_x;
+                    bus_freq = i_freq_o;
                     data.setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_2>().setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_3>();
                     bus_mode_addr = PU_IOE_PB_OLINK_DLY_0123_REG;
                     bus_mode_sel_even = PB_OLINK_DLY_FMR2_LINK_DELAY_START_BIT;
@@ -990,7 +994,7 @@ extern "C"
                                  || (l_TGT0_ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG[2] != 0)),
                                 fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY_RX().set_TARGET(target).set_RX(OBUS2),
                                 "i_tod_node->i_bus_rx is set to OBUS2 and it is not enabled");
-                    bus_freq = i_freq_x;
+                    bus_freq = i_freq_o;
                     data.setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_4>().setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_5>();
                     bus_mode_addr = PU_IOE_PB_OLINK_DLY_4567_REG;
                     bus_mode_sel_even = PB_OLINK_DLY_FMR4_LINK_DELAY_START_BIT;
@@ -1003,7 +1007,7 @@ extern "C"
                                  || (l_TGT0_ATTR_PROC_FABRIC_A_ATTACHED_CHIP_CNFG[3] != 0)),
                                 fapi2::P9_TOD_SETUP_INVALID_TOPOLOGY_RX().set_TARGET(target).set_RX(OBUS3),
                                 "i_tod_node->i_bus_rx is set to OBUS3 and it is not enabled");
-                    bus_freq = i_freq_x;
+                    bus_freq = i_freq_o;
                     data.setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_6>().setBit<PB_OLINK_RT_DELAY_CTL_SET_LINK_7>();
                     bus_mode_addr = PU_IOE_PB_OLINK_DLY_4567_REG;
                     bus_mode_sel_even = PB_OLINK_DLY_FMR6_LINK_DELAY_START_BIT;
@@ -1061,7 +1065,7 @@ extern "C"
     //---------------------------------------------------------------------------------
     fapi2::ReturnCode set_topology_delays(tod_topology_node* i_tod_node,
                                           const uint32_t     i_freq_x,
-                                          const uint32_t     i_freq_a,
+                                          const uint32_t     i_freq_o,
                                           const uint32_t     i_longest_delay)
     {
         FAPI_DBG("Start");
@@ -1081,7 +1085,7 @@ extern "C"
              ++child)
         {
             tod_topology_node* tod_node = *child;
-            FAPI_TRY(set_topology_delays(tod_node, i_freq_x, i_freq_a, i_tod_node->o_int_path_delay),
+            FAPI_TRY(set_topology_delays(tod_node, i_freq_x, i_freq_o, i_tod_node->o_int_path_delay),
                      "Failure calculating topology delay!");
         }
 
diff --git a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.H b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.H
index 3daa49182..307095d84 100644
--- a/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.H
+++ b/src/import/chips/p9/procedures/hwp/nest/p9_tod_setup.H
@@ -173,34 +173,34 @@ extern "C" {
 /// @brief Finds the longest delay in the topology (additionally sets each node delay)
 /// @param[in]  i_tod_node      => Reference to TOD topology
 /// @param[in]  i_freq_x        => XBUS frequency in MHz
-/// @param[in]  i_freq_a        => ABUS frequency in MHz
+/// @param[in]  i_freq_o        => OBUS frequency in MHz
 /// @param[out] o_longest_delay => Longest delay in TOD-grid-cycles
 /// @return FAPI_RC_SUCCESS if a longest TOD delay was found in topology else FAPI or ECMD error is sent through
     fapi2::ReturnCode calculate_longest_topolopy_delay(tod_topology_node* i_tod_node,
             const uint32_t     i_freq_x,
-            const uint32_t     i_freq_a,
+            const uint32_t     i_freq_o,
             uint32_t&          o_longest_delay);
 
 /// @brief Calculates the delay for a node in TOD-grid-cycles
 /// @param[in]  i_tod_node   => Reference to TOD topology
 /// @param[in]  i_freq_x     => XBUS frequency in MHz
-/// @param[in]  i_freq_a     => ABUS frequency in MHz
+/// @param[in]  i_freq_o     => OBUS frequency in MHz
 /// @param[out] o_node_delay => Delay of a single node in TOD-grid-cycles
 /// @return FAPI_RC_SUCCESS if TOD node delay is successfully calculated else FAPI or ECMD error is sent through
     fapi2::ReturnCode calculate_node_link_delay(tod_topology_node* i_tod_node,
             const uint32_t     i_freq_x,
-            const uint32_t     i_freq_a,
+            const uint32_t     i_freq_o,
             uint32_t&          o_node_delay);
 
 /// @brief Updates the topology struct with the final delay values
 /// @param[in]  i_tod_node      => Reference to TOD topology
 /// @param[in]  i_freq_x        => XBUS frequency in MHz
-/// @param[in]  i_freq_a        => ABUS frequency in MHz
+/// @param[in]  i_freq_o        => OBUS frequency in MHz
 /// @param[in]  i_longest_delay => Longest delay in the topology
 /// @return FAPI_RC_SUCCESS if o_int_path_delay was set for every node in the topology else FAPI or ECMD error is sent through
     fapi2::ReturnCode set_topology_delays(tod_topology_node* i_tod_node,
                                           const uint32_t     i_freq_x,
-                                          const uint32_t     i_freq_a,
+                                          const uint32_t     i_freq_o,
                                           const uint32_t     i_longest_delay);