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| author | Brian Vanderpool <vanderp@us.ibm.com> | 2017-09-28 12:06:54 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-10-03 00:02:08 -0400 |
| commit | 96f35538cc5560f37c74683d4d3d89536ff4e4f1 (patch) | |
| tree | 0d31cb3f34450ce973a47c56f8af1ab657195a20 /src | |
| parent | cd792cd0c501650313405c802a3f76ae8fd2c5e9 (diff) | |
| download | talos-hostboot-96f35538cc5560f37c74683d4d3d89536ff4e4f1.tar.gz talos-hostboot-96f35538cc5560f37c74683d4d3d89536ff4e4f1.zip | |
Don't clear SGPE/PGPE OCC flags until after the engines are halted
Change-Id: Id707a12d3e7dd00c310a01630a2e520b2ed22a6e
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46873
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Juan R. Medina <jrmedina@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/46878
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C | 20 |
1 files changed, 11 insertions, 9 deletions
diff --git a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C index d0f445658..a9037b7f5 100644 --- a/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C +++ b/src/import/chips/p9/procedures/hwp/pm/p9_pm_reset.C @@ -95,15 +95,6 @@ fapi2::ReturnCode p9_pm_reset( FAPI_TRY(l_rc, "ERROR: Failed to mask OCC FIRs."); FAPI_TRY(p9_pm_glob_fir_trace(i_target, "After masking FIRs")); - // Clear the OCC Flag and Scratch2 registers - // which contain runtime settings and modes for PM GPEs (Pstate and Stop functions) - l_data64.flush<0>(); - FAPI_TRY(fapi2::putScom(i_target, PU_OCB_OCI_OCCFLG_SCOM, l_data64), - "ERROR: Failed to write to OCC Flag Register"); - - FAPI_TRY(fapi2::putScom(i_target, PU_OCB_OCI_OCCS2_SCOM, l_data64), - "ERROR: Failed to write to OCC Scratch2 Register"); - // ************************************************************************ // Halt the OCC PPC405 and reset it safely // ************************************************************************ @@ -162,6 +153,17 @@ fapi2::ReturnCode p9_pm_reset( FAPI_TRY(p9_pm_glob_fir_trace(i_target, "After reset of SGPE")); // ************************************************************************ + // Clear the OCC Flag and Scratch2 registers + // which contain runtime settings and modes for PM GPEs (Pstate and Stop functions) + // ************************************************************************ + l_data64.flush<0>(); + FAPI_TRY(fapi2::putScom(i_target, PU_OCB_OCI_OCCFLG_SCOM, l_data64), + "ERROR: Failed to write to OCC Flag Register"); + FAPI_TRY(fapi2::putScom(i_target, PU_OCB_OCI_OCCS2_SCOM, l_data64), + "ERROR: Failed to write to OCC Scratch2 Register"); + + + // ************************************************************************ // Reset Cores and Quads // ************************************************************************ FAPI_DBG("Executing p9_pm_corequad_init to reset cores & quads"); |
