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| author | crgeddes <crgeddes@us.ibm.com> | 2017-06-19 11:04:25 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-06-20 14:43:15 -0400 |
| commit | 6df0a3f2032e1af7b0c2dbe07114b0281681968c (patch) | |
| tree | ba5b60258614e8d25ba5b9e7eb9a9132c13038a2 /src | |
| parent | 68746d98189bbf23e6ed9dce15303d5430ed22da (diff) | |
| download | talos-hostboot-6df0a3f2032e1af7b0c2dbe07114b0281681968c.tar.gz talos-hostboot-6df0a3f2032e1af7b0c2dbe07114b0281681968c.zip | |
Enable LSI interrupt after masking sources in interrupt service init
In DD2 the interrupt HW is initialized in a different state to make
things safer. The idea is to prevent hot interrupts from firing
when we are not ready.
Change-Id: Ie31ad1f8f2dc0e5ba5bf62118f0ade8ed8097790
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/42053
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Dean Sanner <dsanner@us.ibm.com>
Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/usr/intr/intrrp.C | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 081d7e144..7d7b2cb3d 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -333,6 +333,8 @@ errlHndl_t IntrRp::_init() break; } + enableLsiInterrupts(); + TRACFCOMP(g_trac_intr, "IntrRp::_init() Enabling PSIHB Interrupts"); //Enable PSIHB Interrupts l_err = enableInterrupts(l_procIntrHdlr); |
