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| author | John Rell <jgrell@us.ibm.com> | 2017-04-28 16:43:43 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2017-05-05 00:11:34 -0400 |
| commit | 493b17e5c8b0a771a3adfb876e13bd0bc066760e (patch) | |
| tree | 6bca3eed14677ee4f2fec39a702c699d18b3dafd /src | |
| parent | b2d55a6ba62f9cfb538a96fcd5220d504b396bdc (diff) | |
| download | talos-hostboot-493b17e5c8b0a771a3adfb876e13bd0bc066760e.tar.gz talos-hostboot-493b17e5c8b0a771a3adfb876e13bd0bc066760e.zip | |
jgr17042800 Updated Obus scom initfile
Updated with rx_speed_select setting to match SW387041 PLL setting changes
Change-Id: I91557b0f427b441b9abec16a99a8de148e588c81
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39905
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Joseph J. McGill <jmcgill@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/39909
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/import/chips/p9/procedures/hwp/initfiles/p9_obus_scom.C | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/import/chips/p9/procedures/hwp/initfiles/p9_obus_scom.C b/src/import/chips/p9/procedures/hwp/initfiles/p9_obus_scom.C index 2ddf1f700..f75cd813a 100644 --- a/src/import/chips/p9/procedures/hwp/initfiles/p9_obus_scom.C +++ b/src/import/chips/p9/procedures/hwp/initfiles/p9_obus_scom.C @@ -44,6 +44,8 @@ constexpr uint64_t literal_0b0001 = 0b0001; constexpr uint64_t literal_0b101 = 0b101; constexpr uint64_t literal_0b100 = 0b100; constexpr uint64_t literal_0b110 = 0b110; +constexpr uint64_t literal_0b01 = 0b01; +constexpr uint64_t literal_0b00 = 0b00; constexpr uint64_t literal_0b00100 = 0b00100; constexpr uint64_t literal_0b0010101 = 0b0010101; constexpr uint64_t literal_0b0010110 = 0b0010110; @@ -61,6 +63,8 @@ fapi2::ReturnCode p9_obus_scom(const fapi2::Target<fapi2::TARGET_TYPE_OBUS>& TGT FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_IS_SIMULATION, TGT1, l_TGT1_ATTR_IS_SIMULATION)); uint64_t l_def_IS_HW = (l_TGT1_ATTR_IS_SIMULATION == literal_0); uint64_t l_def_IS_SIM = (l_TGT1_ATTR_IS_SIMULATION == literal_1); + fapi2::ATTR_CHIP_EC_FEATURE_SW387041_Type l_TGT2_ATTR_CHIP_EC_FEATURE_SW387041; + FAPI_TRY(FAPI_ATTR_GET(fapi2::ATTR_CHIP_EC_FEATURE_SW387041, TGT2, l_TGT2_ATTR_CHIP_EC_FEATURE_SW387041)); fapi2::buffer<uint64_t> l_scom_buffer; { FAPI_TRY(fapi2::getScom( TGT0, 0x8000000009010c3full, l_scom_buffer )); @@ -3084,6 +3088,16 @@ fapi2::ReturnCode p9_obus_scom(const fapi2::Target<fapi2::TARGET_TYPE_OBUS>& TGT FAPI_TRY(fapi2::getScom( TGT0, 0x8009880009010c3full, l_scom_buffer )); l_scom_buffer.insert<48, 3, 61, uint64_t>(literal_0b110 ); + + if ((l_TGT2_ATTR_CHIP_EC_FEATURE_SW387041 != literal_0)) + { + l_scom_buffer.insert<51, 2, 62, uint64_t>(literal_0b01 ); + } + else if (( true )) + { + l_scom_buffer.insert<51, 2, 62, uint64_t>(literal_0b00 ); + } + FAPI_TRY(fapi2::putScom(TGT0, 0x8009880009010c3full, l_scom_buffer)); } { |
