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authorChristian Geddes <crgeddes@us.ibm.com>2019-02-01 11:08:55 -0600
committerDaniel M. Crowell <dcrowell@us.ibm.com>2019-02-05 16:56:45 -0600
commit318a3c71f79d1fb0b7157d430480f77f306934e8 (patch)
treebc0c4949342846e76384f64c36916a2e49e156f0 /src
parentde4076a6de0b26d96974f616cb28788e19c7e5a8 (diff)
downloadtalos-hostboot-318a3c71f79d1fb0b7157d430480f77f306934e8.tar.gz
talos-hostboot-318a3c71f79d1fb0b7157d430480f77f306934e8.zip
Skip dmi_io_dccal in Axone
Previously this HWP wrapper relied on that fact that Nimbus did not have any MC targets so this was only be ran on Cumulus systems. However, with the introduction of Axone , which also has MC targets, we must explictly only call this HWP on processors of model type CUMULUS Change-Id: I39610440c1c165113985e1542f78d9591316c8b2 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/71208 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/usr/isteps/istep12/call_dmi_io_dccal.C119
1 files changed, 64 insertions, 55 deletions
diff --git a/src/usr/isteps/istep12/call_dmi_io_dccal.C b/src/usr/isteps/istep12/call_dmi_io_dccal.C
index d6130eb45..ca2d11aef 100644
--- a/src/usr/isteps/istep12/call_dmi_io_dccal.C
+++ b/src/usr/isteps/istep12/call_dmi_io_dccal.C
@@ -5,7 +5,7 @@
/* */
/* OpenPOWER HostBoot Project */
/* */
-/* Contributors Listed Below - COPYRIGHT 2015,2017 */
+/* Contributors Listed Below - COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
@@ -62,79 +62,88 @@ void* call_dmi_io_dccal (void *io_pArgs)
TRACDCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal entry" );
- TARGETING::TargetHandleList l_procTargetList;
- getAllChips(l_procTargetList, TYPE_PROC);
-
- TRACFCOMP(ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal: %d proc chips found",
- l_procTargetList.size());
-
- for (const auto & l_proc_target : l_procTargetList)
+ do
{
- // a. p9_io_dmi_dccal.C (DMI target)
-
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "p9_io_dmi_dccal HWP target HUID %.8x",
- TARGETING::get_huid(l_proc_target));
- // call the HWP with each target
- fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapi_proc_target
- (l_proc_target);
+ TARGETING::TargetHandleList l_procTargetList;
+ getAllChips(l_procTargetList, TYPE_PROC);
- FAPI_INVOKE_HWP(l_err, p9_io_dmi_dccal, l_fapi_proc_target);
+ if(l_procTargetList[0]->getAttr<TARGETING::ATTR_MODEL>() != TARGETING::MODEL_CUMULUS)
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "p9_io_dmi_dccal Proccessor model is not CUMULUS , skipping this step");
+ break;
+ }
- // process return code.
- if ( l_err )
+ for (const auto & l_proc_target : l_procTargetList)
{
+ // a. p9_io_dmi_dccal.C (DMI target)
+
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9_io_dmi_dccal HWP on target HUID %.8x",
- l_err->reasonCode(), TARGETING::get_huid(l_proc_target) );
+ "p9_io_dmi_dccal HWP target HUID %.8x",
+ TARGETING::get_huid(l_proc_target));
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_proc_target).addToLog( l_err );
+ // call the HWP with each target
+ fapi2::Target<fapi2::TARGET_TYPE_PROC_CHIP> l_fapi_proc_target
+ (l_proc_target);
- // Create IStep error log and cross reference to error that occurred
- l_StepError.addErrorDetails( l_err );
+ FAPI_INVOKE_HWP(l_err, p9_io_dmi_dccal, l_fapi_proc_target);
- // Commit Error
- errlCommit( l_err, ISTEP_COMP_ID );
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS : p9_io_dmi_dccal HWP");
- }
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_io_dmi_dccal HWP on target HUID %.8x",
+ l_err->reasonCode(), TARGETING::get_huid(l_proc_target) );
- // b. p9_io_cen_dccal.C (Centaur target)
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_proc_target).addToLog( l_err );
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "p9_io_cen_dccal HWP target HUID %.8x",
- TARGETING::get_huid(l_proc_target));
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_err );
- FAPI_INVOKE_HWP(l_err, p9_io_cen_dccal, l_fapi_proc_target);
+ // Commit Error
+ errlCommit( l_err, ISTEP_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : p9_io_dmi_dccal HWP");
+ }
+
+ // b. p9_io_cen_dccal.C (Centaur target)
- // process return code.
- if ( l_err )
- {
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "ERROR 0x%.8X: p9_io_cen_dccal HWP on target HUID %.8x",
- l_err->reasonCode(), TARGETING::get_huid(l_proc_target) );
+ "p9_io_cen_dccal HWP target HUID %.8x",
+ TARGETING::get_huid(l_proc_target));
- // capture the target data in the elog
- ErrlUserDetailsTarget(l_proc_target).addToLog( l_err );
+ FAPI_INVOKE_HWP(l_err, p9_io_cen_dccal, l_fapi_proc_target);
- // Create IStep error log and cross reference to error that occurred
- l_StepError.addErrorDetails( l_err );
+ // process return code.
+ if ( l_err )
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "ERROR 0x%.8X: p9_io_cen_dccal HWP on target HUID %.8x",
+ l_err->reasonCode(), TARGETING::get_huid(l_proc_target) );
+
+ // capture the target data in the elog
+ ErrlUserDetailsTarget(l_proc_target).addToLog( l_err );
+
+ // Create IStep error log and cross reference to error that occurred
+ l_StepError.addErrorDetails( l_err );
+
+ // Commit Error
+ errlCommit( l_err, ISTEP_COMP_ID );
+ }
+ else
+ {
+ TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+ "SUCCESS : p9_io_cen_dccal HWP");
+ }
- // Commit Error
- errlCommit( l_err, ISTEP_COMP_ID );
- }
- else
- {
- TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
- "SUCCESS : p9_io_cen_dccal HWP");
}
- }
+ }while(0);
TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, "call_dmi_io_dccal exit" );
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