summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorMarty Gloff <mgloff@us.ibm.com>2017-03-21 12:00:20 -0500
committerWilliam G. Hoffa <wghoffa@us.ibm.com>2017-04-18 14:12:17 -0400
commite9397549d8d9e2b2cd8a2e1d4af6dfa81c0b9ec2 (patch)
tree62c9313872fba730b7551d2b674322c605b407f1 /src
parenta72dc7911307c54fbbdf3ae6717d5991dc4a4438 (diff)
downloadtalos-hostboot-e9397549d8d9e2b2cd8a2e1d4af6dfa81c0b9ec2.tar.gz
talos-hostboot-e9397549d8d9e2b2cd8a2e1d4af6dfa81c0b9ec2.zip
SBE message passing - Set FFDC Address command and set HDAT RHB entry
Create space for SBE Communications buffer in HB reserved memory and send Set FFDC Address PSU command to SBE. Change-Id: Ibccdf087d0416edaf6e1e2c5993a10adcddf67fd RTC: 170758 Depends-on: Id14471b1e6f036c278fd5ae1950b942290282c1e Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/38251 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com> Reviewed-by: Corey V. Swenson <cswenson@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
Diffstat (limited to 'src')
-rw-r--r--src/include/runtime/interface.h2
-rw-r--r--src/include/usr/sbeio/sbe_psudd.H43
-rw-r--r--src/include/usr/sbeio/sbeioif.H20
-rw-r--r--src/usr/runtime/populate_hbruntime.C131
-rw-r--r--src/usr/sbeio/makefile1
-rw-r--r--src/usr/sbeio/sbe_setFFDCAddr.C105
6 files changed, 295 insertions, 7 deletions
diff --git a/src/include/runtime/interface.h b/src/include/runtime/interface.h
index 489cbed15..aafbbf96d 100644
--- a/src/include/runtime/interface.h
+++ b/src/include/runtime/interface.h
@@ -126,6 +126,8 @@ enum MemoryError_t
#define HBRT_RSVD_MEM__PRIMARY "ibm,hb-rsv-mem"
#define HBRT_RSVD_MEM__HOMER "ibm,homer-image"
#define HBRT_RSVD_MEM__OCC_COMMON "ibm,occ-common-area"
+#define HBRT_RSVD_MEM__SBE_COMM "ibm,sbe-comm"
+#define HBRT_RSVD_MEM__SBE_FFDC "ibm,sbe-ffdc"
/** @typedef hostInterfaces_t
diff --git a/src/include/usr/sbeio/sbe_psudd.H b/src/include/usr/sbeio/sbe_psudd.H
index 2ad545f5f..96ff5ece3 100644
--- a/src/include/usr/sbeio/sbe_psudd.H
+++ b/src/include/usr/sbeio/sbe_psudd.H
@@ -99,6 +99,7 @@ class SbePsu
//BYTE 7 options
enum psuGenericMessageCommands
{
+ SBE_PSU_SET_FFDC_ADDRESS = 0x04,
SBE_PSU_GENERIC_MSG_QUIESCE = 0x05,
SBE_CMD_CONTROL_SYSTEM_CONFIG = 0x06
};
@@ -185,6 +186,25 @@ class SbePsu
};
/**
+ * @brief non reserved word enums
+ *
+ * Shows which of the request and response msg registers are
+ * not reserved. Reserved registers do not need to be written
+ * or read.
+ *
+ * This is a 4 bit field:
+ * 0x1 - Reg 0 is non-reserved (read or write this reg)
+ * 0x2 - Reg 1 is non-reserved (read or write this reg)
+ * 0x4 - Reg 2 is non-reserved (read or write this reg)
+ * 0x8 - Reg 3 is non-reserved (read or write this reg)
+ */
+ enum psuSetFFDCAddrNonReservedMsgs
+ {
+ SBE_SET_FFDC_ADDR_REQ_USED_REGS = 0x0F,
+ SBE_SET_FFDC_ADDR_RSP_USED_REGS = 0x01,
+ };
+
+ /**
* @brief Struct for PSU command message format
*
*/
@@ -284,6 +304,19 @@ class SbePsu
uint64_t cd4_PsuQuiesce_MbxReg3reserved;
} PACKED;
+ struct //setFFDCAddress
+ {
+ uint16_t cd7_setFFDCAddr_Reserved;
+ uint16_t cd7_setFFDCAddr_ControlFlags;
+ uint16_t cd7_setFFDCAddr_SeqID;
+ uint8_t cd7_setFFDCAddr_CommandClass;
+ uint8_t cd7_setFFDCAddr_Command;
+ uint32_t cd7_setFFDCAddr_FFDCSize; // mbxReg1 / dataWord2
+ uint32_t cd7_setFFDCAddr_CommSize; // mbxReg1 / dataWord3
+ uint64_t cd7_setFFDCAddr_FFDCAddr; // mbxReg2
+ uint64_t cd7_setFFDCAddr_CommAddr; // mbxReg3
+ } PACKED;
+
psuCommand(uint16_t i_controlFlags, //Mbx Reg 0 input
uint8_t i_commandClass, //Mbx Reg 0 input
@@ -440,6 +473,16 @@ class SbePsu
};
/**
+ * @brief get SBE FFDC buffer size
+ *
+ * @return const size_t Size of SBE FFDC buffer.
+ */
+ const size_t getSbeFFDCBufferSize(void)
+ {
+ return (ffdcPackageSize * PAGESIZE);
+ }
+
+ /**
* @brief perform SBE PSU chip-op
*
* @param[in] i_target Proc target to use for PSU Request
diff --git a/src/include/usr/sbeio/sbeioif.H b/src/include/usr/sbeio/sbeioif.H
index 616c5a4d4..15f310261 100644
--- a/src/include/usr/sbeio/sbeioif.H
+++ b/src/include/usr/sbeio/sbeioif.H
@@ -144,6 +144,26 @@ namespace SBEIO
*/
errlHndl_t sendFifoReset(TARGETING::Target * i_target);
+ /**
+ * @brief Set the FFDC address for the SBE so it is aware of the FFDC buffer
+ * and its size and it is aware of the SBE Communication buffer and
+ * its size
+ *
+ * @param[in] i_sbeffdcSize uint32 Size of SBE FFDC buffer
+ * @param[in] i_sbeCommSize uint32 Size of SBE Communication buffer
+ * @param[in] i_sbeffdcAddr uint64 Physical mainstore address of FFDC buffer
+ * @param[in] i_sbeCommAddr uint64 Physical mainstore address of Comm buffer
+ * @param[in] i_procChip The proc to which you would like to send the info
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t sendSetFFDCAddr(const uint32_t i_sbeffdcSize,
+ const uint32_t i_sbeCommSize,
+ const uint64_t i_sbeffdcAddr,
+ const uint64_t i_sbeCommAddr,
+ TARGETING::Target * i_procChip);
+
} //end namespace SBEIO
#endif /* _SBEIOIF_H */
diff --git a/src/usr/runtime/populate_hbruntime.C b/src/usr/runtime/populate_hbruntime.C
index 5f97d5e90..995f76302 100644
--- a/src/usr/runtime/populate_hbruntime.C
+++ b/src/usr/runtime/populate_hbruntime.C
@@ -62,6 +62,9 @@
#include <targeting/common/attributeTank.H>
#include <runtime/interface.h>
#include <targeting/attrPlatOverride.H>
+#include <sbeio/sbeioif.H>
+#include <sbeio/sbe_psudd.H>
+#include <sbeio/runtime/sbe_msg_passing.H>
namespace RUNTIME
@@ -88,8 +91,8 @@ errlHndl_t populate_RtDataByNode(uint64_t iNodeId)
TRACFCOMP( g_trac_runtime, ENTER_MRK"populate_RtDataByNode" );
errlHndl_t l_elog = nullptr;
const char* l_stringLabels[] =
- { "ibm,hbrt-vpd-image" ,
- "ibm,hbrt-target-image" };
+ { HBRT_RSVD_MEM__VPD_CACHE ,
+ HBRT_RSVD_MEM__ATTRIBUTES };
// OPAL not supported
if(TARGETING::is_sapphire_load())
@@ -479,6 +482,12 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId)
hdatMsVpdRhbAddrRange_t* l_rngPtr;
uint64_t l_vAddr = 0x0;
+ // Get list of processor chips
+ TARGETING::TargetHandleList l_procChips;
+ getAllChips( l_procChips,
+ TARGETING::TYPE_PROC,
+ true);
+
if(TARGETING::is_phyp_load())
{
// First phyp entry is for the entire 256M HB space
@@ -565,6 +574,8 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId)
// -----ATTR Data------------
// -----ATTR Override Data---
// -----HBRT Image-----------
+ // -----SBE Comm---------
+ // -----SBE FFDC---------
// First opal entries are for the HOMERs
uint64_t l_homerAddr = l_topMemAddr;
@@ -572,10 +583,6 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId)
l_labelSize = strlen(l_label) + 1;
// Loop through all functional Procs
- TARGETING::TargetHandleList l_procChips;
- getAllChips( l_procChips,
- TARGETING::TYPE_PROC );
-
for (const auto & l_procChip: l_procChips)
{
l_homerAddr = l_procChip->getAttr
@@ -959,6 +966,8 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId)
memcpy( l_rngPtr->hdatRhbLabelString,
l_label,
l_labelSize );
+ l_prevDataAddr = l_hbrtImageAddr;
+ l_prevDataSize = l_attrSizeAligned;
traceHbRsvMemRange(l_rngPtr);
@@ -980,6 +989,115 @@ errlHndl_t populate_HbRsvMem(uint64_t i_nodeId)
}
}
+
+ // SBE Communications buffer entry
+ uint64_t l_sbeCommAddr = 0x0;
+ l_label = HBRT_RSVD_MEM__SBE_COMM;
+ l_labelSize = strlen(l_label) + 1;
+ uint64_t l_sbeCommSize = SBE_MSG::SBE_COMM_BUFFER_SIZE;
+
+ // Minimum 64K size for Opal
+ size_t l_sbeCommSizeAligned = ALIGN_X( l_sbeCommSize, 64*KILOBYTE );
+
+ if(TARGETING::is_phyp_load())
+ {
+ l_sbeCommAddr = l_prevDataAddr + l_prevDataSize;
+ }
+ else if(TARGETING::is_sapphire_load())
+ {
+ l_sbeCommAddr = l_prevDataAddr - l_sbeCommSizeAligned;
+ }
+
+ // Get a pointer to the next available HDAT HB Rsv Mem entry
+ l_rngPtr = nullptr;
+ l_elog = getNextRhbAddrRange(l_rngPtr);
+ if(l_elog)
+ {
+ break;
+ }
+
+ // Fill in the entry
+ l_rngPtr->hdatRhbRngType =
+ static_cast<uint8_t>(HDAT::RHB_TYPE_HBRT);
+ l_rngPtr->hdatRhbRngId = i_nodeId;
+ l_rngPtr->hdatRhbAddrRngStrAddr =
+ l_sbeCommAddr | VmmManager::FORCE_PHYS_ADDR;
+ l_rngPtr->hdatRhbAddrRngEndAddr =
+ (l_sbeCommAddr | VmmManager::FORCE_PHYS_ADDR)
+ + l_sbeCommSizeAligned - 1 ;
+ l_rngPtr->hdatRhbLabelSize = l_labelSize;
+ memcpy( l_rngPtr->hdatRhbLabelString,
+ l_label,
+ l_labelSize );
+ l_prevDataAddr = l_sbeCommAddr;
+ l_prevDataSize = l_sbeCommSizeAligned;
+
+ traceHbRsvMemRange(l_rngPtr);
+
+
+ // SBE FFDC entry
+ uint64_t l_sbeffdcAddr = 0x0;
+ l_label = HBRT_RSVD_MEM__SBE_FFDC;
+ l_labelSize = strlen(l_label) + 1;
+ uint64_t l_sbeffdcSize =
+ SBEIO::SbePsu::getTheInstance().getSbeFFDCBufferSize();
+
+ // Minimum 64K size for Opal
+ size_t l_sbeffdcSizeAligned = ALIGN_X( l_sbeffdcSize, 64*KILOBYTE );
+
+ if(TARGETING::is_phyp_load())
+ {
+ l_sbeffdcAddr = l_prevDataAddr + l_prevDataSize;
+ }
+ else if(TARGETING::is_sapphire_load())
+ {
+ l_sbeffdcAddr = l_prevDataAddr - l_sbeffdcSizeAligned;
+ }
+
+ // Get a pointer to the next available HDAT HB Rsv Mem entry
+ l_rngPtr = nullptr;
+ l_elog = getNextRhbAddrRange(l_rngPtr);
+ if(l_elog)
+ {
+ break;
+ }
+
+ // Fill in the entry
+ l_rngPtr->hdatRhbRngType =
+ static_cast<uint8_t>(HDAT::RHB_TYPE_HBRT);
+ l_rngPtr->hdatRhbRngId = i_nodeId;
+ l_rngPtr->hdatRhbAddrRngStrAddr =
+ l_sbeffdcAddr | VmmManager::FORCE_PHYS_ADDR;
+ l_rngPtr->hdatRhbAddrRngEndAddr =
+ (l_sbeffdcAddr | VmmManager::FORCE_PHYS_ADDR)
+ + l_sbeffdcSizeAligned - 1 ;
+ l_rngPtr->hdatRhbLabelSize = l_labelSize;
+ memcpy( l_rngPtr->hdatRhbLabelString,
+ l_label,
+ l_labelSize );
+ l_prevDataAddr = l_sbeffdcAddr;
+ l_prevDataSize = l_sbeffdcSizeAligned;
+
+ traceHbRsvMemRange(l_rngPtr);
+
+ // Send Set FFDC Address for each functional proc
+ for (const auto & l_procChip: l_procChips)
+ {
+ // Call sendSetFFDCAddr, tell SBE where to write FFDC and messages
+ l_elog = SBEIO::sendSetFFDCAddr(l_sbeffdcSize,
+ l_sbeCommSize,
+ l_sbeffdcAddr,
+ l_sbeCommAddr,
+ l_procChip);
+
+ if(l_elog)
+ {
+ TRACFCOMP( g_trac_runtime,
+ "populate_HbRsvMem: sendSetFFDCAddr failed");
+
+ break;
+ }
+ }
} while(0);
TRACFCOMP( g_trac_runtime, EXIT_MRK"populate_HbRsvMem> l_elog=%.8X", ERRL_GETRC_SAFE(l_elog) );
@@ -1374,7 +1492,6 @@ errlHndl_t populate_hbTpmInfo()
} // end populate_hbTpmInfo
-
errlHndl_t populate_hbRuntimeData( void )
{
errlHndl_t l_elog = nullptr;
diff --git a/src/usr/sbeio/makefile b/src/usr/sbeio/makefile
index b6e7e1870..bd42fe8fe 100644
--- a/src/usr/sbeio/makefile
+++ b/src/usr/sbeio/makefile
@@ -41,6 +41,7 @@ OBJS += sbe_fifodd.o
OBJS += sbe_scomAccess.o
OBJS += sbe_scomAccessdd.o
OBJS += sbe_ffdc_parser.o
+OBJS += sbe_setFFDCAddr.o
SUBDIRS += test.d
SUBDIRS += runtime.d
diff --git a/src/usr/sbeio/sbe_setFFDCAddr.C b/src/usr/sbeio/sbe_setFFDCAddr.C
new file mode 100644
index 000000000..5988336f9
--- /dev/null
+++ b/src/usr/sbeio/sbe_setFFDCAddr.C
@@ -0,0 +1,105 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/usr/sbeio/sbe_setFFDCAddr.C $ */
+/* */
+/* OpenPOWER HostBoot Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2017 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+/**
+* @file sbe_setFFDCAddr.C
+* @brief Set FFDC Address inform the SBE of other
+ procs in the system.
+*/
+
+#include <config.h>
+#include <trace/interface.H>
+#include <errl/errlmanager.H>
+#include <sbeio/sbeioif.H>
+#include <sbeio/sbe_psudd.H>
+#include <targeting/common/targetservice.H>
+
+extern trace_desc_t* g_trac_sbeio;
+
+#define SBE_TRACD(printf_string,args...) \
+TRACDCOMP(g_trac_sbeio,"sendSetFFDCAddr: " printf_string,##args)
+
+#define SBE_TRACF(printf_string,args...) \
+TRACFCOMP(g_trac_sbeio,"sendSetFFDCAddr: " printf_string,##args)
+
+namespace SBEIO
+{
+
+ /**
+ * @brief Set the FFDC address for the SBE so it is aware of the FFDC buffer
+ * and its size and it is aware of the SBE Communication buffer and
+ * its size
+ *
+ * @param[in] i_sbeffdcSize uint32 Size of SBE FFDC buffer
+ * @param[in] i_sbeCommSize uint32 Size of SBE Communication buffer
+ * @param[in] i_sbeffdcAddr uint64 Physical mainstore address of FFDC buffer
+ * @param[in] i_sbeCommAddr uint64 Physical mainstore address of Comm buffer
+ * @param[in] i_procChip The proc to which you would like to send the info
+ *
+ * @return errlHndl_t Error log handle on failure.
+ *
+ */
+ errlHndl_t sendSetFFDCAddr(const uint32_t i_sbeffdcSize,
+ const uint32_t i_sbeCommSize,
+ const uint64_t i_sbeffdcAddr,
+ const uint64_t i_sbeCommAddr,
+ TARGETING::Target * i_procChip)
+ {
+ errlHndl_t errl = NULL;
+
+ SBE_TRACF(ENTER_MRK "sending set FFDC address from HB -> SBE for Proc "
+ "0x%x, FFDC at 0x%016x for %d, Comm at 0x%016x for %d",
+ i_procChip->getAttr<TARGETING::ATTR_POSITION>(),
+ i_sbeffdcAddr,
+ i_sbeffdcSize,
+ i_sbeCommAddr,
+ i_sbeCommSize);
+
+ // Create command and response structures
+ SbePsu::psuCommand l_psuCommand(
+ SbePsu::SBE_REQUIRE_RESPONSE, //control flags
+ SbePsu::SBE_PSU_GENERIC_MESSAGE, //command class
+ SbePsu::SBE_PSU_SET_FFDC_ADDRESS); //command
+ SbePsu::psuResponse l_psuResponse;
+
+ // Fill in PSU Command with Set FFDC Address information
+ l_psuCommand.cd7_setFFDCAddr_FFDCSize = i_sbeffdcSize;
+ l_psuCommand.cd7_setFFDCAddr_CommSize = i_sbeCommSize;
+ l_psuCommand.cd7_setFFDCAddr_FFDCAddr = i_sbeffdcAddr;
+ l_psuCommand.cd7_setFFDCAddr_CommAddr = i_sbeCommAddr;
+
+ // Call performPsuChipOp, tell SBE where to write FFDC and messages
+ errl = SBEIO::SbePsu::getTheInstance().performPsuChipOp(i_procChip,
+ &l_psuCommand,
+ &l_psuResponse,
+ SbePsu::MAX_PSU_SHORT_TIMEOUT_NS,
+ SbePsu::SBE_SET_FFDC_ADDR_REQ_USED_REGS,
+ SbePsu::SBE_SET_FFDC_ADDR_RSP_USED_REGS);
+
+ SBE_TRACD(EXIT_MRK "sendSetFFDCAddr");
+
+ return errl;
+ };
+
+} //end namespace SBEIO
OpenPOWER on IntegriCloud