diff options
author | Andre Marin <aamarin@us.ibm.com> | 2017-07-16 00:56:52 -0500 |
---|---|---|
committer | Christian R. Geddes <crgeddes@us.ibm.com> | 2017-07-27 18:00:19 -0400 |
commit | c85d4152d28b4a9d5eb392b2025937f6965a5100 (patch) | |
tree | 6db6ef655aeed0f279fb48c19e7a58a0d653f785 /src | |
parent | 74a5bd2d0006fe0b2e4511ccaae605b60b2d096d (diff) | |
download | talos-hostboot-c85d4152d28b4a9d5eb392b2025937f6965a5100.tar.gz talos-hostboot-c85d4152d28b4a9d5eb392b2025937f6965a5100.zip |
Added ATTR_MSS_VPD_MT_WINDAGE_RD_CTR support after SYSCLK_RESET.
Change-Id: I588b304a6694677c28196ca5161800d4ae19a21f
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43173
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: JACOB L. HARVEY <jlharvey@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/43174
Reviewed-by: Hostboot Team <hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Diffstat (limited to 'src')
5 files changed, 57 insertions, 10 deletions
diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C index 66da61305..5755589ac 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/ddr_phy.C @@ -818,9 +818,6 @@ fapi2::ReturnCode phy_scominit(const fapi2::Target<TARGET_TYPE_MCBIST>& i_target // Resets all WR VREF related registers FAPI_TRY( mss::dp16::reset_wr_vref_registers(p)); - // Reset the windage registers - FAPI_TRY( mss::dp16::reset_read_delay_offset_registers(p) ); - // Set the blue waterfall range to its initial value FAPI_TRY( mss::dp16::reset_drift_limits(p) ); diff --git a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C index 39135d317..c20cac543 100644 --- a/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C +++ b/src/import/chips/p9/procedures/hwp/memory/lib/phy/dp16.C @@ -52,6 +52,7 @@ #include <generic/memory/lib/utils/c_str.H> #include <lib/workarounds/dp16_workarounds.H> +#include <generic/memory/lib/utils/mss_math.H> using fapi2::TARGET_TYPE_MCS; using fapi2::TARGET_TYPE_MCA; @@ -2206,19 +2207,37 @@ fapi2::ReturnCode reset_read_delay_offset_registers( const fapi2::Target<TARGET_ { typedef dp16Traits<TARGET_TYPE_MCA> TT; + // Represents the number phase rotator ticks per clock + constexpr int64_t TICKS_PER_CLK = 128; + // We grab the information from the VPD and blast it in to all the registers. Note the - // VPD is picoseconds but the register wants clocks - so we convert. Likewise, the VPD + // VPD is picoseconds but the register wants phase rotator ticks - so we convert. Likewise, the VPD // is per port so we can easily cram the data in to the port using the blastah. fapi2::buffer<uint64_t> l_data; - int64_t l_clocks = 0; + int64_t l_phase_rot_ticks = 0; int16_t l_windage = 0; + int64_t l_tck_in_ps = 0; + uint64_t l_freq = 0; + + + FAPI_TRY( mss::vpd_mt_windage_rd_ctr(i_target, l_windage), + "Failed vpd_mt_windage_rd_ctr accessor for %s", mss::c_str(i_target) ); - FAPI_TRY( mss::vpd_mt_windage_rd_ctr(i_target, l_windage) ); - l_clocks = mss::ps_to_cycles(i_target, l_windage); + FAPI_TRY( mss::freq(mss::find_target<fapi2::TARGET_TYPE_MCBIST>(i_target), l_freq), + "Failed freq accessor for %s", mss::c_str(i_target) ); + + FAPI_TRY( mss::freq_to_ps(l_freq, l_tck_in_ps), + "Failled to convert freq_to_ps for %s", mss::c_str(i_target) ); + + // Static cast to be explicit that calculation should produce a floating point result + l_phase_rot_ticks = mss::round_half_away_from_zero( (l_windage * TICKS_PER_CLK) / static_cast<double>(l_tck_in_ps) ); l_data - .insertFromRight<TT::READ_OFFSET_LOWER, TT::READ_OFFSET_LOWER_LEN>(l_clocks) - .insertFromRight<TT::READ_OFFSET_UPPER, TT::READ_OFFSET_UPPER_LEN>(l_clocks); + .insertFromRight<TT::READ_OFFSET_LOWER, TT::READ_OFFSET_LOWER_LEN>(l_phase_rot_ticks) + .insertFromRight<TT::READ_OFFSET_UPPER, TT::READ_OFFSET_UPPER_LEN>(l_phase_rot_ticks); + + FAPI_INF( "vpd_mt_windage_rd_ctr = %d, ticks = %d for %s", + l_windage, l_phase_rot_ticks, mss::c_str(i_target) ); FAPI_TRY( mss::scom_blastah(i_target, TT::READ_DELAY_OFFSET_REG, l_data) ); diff --git a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C index a0bc1c84f..0b08a9312 100644 --- a/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C +++ b/src/import/chips/p9/procedures/hwp/memory/p9_mss_ddr_phy_reset.C @@ -150,6 +150,14 @@ extern "C" FAPI_TRY( mss::deassert_sysclk_reset(i_target), "deassert_sysclk_reset failed for %s", mss::c_str(i_target), "%s Error in p9_mss_ddr_phy_reset.C", mss::c_str(i_target) ); + // Reset the windage registers + // According to the PHY team, resetting the read delay offset must be done after SYSCLK_RESET + for( const auto& p : mss::find_targets<fapi2::TARGET_TYPE_MCA>(i_target) ) + { + FAPI_TRY( mss::dp16::reset_read_delay_offset_registers(p), + "Failed reset_read_delay_offset_registers() for %s", mss::c_str(p) ); + } + // 20. Write 8020h into the DDRPHY_ADR_SYSCLK_CNTL_PR Registers and // DDRPHY_DP16_SYSCLK_PR0/1 registers This write takes the dphy_nclk/ // SysClk alignment circuit out of the Continuous Update mode. diff --git a/src/import/generic/memory/lib/utils/mss_math.H b/src/import/generic/memory/lib/utils/mss_math.H index b4eca9485..fc9a9eb7d 100644 --- a/src/import/generic/memory/lib/utils/mss_math.H +++ b/src/import/generic/memory/lib/utils/mss_math.H @@ -44,11 +44,33 @@ namespace mss /// // TODO RTC:174277 - create unit test structure for generic/memory template<typename T > -inline constexpr T inclusive_range( const T i_start, const T i_end) +inline constexpr T inclusive_range( const T i_start, const T i_end ) { return (i_end - i_start) + 1; } +/// +/// @brief Poor man's round half away from 0 +/// @param[in] i_input starting point +/// @return rounded int64_t value +/// @note HB doesn't have std::round, referenced from: +/// https://stackoverflow.com/questions/4572556/concise-way-to-implement-round-in-c +/// +inline int64_t round_half_away_from_zero( const double i_input ) +{ + // Casting to avoid comparison of diff data types + // Explicitly casting INT64_MAX to avoid truncation of casting + // floating point to integer + if( i_input > static_cast<double>(INT64_MAX) ) + { + FAPI_ERR("Invalid input greater than %d", INT64_MAX); + fapi2::Assert(false); + } + + return ( i_input < 0.0 ? static_cast<int64_t>(i_input - 0.5) : static_cast<int64_t>(i_input + 0.5) ); +} + + }// mss #endif diff --git a/src/include/stdint.h b/src/include/stdint.h index cf30344d0..2b1ab1e3f 100644 --- a/src/include/stdint.h +++ b/src/include/stdint.h @@ -68,6 +68,7 @@ typedef ssize_t ptrdiff_t; #define UINT16_MAX (65535U) #define UINT32_MAX (4294967295U) #define UINT64_MAX (18446744073709551615U) +#define INT64_MAX (9223372036854775807U) // add (u)intptr_t support typedef long int intptr_t; |