MRW support for PCIE attributes

Add MRW parsing logic for p9_pcie_attributes.xml
Marked some attributes as deprecated before removal from ekb

Change-Id: Ie3ea06b905ce64c45b6c062fd91cf4642c88677e
RTC: 161061
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/30576
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
Reviewed-by: Matt Derksen <v2cibmd@us.ibm.com>
Reviewed-by: Martin Gloff <mgloff@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>

3 files changed, 106 insertions, 145 deletions

diff --git a/src/usr/targeting/common/genHwsvMrwXml.pl b/src/usr/targeting/common/genHwsvMrwXml.pl
index 1188809c4..2b5b313c2 100755
--- a/src/usr/targeting/common/genHwsvMrwXml.pl
+++ b/src/usr/targeting/common/genHwsvMrwXml.pl
@@ -731,62 +731,14 @@ sub pcie_init ($)
 }
 
 # Repeated [NODE, POS, ATTR, IOP0-VAL, IOP1-VAL, ATTR, IOP0-VAL, IOP1-VAL]
-my @procPcie;
+my @pecPcie;
 foreach my $proc (@{$ProcPcie->{'processor-settings'}})
 {
     # determine values of proc pcie attributes
     pcie_init($proc);
 
-    push @procPcie, [$proc->{target}->{node},
-                     $proc->{target}->{position},
-                     "PROC_PCIE_IOP_G2_PLL_CONTROL0",
-                     $proc->{proc_pcie_iop_g2_pll_control0_iop0},
-                     $proc->{proc_pcie_iop_g2_pll_control0_iop1},
-                     "PROC_PCIE_IOP_G3_PLL_CONTROL0",
-                     $proc->{proc_pcie_iop_g3_pll_control0_iop0},
-                     $proc->{proc_pcie_iop_g3_pll_control0_iop1},
-                     "PROC_PCIE_IOP_PCS_CONTROL0",
-                     $proc->{proc_pcie_iop_pcs_control0_iop0},
-                     $proc->{proc_pcie_iop_pcs_control0_iop1},
-                     "PROC_PCIE_IOP_PCS_CONTROL1",
-                     $proc->{proc_pcie_iop_pcs_control1_iop0},
-                     $proc->{proc_pcie_iop_pcs_control1_iop1},
-                     "PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0",
-                     $proc->{proc_pcie_iop_pll_global_control0_iop0},
-                     $proc->{proc_pcie_iop_pll_global_control0_iop1},
-                     "PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1",
-                     $proc->{proc_pcie_iop_pll_global_control1_iop0},
-                     $proc->{proc_pcie_iop_pll_global_control1_iop1},
-                     "PROC_PCIE_IOP_RX_PEAK",
-                     $proc->{proc_pcie_iop_rx_peak_iop0},
-                     $proc->{proc_pcie_iop_rx_peak_iop1},
-                     "PROC_PCIE_IOP_RX_SDL",
-                     $proc->{proc_pcie_iop_rx_sdl_iop0},
-                     $proc->{proc_pcie_iop_rx_sdl_iop1},
-                     "PROC_PCIE_IOP_RX_VGA_CONTROL2",
-                     $proc->{proc_pcie_iop_rx_vga_control2_iop0},
-                     $proc->{proc_pcie_iop_rx_vga_control2_iop1},
-                     "PROC_PCIE_IOP_TX_BWLOSS1",
-                     $proc->{proc_pcie_iop_tx_bwloss1_iop0},
-                     $proc->{proc_pcie_iop_tx_bwloss1_iop1},
-                     "PROC_PCIE_IOP_TX_FIFO_OFFSET",
-                     $proc->{proc_pcie_iop_tx_fifo_offset_iop0},
-                     $proc->{proc_pcie_iop_tx_fifo_offset_iop1},
-                     "PROC_PCIE_IOP_TX_RCVRDETCNTL",
-                     $proc->{proc_pcie_iop_tx_rcvrdetcntl_iop0},
-                     $proc->{proc_pcie_iop_tx_rcvrdetcntl_iop1},
-                     "PROC_PCIE_IOP_ZCAL_CONTROL",
-                     $proc->{proc_pcie_iop_zcal_control_iop0},
-                     $proc->{proc_pcie_iop_zcal_control_iop1},
-                     "PROC_PCIE_IOP_TX_FFE_GEN1",
-                     $proc->{proc_pcie_iop_tx_ffe_gen1_iop0},
-                     $proc->{proc_pcie_iop_tx_ffe_gen1_iop1},
-                     "PROC_PCIE_IOP_TX_FFE_GEN2",
-                     $proc->{proc_pcie_iop_tx_ffe_gen2_iop0},
-                     $proc->{proc_pcie_iop_tx_ffe_gen2_iop1}];
 }
 
-my @SortedPcie = sort byNodePos @procPcie;
 
 #------------------------------------------------------------------------------
 # Process the chip-ids MRW file
@@ -4684,6 +4636,55 @@ sub generate_pec
 
     calcAndAddFapiPos("pec",$affinityPath,$pec,$fapiPosHr);
 
+    # fill in the PCIE attributes
+    my %pciAttr;
+    $pciAttr{"PROC_PCIE_PCS_RX_CDR_GAIN"} = 'proc_pcie_pcs_rx_cdr_gain';
+    $pciAttr{"PROC_PCIE_PCS_RX_LOFF_CONTROL"} = 'proc_pcie_pcs_rx_loff_control';
+    $pciAttr{"PROC_PCIE_PCS_RX_VGA_CONTRL_REGISTER3"} = 'proc_pcie_pcs_rx_vga_control_register3';
+    $pciAttr{"PROC_PCIE_PCS_RX_ROT_CDR_LOOKAHEAD"} = 'proc_pcie_pcs_rx_rot_cdr_lookahead';
+    $pciAttr{"PROC_PCIE_PCS_PCLCK_CNTL_PLLA"} = 'proc_pcie_pcs_pclck_cntl_plla';
+    $pciAttr{"PROC_PCIE_PCS_PCLCK_CNTL_PLLB"} = 'proc_pcie_pcs_pclck_cntl_pllb';
+    $pciAttr{"PROC_PCIE_PCS_TX_DCLCK_ROT"} = 'proc_pcie_pcs_tx_dclck_rot_ovr';
+    $pciAttr{"PROC_PCIE_PCS_TX_FIFO_CONFIG_OFFSET"} = 'proc_pcie_pcs_tx_fifo_config_offset';
+    $pciAttr{"PROC_PCIE_PCS_TX_POWER_SEQ_ENABLE"} = 'proc_pcie_pcs_tx_power_seq_enable';
+    $pciAttr{"PROC_PCIE_PCS_RX_PHASE_ROTATOR_CNTL"} = 'proc_pcie_pcs_rx_phase_rot_cntl';
+    $pciAttr{"PROC_PCIE_PCS_RX_VGA_CNTL_REG1"} = 'proc_pcie_pcs_rx_vga_cntl_reg1';
+    $pciAttr{"PROC_PCIE_PCS_RX_VGA_CNTL_REG2"} = 'proc_pcie_pcs_rx_vga_cntl_reg2';
+    $pciAttr{"PROC_PCIE_PCS_RX_SIGDET_CNTL"} = 'proc_pcie_pcs_rx_sigdet_cntl';
+    $pciAttr{"PROC_PCIE_PCS_RX_ROT_CDR_SSC"} = 'proc_pcie_pcs_rx_rot_cdr_ssc';
+    $pciAttr{"PROC_PCIE_PCS_TX_PCIE_RECV_DETECT_CNTL_REG2"} = 'proc_pcie_pcs_tx_pcie_recv_detect_cntl_reg2';
+    #Below are broken in current fips build-@fixme-RTC:161897
+    #$pciAttr{"PROC_PCIE_PCS_TX_PCIE_RECV_DETECT_CNTL_REG1"} = 'proc_pcie_pcs_tx_pcie_recv_detect_cntl_reg1';
+    #$pciAttr{"PROC_PCIE_PCS_SYSTEM_CNTL"} = 'proc_pcie_pcs_system_cntl';
+    #$pciAttr{"PROC_PCIE_PCS_M_CNTL"} = 'proc_pcie_pcs_m_cntl';
+
+
+    # XML has this structure (iop==pec):
+    #   <processor-settings>
+    #     <target><name>pu</name><node>0</node><position>0</position></target>
+    #       <attributename_iop0>data,data,data</attributename_iop0>
+    #       <attributename_iop1>data,data,data</attributename_iop1>
+    #       <attributename_iop2>data,data,data</attributename_iop2>
+    foreach my $procsetting (@{$ProcPcie->{'processor-settings'}})
+    {
+        # only look at the values for my proc
+        if( !(($procsetting->{'target'}->{'node'} == $node)
+              && ($procsetting->{'target'}->{'position'} == $proc)) )
+        {
+            next;
+        }
+
+        foreach my $attr ( keys %pciAttr)
+        {
+            my $mrwname = $pciAttr{$attr}."_iop$pec";
+            print "
+    <attribute>
+        <id>$attr</id>
+        <default>$procsetting->{$mrwname}</default>
+    </attribute>\n";
+        }
+    }
+
     # call to do any fsp per-pec attributes
     do_plugin('fsp_pec', $proc, $pec, $ordinalId );
 
diff --git a/src/usr/targeting/common/xmltohb/attribute_types.xml b/src/usr/targeting/common/xmltohb/attribute_types.xml
index cef38c4f6..f86b1c025 100644
--- a/src/usr/targeting/common/xmltohb/attribute_types.xml
+++ b/src/usr/targeting/common/xmltohb/attribute_types.xml
@@ -12644,19 +12644,17 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-    <id>PROC_PCIE_REFCLOCK_ENABLE</id>
+    <id>PROC_PCIE_REFCLOCK_ENABLE</id><!-- @deprecated -->
     <description>PCIE refclock enable valid mask
+      PCIE refclock enable valid mask
       creator: platform
-      consumer: proc_pcie_scominit
-      firmware notes:
-        Bit mask defining state of refclock drive enables
-        bit0=PCI0, bit1=PCI1, bit2=PCI2, bit3=PCI3
+      consumer: p9_pcie_scominit
     </description>
     <simpleType>
        <uint8_t>
        </uint8_t>
     </simpleType>
-    <persistency>non-volatile</persistency>
+    <persistency>volatile-zeroed</persistency>
     <readable/>
     <hwpfToHbAttrMap>
         <id>ATTR_PROC_PCIE_REFCLOCK_ENABLE</id>
@@ -22333,7 +22331,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
+  <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22344,7 +22342,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
@@ -22353,7 +22351,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
+  <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22364,7 +22362,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
@@ -22373,7 +22371,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
+  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22384,7 +22382,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
@@ -22393,7 +22391,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
+  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22404,7 +22402,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
@@ -22413,7 +22411,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
+  <id>PROC_PCIE_IOP_PCS_CONTROL0</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22425,7 +22423,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL0</id>
@@ -22434,7 +22432,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
+  <id>PROC_PCIE_IOP_PCS_CONTROL1</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22446,7 +22444,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL1</id>
@@ -22455,7 +22453,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
+  <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22468,7 +22466,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
@@ -22477,7 +22475,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
+  <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22490,7 +22488,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
@@ -22499,7 +22497,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
+  <id>PROC_PCIE_IOP_TX_BWLOSS1</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22512,7 +22510,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_TX_BWLOSS1</id>
@@ -22521,7 +22519,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
+  <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22534,7 +22532,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
@@ -22543,7 +22541,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_RX_PEAK</id>
+  <id>PROC_PCIE_IOP_RX_PEAK</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22556,7 +22554,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_RX_PEAK</id>
@@ -22565,7 +22563,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_RX_SDL</id>
+  <id>PROC_PCIE_IOP_RX_SDL</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22578,7 +22576,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_RX_SDL</id>
@@ -22587,7 +22585,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
+  <id>PROC_PCIE_IOP_ZCAL_CONTROL</id><!-- @deprecated -->
   <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22598,7 +22596,7 @@ Measured in GB</description>
   <simpleType>
       <uint32_t></uint32_t>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_ZCAL_CONTROL</id>
@@ -22607,7 +22605,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_TX_FFE_GEN1</id>
+  <id>PROC_PCIE_IOP_TX_FFE_GEN1</id><!-- @deprecated -->
     <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22619,7 +22617,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN1</id>
@@ -22628,7 +22626,7 @@ Measured in GB</description>
 </attribute>
 
 <attribute>
-  <id>PROC_PCIE_IOP_TX_FFE_GEN2</id>
+  <id>PROC_PCIE_IOP_TX_FFE_GEN2</id><!-- @deprecated -->
     <description>
       creator: platform (MRW)
       consumer: p9_pcie_scominit
@@ -22640,7 +22638,7 @@ Measured in GB</description>
       <uint32_t></uint32_t>
       <array>16</array>
   </simpleType>
-  <persistency>non-volatile</persistency>
+  <persistency>volatile-zeroed</persistency>
   <readable/>
   <hwpfToHbAttrMap>
       <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN2</id>
diff --git a/src/usr/targeting/common/xmltohb/target_types.xml b/src/usr/targeting/common/xmltohb/target_types.xml
index 83e2b4c4e..51def4241 100755
--- a/src/usr/targeting/common/xmltohb/target_types.xml
+++ b/src/usr/targeting/common/xmltohb/target_types.xml
@@ -970,26 +970,20 @@
 
     <attribute><id>ECID</id></attribute>
     <attribute><id>I2C_SLAVE_ADDRESS</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_PHB</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_IOP</id></attribute>
-    <attribute><id>PROC_PCIE_NUM_LANES</id></attribute>
-    <attribute><id>PROC_DCM_INSTALLED</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_PEAK</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_SDL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_BWLOSS1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute>
-    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_PHB</id>
+        <default>3</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_IOP</id>
+        <default>2</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_LANES</id>
+        <default>24</default>
+    </attribute>
     <attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute>
+    <attribute><id>PROC_DCM_INSTALLED</id></attribute>
     <attribute><id>XSCOM_BASE_ADDRESS</id></attribute>
     <attribute><id>PSTATEGPE_BOOT_COPIER_IVPR_OFFSET</id></attribute>
     <attribute><id>STOPGPE_BOOT_COPIER_IVPR_OFFSET</id></attribute>
@@ -1251,7 +1245,7 @@
     <attribute><id>PROC_PERV_BNDY_PLL_DATA</id></attribute>
     <attribute><id>DEVICE_ID</id></attribute>
     <attribute><id>TOD_CPU_DATA</id></attribute>
-</targetType>
+</targetType><!-- chip-processor-power9 -->
 
 <!-- chip-processor-nimbus -->
 <targetType>
@@ -1261,23 +1255,7 @@
         <id>MODEL</id>
         <default>NIMBUS</default>
     </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_PHB</id>
-        <default>3</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_IOP</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_LANES</id>
-        <default>24</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xE0</default>
-    </attribute>
-</targetType>
+</targetType><!-- chip-processor-nimbus -->
 
 <!-- chip-processor-cumulus -->
 <targetType>
@@ -1287,22 +1265,6 @@
         <id>MODEL</id>
         <default>CUMULUS</default>
     </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_PHB</id>
-        <default>3</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_IOP</id>
-        <default>2</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_NUM_LANES</id>
-        <default>24</default>
-    </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xE0</default>
-    </attribute>
 </targetType>
 
 <!-- p9 sub-units -->
@@ -1966,10 +1928,6 @@
         <id>TYPE</id>
         <default>PEC</default>
     </attribute>
-    <attribute>
-        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
-        <default>0xE0</default>
-    </attribute>
     <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
     <attribute><id>SCRATCH_UINT8_1</id><default>5</default></attribute>
     <attribute><id>PARENT_PERVASIVE</id></attribute>
@@ -1993,8 +1951,10 @@
     <attribute><id>PROC_PCIE_PCS_RX_SIGDET_CNTL</id></attribute>
     <attribute><id>PROC_PCIE_PCS_SYSTEM_CNTL</id></attribute>
     <attribute><id>PROC_PCIE_PCS_M_CNTL</id></attribute>
-
     <attribute><id>PROC_PCIE_IOP_SWAP</id></attribute>
+
+    <!-- @deprecated - Remove when EKB is updated -->
+    <attribute><id>PROC_PCIE_REFCLOCK_ENABLE</id></attribute>
     <attribute><id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id></attribute>
     <attribute><id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id></attribute>
     <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id></attribute>
@@ -2011,8 +1971,10 @@
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute>
     <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
     <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
+    <!-- end @deprecated -->
+
     <attribute><id>CDM_DOMAIN</id><default>IO</default></attribute>
-</targetType>
+</targetType><!-- unit-pec-power9 -->
 
 <!-- PHB
      Nimbus : 6 per PEC (total of 18 per chip)
@@ -2042,7 +2004,7 @@
     <attribute><id>PROC_PCIE_LANE_EQUALIZATION_GEN3</id></attribute>
     <attribute><id>PROC_PCIE_LANE_EQUALIZATION_GEN4</id></attribute>
 
-</targetType>
+</targetType><!-- unit-phb-power9 -->
 
 <targetType>
     <id>unit-phb-nimbus</id>