HostBoot Interrupt RP error not being handled

Change-Id: I301e496a64e9765871b95260ab59bf2dfc9c0370
RTC:106247
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/10771
Tested-by: Jenkins Server
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>

1 files changed, 22 insertions, 27 deletions

diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C
index b602d5d69..8f8287446 100644
--- a/src/usr/intr/intrrp.C
+++ b/src/usr/intr/intrrp.C
@@ -843,39 +843,34 @@ errlHndl_t IntrRp::initIRSCReg(TARGETING::Target * i_target)
         // This also sets the source isn and PIR destination
         // such that if an interrupt is pending when when the ISRN
         // is written, simics get the right destination for the
-        // interrupt.
+        // interrupt.  err is from deviceWrite(...)
         err = maskXIVR(i_target);
 
-        // Setup PHBISR
-        // EN.TPC.PSIHB.PSIHB_ISRN_REG set to 0x00030003FFFF0000
-        PSIHB_ISRN_REG_t reg;
-
-        PIR_t pir(0);
-        pir.nodeId = node;
-        pir.chipId = chip;
-        // IRSN must be unique for each processor chip
-        reg.irsn = makeXISR(pir,0);
-        reg.die  = PSIHB_ISRN_REG_t::ENABLE;
-        reg.uie  = PSIHB_ISRN_REG_t::ENABLE;
-        reg.mask = PSIHB_ISRN_REG_t::IRSN_MASK;
+        if(!err)
+        {
+            // Setup PHBISR
+            // EN.TPC.PSIHB.PSIHB_ISRN_REG set to 0x00030003FFFF0000
+            PSIHB_ISRN_REG_t reg;
 
-        TRACFCOMP(g_trac_intr,"PSIHB_ISRN_REG: 0x%016lx",reg.d64);
+            PIR_t pir(0);
+            pir.nodeId = node;
+            pir.chipId = chip;
+            // IRSN must be unique for each processor chip
+            reg.irsn = makeXISR(pir,0);
+            reg.die  = PSIHB_ISRN_REG_t::ENABLE;
+            reg.uie  = PSIHB_ISRN_REG_t::ENABLE;
+            reg.mask = PSIHB_ISRN_REG_t::IRSN_MASK;
 
-        err = deviceWrite
-            ( i_target,
-              &reg,
-              scom_len,
-              DEVICE_SCOM_ADDRESS(PSIHB_ISRN_REG_t::PSIHB_ISRN_REG));
+            TRACFCOMP(g_trac_intr,"PSIHB_ISRN_REG: 0x%016lx",reg.d64);
 
-        if(err)
-        {
-            // add callout
-            err->addHwCallout(i_target,
-                              HWAS::SRCI_PRIORITY_HIGH,
-                              HWAS::DECONFIG,
-                              HWAS::GARD_NULL);
+            err = deviceWrite
+                ( i_target,
+                  &reg,
+                  scom_len,
+                  DEVICE_SCOM_ADDRESS(PSIHB_ISRN_REG_t::PSIHB_ISRN_REG));
         }
-        else
+
+        if(!err)
         {
             iv_chipList.push_back(i_target);
         }