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authorDoug Gilbert <dgilbert@us.ibm.com>2013-09-10 14:03:39 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-09-12 16:33:29 -0500
commit91e85b80c733bbf8f34df591ff04ce845f70b332 (patch)
tree2b6f2a37152d158b28a02de75001f0ebe2ac7614 /src/usr
parent7d14631253d5cd41782bc7b58751480b07b8d684 (diff)
downloadtalos-hostboot-91e85b80c733bbf8f34df591ff04ce845f70b332.tar.gz
talos-hostboot-91e85b80c733bbf8f34df591ff04ce845f70b332.zip
Issues found by BEAM in intr and mbox 09/2013
RTC: 84061 Change-Id: Id8ada454f69bd6b2f955d2e9eae42bc8016fd11e Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6101 Tested-by: Jenkins Server Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rw-r--r--src/usr/intr/intrrp.C2
-rw-r--r--src/usr/mbox/mailboxsp.C1
-rw-r--r--src/usr/mbox/mboxdd.C18
3 files changed, 11 insertions, 10 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C
index a07fb980c..ee982d10a 100644
--- a/src/usr/intr/intrrp.C
+++ b/src/usr/intr/intrrp.C
@@ -662,7 +662,7 @@ errlHndl_t IntrRp::getNxIRSN(TARGETING::Target * i_target, uint32_t& o_irsn)
o_irsn = ((static_cast<uint32_t>(reg >> NX_IRSN_COMP_SHIFT)
& NX_IRSN_COMP_MASK) &
((static_cast<uint32_t>(reg >> NX_IRSN_MASK_SHIFT)
- & NX_IRSN_MASK_MASK) || NX_IRSN_UPPER_MASK));
+ & NX_IRSN_MASK_MASK) | NX_IRSN_UPPER_MASK));
}while(0);
diff --git a/src/usr/mbox/mailboxsp.C b/src/usr/mbox/mailboxsp.C
index e79b9faeb..5a354f764 100644
--- a/src/usr/mbox/mailboxsp.C
+++ b/src/usr/mbox/mailboxsp.C
@@ -879,6 +879,7 @@ void MailboxSp::recv_msg(mbox_msg_t & i_mbox_msg)
// Tell the FSP mbox about it and log an error
invalidMsgResponder(i_mbox_msg);
free(msg->extra_data); // toss this if it exists
+ msg->extra_data = NULL;
}
msg_free(msg);
}
diff --git a/src/usr/mbox/mboxdd.C b/src/usr/mbox/mboxdd.C
index 8398c7ba4..9059dcb03 100644
--- a/src/usr/mbox/mboxdd.C
+++ b/src/usr/mbox/mboxdd.C
@@ -283,8 +283,8 @@ errlHndl_t mboxRead(TARGETING::Target* i_target,void *o_buffer,
while (cur_reg_cntr < l_numRegsToRead)
{
l_err = deviceOp(DeviceFW::READ,i_target,
- l_data,l_64bitSize,
- DEVICE_XSCOM_ADDRESS(MBOX_DATA_LBUS_START+cur_reg_cntr));
+ l_data,l_64bitSize,
+ DEVICE_XSCOM_ADDRESS(MBOX_DATA_LBUS_START+cur_reg_cntr));
if (l_err)
{
TRACFCOMP(g_trac_mbox, ERR_MRK "mboxRead> Unable to read Data Area Register 0x%X",MBOX_DATA_LBUS_START+cur_reg_cntr);
@@ -295,17 +295,17 @@ errlHndl_t mboxRead(TARGETING::Target* i_target,void *o_buffer,
// buffer.
// If this is the last register we need to read and we are not word aligned
- if ((cur_reg_cntr -1 == l_numRegsToRead) &&
- (l_numBytesLeft != 0))
+ if (((cur_reg_cntr + 1) == l_numRegsToRead) &&
+ (l_numBytesLeft != 0))
{
- // Only copy the number of bytes remaining..
- memcpy( local_buf + cur_reg_cntr,
- &l_data[0], l_numBytesLeft);
+ // Only copy the number of bytes remaining..
+ memcpy( local_buf + cur_reg_cntr,
+ &l_data[0], l_numBytesLeft);
}
// normal copy path.. copy the entire word.
else
{
- memcpy( local_buf + cur_reg_cntr, &l_data[0], sizeof(uint32_t));
+ memcpy( local_buf + cur_reg_cntr, &l_data[0], sizeof(uint32_t));
}
cur_reg_cntr++;
@@ -457,7 +457,7 @@ errlHndl_t mboxWrite(TARGETING::Target* i_target,void* i_buffer,
{
// If this is the last register we need to write and are not word aligned
- if ((cur_reg_cntr -1 == l_numRegsToWrite) &&
+ if (((cur_reg_cntr + 1) == l_numRegsToWrite) &&
(l_numBytesLeft != 0))
{
// zero out the data reg.
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