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authorThi Tran <thi@us.ibm.com>2013-09-15 07:42:35 -0500
committerA. Patrick Williams III <iawillia@us.ibm.com>2013-09-16 11:28:21 -0500
commit627594c6e7d85c58ea7c9174e914ea8378e7ca89 (patch)
tree8b7181cd8725ddff708dfdf31b183d64dbfb1ccf /src/usr
parentda0a1bddce7a3876ed61cd35253e8b5e1b4321e3 (diff)
downloadtalos-hostboot-627594c6e7d85c58ea7c9174e914ea8378e7ca89.tar.gz
talos-hostboot-627594c6e7d85c58ea7c9174e914ea8378e7ca89.zip
Hostboot - Updated HWPs from defect SW223949 FIR init changes
Change-Id: I0b39cf16df678e63e2f3b9e2c0f945b4d3ba7c2b CQ: SW223949 Reviewed-on: http://gfw160.austin.ibm.com:8080/gerrit/6167 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
Diffstat (limited to 'src/usr')
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H13
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H5
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H13
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C65
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H57
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H150
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C46
-rwxr-xr-xsrc/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H54
8 files changed, 183 insertions, 220 deletions
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H
index 3a98b2ea1..af89524d8 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_firinit.H,v 1.10 2013/08/02 19:18:00 stillgs Exp $
+// $Id: p8_pm_firinit.H,v 1.11 2013/08/26 12:42:40 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_firinit.H,v $
//------------------------------------------------------------------------------
// *|
@@ -82,6 +82,7 @@
#define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
#define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
#define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
+#define CLEAR_FIR_MASK(b){SET_FIR_MASK(b,0);}
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode (*p8_pm_firinit_FP_t) (const fapi::Target& , uint32_t);
@@ -97,11 +98,11 @@ extern "C" {
/// \calls p8_pm_occ_firinit
-const uint32_t PCB_FIR_REGISTER_LENGTH = 43 ;
-const uint32_t PMC_FIR_REGISTER_LENGTH = 49 ;
-const uint32_t PBA_FIR_REGISTER_LENGTH = 46 ;
-const uint32_t OHA_FIR_REGISTER_LENGTH = 6 ;
-const uint32_t OCC_FIR_REGISTER_LENGTH = 64 ;
+//const uint32_t PCB_FIR_REGISTER_LENGTH = 43 ;
+//const uint32_t PMC_FIR_REGISTER_LENGTH = 49 ;
+//const uint32_t PBA_FIR_REGISTER_LENGTH = 46 ;
+//const uint32_t OHA_FIR_REGISTER_LENGTH = 6 ;
+//const uint32_t OCC_FIR_REGISTER_LENGTH = 64 ;
//------------------------------------------------------------------------------
/**
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H
index 767b16c02..d3f23b76f 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_occ_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_occ_firinit.H,v 1.6 2013/04/01 04:27:49 stillgs Exp $
+// $Id: p8_pm_occ_firinit.H,v 1.7 2013/08/26 12:44:32 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_occ_firinit.H,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2012
@@ -43,6 +43,9 @@
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode (*p8_pm_occ_firinit_FP_t) (const fapi::Target& , uint32_t mode);
+const uint32_t OCC_FIR_REGISTER_LENGTH = 64 ;
+
+
extern "C" {
//------------------------------------------------------------------------------
// Function prototype
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H
index 57bb5b90c..e8e4e398b 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_oha_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_oha_firinit.H,v 1.5 2013/03/29 14:22:52 stillgs Exp $
+// $Id: p8_pm_oha_firinit.H,v 1.6 2013/08/26 12:44:33 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_oha_firinit.H,v $
//------------------------------------------------------------------------------
// *|
@@ -41,6 +41,17 @@
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode (*p8_pm_oha_firinit_FP_t) (const fapi::Target& , uint32_t mode );
+const uint32_t OHA_FIR_REGISTER_LENGTH = 6;
+enum OHA_FIRS
+{
+ OHA21_PPT_TIMEOUT_ERR = 0,
+ NOT_CPM_BIT_SYNCED = 1,
+ AISS_HANG_CONDITION = 2,
+ TC_TC_THERM_TRIP0 = 3,
+ TC_TC_THERM_TRIP1 = 4,
+ PCB_ERR_TO_FIR = 5
+};
+
extern "C" {
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C
index 40f5f63f1..b7b5986bd 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pba_firinit.C,v 1.15 2013/04/12 01:17:25 stillgs Exp $
+// $Id: p8_pm_pba_firinit.C,v 1.16 2013/08/26 12:44:34 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pba_firinit.C,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -75,17 +75,6 @@ using namespace fapi;
CONST_UINT64_T( PBA_FIR_MASK_WR_AND_0x02010844 , ULL(0x02010844)) ;
CONST_UINT64_T( PBA_FIR_MASK_WR_OR_0x02010845 , ULL(0x02010845)) ;
-
-// ----------------------------------------------------------------------
-// Macro definitions
-// ----------------------------------------------------------------------
-
-// #define SET_CHECK_STOP(b){SET_FIR_ACTION(b, 0, 0);}
-// #define SET_RECOV_ATTN(b){SET_FIR_ACTION(b, 0, 1);}
-// #define SET_RECOV_INTR(b){SET_FIR_ACTION(b, 1, 0);}
-// #define SET_MALF_ALERT(b){SET_FIR_ACTION(b, 1, 1);}
-// #define SET_FIR_MASKED(b){SET_FIR_MASK(b,1);}
-
// ----------------------------------------------------------------------
// Global variables
// ----------------------------------------------------------------------
@@ -115,57 +104,7 @@ p8_pm_pba_firinit(const fapi::Target& i_target , uint32_t mode )
ecmdDataBufferBase mask(64);
uint32_t e_rc = 0;
- enum PBA_FIRS
- {
- PBAFIR_OCI_APAR_ERR =0 ,
- PBAFIR_PB_RDADRERR_FW =1 ,
- PBAFIR_PB_RDDATATO_FW =2 ,
- PBAFIR_PB_SUE_FW =3 ,
- PBAFIR_PB_UE_FW =4 ,
- PBAFIR_PB_CE_FW =5 ,
- PBAFIR_OCI_SLAVE_INIT =6 ,
- PBAFIR_OCI_WRPAR_ERR =7 ,
- PBAFIR_OCI_REREQTO =8 ,
- PBAFIR_PB_UNEXPCRESP =9 ,
- PBAFIR_PB_UNEXPDATA =10 ,
- PBAFIR_PB_PARITY_ERR =11 ,
- PBAFIR_PB_WRADRERR_FW =12 ,
- PBAFIR_PB_BADCRESP =13 ,
- PBAFIR_PB_ACKDEAD_FW_RD =14 ,
- PBAFIR_PB_CRESPTO =15 ,
- PBAFIR_BCUE_SETUP_ERR =16 ,
- PBAFIR_BCUE_PB_ACK_DEAD =17 ,
- PBAFIR_BCUE_PB_ADRERR =18 ,
- PBAFIR_BCUE_OCI_DATERR =19 ,
- PBAFIR_BCDE_SETUP_ERR =20 ,
- PBAFIR_BCDE_PB_ACK_DEAD =21 ,
- PBAFIR_BCDE_PB_ADRERR =22 ,
- PBAFIR_BCDE_RDDATATO_ERR =23 ,
- PBAFIR_BCDE_SUE_ERR =24 ,
- PBAFIR_BCDE_UE_ERR =25 ,
- PBAFIR_BCDE_CE =26 ,
- PBAFIR_BCDE_OCI_DATERR =27 ,
- PBAFIR_INTERNAL_ERR =28 ,
- PBAFIR_ILLEGAL_CACHE_OP =29 ,
- PBAFIR_OCI_BAD_REG_ADDR =30 ,
- PBAFIR_AXPUSH_WRERR =31 ,
- PBAFIR_AXRCV_DLO_ERR =32 ,
- PBAFIR_AXRCV_DLO_TO =33 ,
- PBAFIR_AXRCV_RSVDATA_TO =34 ,
- PBAFIR_AXFLOW_ERR =35 ,
- PBAFIR_AXSND_DHI_RTYTO =36 ,
- PBAFIR_AXSND_DLO_RTYTO =37 ,
- PBAFIR_AXSND_RSVTO =38 ,
- PBAFIR_AXSND_RSVERR =39 ,
- PBAFIR_PB_ACKDEAD_FW_WR =40 ,
- PBAFIR_RESERVED_41 =41 ,
- PBAFIR_RESERVED_42 =42 ,
- PBAFIR_RESERVED_43 =43 ,
- PBAFIR_FIR_PARITY_ERR2 =44 ,
- PBAFIR_FIR_PARITY_ERR =45
- };
-
-
+
FAPI_DBG("Executing p8_pm_pba_firinit ....");
do
{
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H
index a376c7c8e..b2e75e74c 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pba_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pba_firinit.H,v 1.6 2013/04/01 04:27:50 stillgs Exp $
+// $Id: p8_pm_pba_firinit.H,v 1.7 2013/08/26 12:44:35 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pba_firinit.H,v $
//------------------------------------------------------------------------------
// *|
@@ -41,6 +41,57 @@
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode (*p8_pm_pba_firinit_FP_t) (const fapi::Target& , uint32_t mode);
+const uint32_t PBA_FIR_REGISTER_LENGTH = 46 ;
+enum PBA_FIRS
+{
+ PBAFIR_OCI_APAR_ERR = 0 ,
+ PBAFIR_PB_RDADRERR_FW = 1 ,
+ PBAFIR_PB_RDDATATO_FW = 2 ,
+ PBAFIR_PB_SUE_FW = 3 ,
+ PBAFIR_PB_UE_FW = 4 ,
+ PBAFIR_PB_CE_FW = 5 ,
+ PBAFIR_OCI_SLAVE_INIT = 6 ,
+ PBAFIR_OCI_WRPAR_ERR = 7 ,
+ PBAFIR_OCI_REREQTO = 8 ,
+ PBAFIR_PB_UNEXPCRESP = 9 ,
+ PBAFIR_PB_UNEXPDATA = 10,
+ PBAFIR_PB_PARITY_ERR = 11,
+ PBAFIR_PB_WRADRERR_FW = 12,
+ PBAFIR_PB_BADCRESP = 13,
+ PBAFIR_PB_ACKDEAD_FW_RD = 14,
+ PBAFIR_PB_CRESPTO = 15,
+ PBAFIR_BCUE_SETUP_ERR = 16,
+ PBAFIR_BCUE_PB_ACK_DEAD = 17,
+ PBAFIR_BCUE_PB_ADRERR = 18,
+ PBAFIR_BCUE_OCI_DATERR = 19,
+ PBAFIR_BCDE_SETUP_ERR = 20,
+ PBAFIR_BCDE_PB_ACK_DEAD = 21,
+ PBAFIR_BCDE_PB_ADRERR = 22,
+ PBAFIR_BCDE_RDDATATO_ERR = 23,
+ PBAFIR_BCDE_SUE_ERR = 24,
+ PBAFIR_BCDE_UE_ERR = 25,
+ PBAFIR_BCDE_CE = 26,
+ PBAFIR_BCDE_OCI_DATERR = 27,
+ PBAFIR_INTERNAL_ERR = 28,
+ PBAFIR_ILLEGAL_CACHE_OP = 29,
+ PBAFIR_OCI_BAD_REG_ADDR = 30,
+ PBAFIR_AXPUSH_WRERR = 31,
+ PBAFIR_AXRCV_DLO_ERR = 32,
+ PBAFIR_AXRCV_DLO_TO = 33,
+ PBAFIR_AXRCV_RSVDATA_TO = 34,
+ PBAFIR_AXFLOW_ERR = 35,
+ PBAFIR_AXSND_DHI_RTYTO = 36,
+ PBAFIR_AXSND_DLO_RTYTO = 37,
+ PBAFIR_AXSND_RSVTO = 38,
+ PBAFIR_AXSND_RSVERR = 39,
+ PBAFIR_PB_ACKDEAD_FW_WR = 40,
+ PBAFIR_RESERVED_41 = 41,
+ PBAFIR_RESERVED_42 = 42,
+ PBAFIR_RESERVED_43 = 43,
+ PBAFIR_FIR_PARITY_ERR2 = 44,
+ PBAFIR_FIR_PARITY_ERR = 45
+};
+
extern "C" {
//------------------------------------------------------------------------------
@@ -50,13 +101,13 @@ extern "C" {
//------------------------------------------------------------------------------
// function: FAPI p8_pm_pba_firinit HWP entry point
// operates on chips passed in i_target argument to perform
-// desired settings of FIRS of OHA macro
+// desired settings of FIRS of OHA macro
// parameters: i_target => chip target
// returns: FAPI_RC_SUCCESS if all specified operations complete successfully,
// else return code for failing operation
//------------------------------------------------------------------------------
-fapi::ReturnCode
+fapi::ReturnCode
p8_pm_pba_firinit(const fapi::Target& i_target, uint32_t mode );
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H
index 853360a16..cfa0f6d37 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pcbs_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pcbs_firinit.H,v 1.4 2013/03/29 14:22:56 stillgs Exp $
+// $Id: p8_pm_pcbs_firinit.H,v 1.5 2013/08/26 12:44:36 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pcbs_firinit.H,v $
//------------------------------------------------------------------------------
// *|
@@ -39,112 +39,62 @@
#include "p8_pm_firinit.H"
-// function pointer typedef definition for HWP call support
-typedef fapi::ReturnCode (*p8_pm_pcbs_firinit_FP_t) (const fapi::Target& , uint32_t mode );
-
-
-
-// 0x010A PM Error Mask Register
-// pm_reg.pm_error_mask_lt 0..42 PCB
-// 0 RW pcbs_sleep_entry_notify_pmc_hang_err_mask Mask for this error: 1=masked, 0=not masked
-// 1 RW pcbs_sleep_entry_notify_pmc_assist_hang_err_mask Mask for this error: 1=masked, 0=not masked
-// 2 RW pcbs_sleep_entry_notify_pmc_err_mask Mask for this error: 1=masked, 0=not masked
-// 3 RW pcbs_sleep_exit_invoke_pore_err_mask Mask for this error: 1=masked, 0=not masked
-// 4 RW pcbs_winkle_entry_notify_pmc_err_mask Mask for this error: 1=masked, 0=not masked
-// 5 RW pcbs_winkle_entry_send_int_assist_err_mask Mask for this error: 1=masked, 0=not masked
-// 6 RW pcbs_winkle_exit_notify_pmc_err_mask Mask for this error: 1=masked, 0=not masked
-// 7 RW pcbs_wait_dpll_lock_err_mask Mask for this error: 1=masked, 0=not masked
-// 8 RW pcbs_spare8_err_mask Mask for this error: 1=masked, 0=not masked
-// 9 RW pcbs_winkle_exit_send_int_assist_err_mask Mask for this error: 1=masked, 0=not masked
-// 10 RW pcbs_winkle_exit_send_int_powup_assist_err_mask Mask for this error: 1=masked, 0=not masked
-// 11 RW pcbs_write_fsm_goto_reg_in_invalid_state_err_mask Mask for this error: 1=masked, 0=not masked
-// 12 RW pcbs_write_pmgp0_in_invalid_state_err_mask Mask for this error: 1=masked, 0=not masked
-// 13 RW pcbs_freq_overflow_in_pstate_mode_err_mask Mask for this error: 1=masked, 0=not masked
-// 14 RW pcbs_eco_rs_bypass_confusion_err_mask Mask for this error: 1=masked, 0=not masked
-// 15 RW pcbs_core_rs_bypass_confusion_err_mask Mask for this error: 1=masked, 0=not masked
-// 16 RW pcbs_read_lpst_in_pstate_mode_err_mask Mask for this error: 1=masked, 0=not masked
-// 17 RW pcbs_lpst_read_corr_err_mask Mask for this error: 1=masked, 0=not masked
-// 18 RW pcbs_lpst_read_uncorr_err_mask Mask for this error: 1=masked, 0=not masked
-// 19 RW pcbs_pfet_strength_overflow_err_mask Mask for this error: 1=masked, 0=not masked
-// 20 RW pcbs_vds_lookup_err_mask Mask for this error: 1=masked, 0=not masked
-// 21 RW pcbs_idle_interrupt_timeout_err_mask Mask for this error: 1=masked, 0=not masked
-// 22 RW pcbs_pstate_interrupt_timeout_err_mask Mask for this error: 1=masked, 0=not masked
-// 23 RW pcbs_global_actual_sync_interrupt_timeout_err_mask Mask for this error: 1=masked, 0=not masked
-// 24 RW pcbs_pmax_sync_interrupt_timeout_err_mask Mask for this error: 1=masked, 0=not masked
-// 25 RW pcbs_global_actual_pstate_protocol_err_mask Mask for this error: 1=masked, 0=not masked
-// 26 RW pcbs_pmax_protocol_err_mask Mask for this error: 1=masked, 0=not masked
-// 27 RW pcbs_ivrm_gross_or_fine_err_mask Mask for this error: 1=masked, 0=not masked
-// 28 RW pcbs_ivrm_range_err_mask Mask for this error: 1=masked, 0=not masked
-// 29 RW pcbs_dpll_cpm_fmin_err_mask Mask for this error: 1=masked, 0=not masked
-// 30 RW pcbs_dpll_dco_full_err_mask Mask for this error: 1=masked, 0=not masked
-// 31 RW pcbs_dpll_dco_empty_err_mask Mask for this error: 1=masked, 0=not masked
-// 32 RW pcbs_dpll_int_err_mask Mask for this error: 1=masked, 0=not masked
-// 33 RW pcbs_fmin_and_not_cpmbit_err_mask Mask for this error: 1=masked, 0=not masked
-// 34 RW pcbs_dpll_faster_than_fmax_plus_delta1_err_mask Mask for this error: 1=masked, 0=not masked
-// 35 RW pcbs_dpll_slower_than_fmin_minus_delta2_err_mask Mask for this error: 1=masked, 0=not masked
-// 36 RW pcbs_resclk_csb_instr_vector_chg_in_invalid_state_err_mask Mask for this error: 1=masked, 0=not masked
-// 37 RW pcbs_reslkc_band_boundary_chg_in_invalid_state_err_mask Mask for this error: 1=masked, 0=not masked
-// 38 RW pcbs_occ_heartbeat_loss_err_mask Mask for this error: 1=masked, 0=not masked
-// 39 RW pcbs_spare39_err_mask Mask for this error: 1=masked, 0=not masked
-// 40 RW pcbs_spare40_err_mask Mask for this error: 1=masked, 0=not masked
-// 41 RW pcbs_spare41_err_mask Mask for this error: 1=masked, 0=not masked
-// 42 RW pcbs_spare42_err_mask Mask for this error: 1=masked, 0=not masked
-
-
-enum
+const uint32_t PCB_FIR_REGISTER_LENGTH = 43 ;
+enum PCB_FIRS
{
- PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK = 0,
- PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK = 1,
- PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK = 2,
- PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK = 3,
- PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK = 4,
- PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK = 5,
- PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK = 6,
- PCBS_WAIT_DPLL_LOCK_ERR_MASK = 7,
- PCBS_SPARE8_ERR_MASK = 8,
- PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK = 9,
- PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK = 10,
- PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK = 11,
- PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK = 12,
- PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK = 13,
- PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK = 14,
- PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK = 15,
- PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK = 16,
- PCBS_LPST_READ_CORR_ERR_MASK = 17,
- PCBS_LPST_READ_UNCORR_ERR_MASK = 18,
- PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK = 19,
- PCBS_VDS_LOOKUP_ERR_MASK = 20,
- PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK = 21,
- PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK = 22,
- PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK = 23,
- PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK = 24,
- PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK = 25,
- PCBS_PMAX_PROTOCOL_ERR_MASK = 26,
- PCBS_IVRM_GROSS_OR_FINE_ERR_MASK = 27,
- PCBS_IVRM_RANGE_ERR_MASK = 28,
- PCBS_DPLL_CPM_FMIN_ERR_MASK = 29,
- PCBS_DPLL_DCO_FULL_ERR_MASK = 30,
- PCBS_DPLL_DCO_EMPTY_ERR_MASK = 31,
- PCBS_DPLL_INT_ERR_MASK = 32,
- PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK = 33,
- PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK = 34,
- PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK = 35,
- PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK = 36,
- PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK = 37,
- PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK = 38,
- PCBS_SPARE39_ERR_MASK = 39,
- PCBS_SPARE40_ERR_MASK = 40,
- PCBS_SPARE41_ERR_MASK = 41,
- PCBS_SPARE42_ERR_MASK = 42
-} ;
-
+ PCBS_SLEEP_ENTRY_NOTIFY_PMC_HANG_ERR_MASK = 0,
+ PCBS_SLEEP_ENTRY_NOTIFY_PMC_ASSIST_HANG_ERR_MASK = 1,
+ PCBS_SLEEP_ENTRY_NOTIFY_PMC_ERR_MASK = 2,
+ PCBS_SLEEP_EXIT_INVOKE_PORE_ERR_MASK = 3,
+ PCBS_WINKLE_ENTRY_NOTIFY_PMC_ERR_MASK = 4,
+ PCBS_WINKLE_ENTRY_SEND_INT_ASSIST_ERR_MASK = 5,
+ PCBS_WINKLE_EXIT_NOTIFY_PMC_ERR_MASK = 6,
+ PCBS_WAIT_DPLL_LOCK_ERR_MASK = 7,
+ PCBS_SPARE8_ERR_MASK = 8,
+ PCBS_WINKLE_EXIT_SEND_INT_ASSIST_ERR_MASK = 9,
+ PCBS_WINKLE_EXIT_SEND_INT_POWUP_ASSIST_ERR_MASK = 10,
+ PCBS_WRITE_FSM_GOTO_REG_IN_INVALID_STATE_ERR_MASK = 11,
+ PCBS_WRITE_PMGP0_IN_INVALID_STATE_ERR_MASK = 12,
+ PCBS_FREQ_OVERFLOW_IN_PSTATE_MODE_ERR_MASK = 13,
+ PCBS_ECO_RS_BYPASS_CONFUSION_ERR_MASK = 14,
+ PCBS_CORE_RS_BYPASS_CONFUSION_ERR_MASK = 15,
+ PCBS_READ_LPST_IN_PSTATE_MODE_ERR_MASK = 16,
+ PCBS_LPST_READ_CORR_ERR_MASK = 17,
+ PCBS_LPST_READ_UNCORR_ERR_MASK = 18,
+ PCBS_PFET_STRENGTH_OVERFLOW_ERR_MASK = 19,
+ PCBS_VDS_LOOKUP_ERR_MASK = 20,
+ PCBS_IDLE_INTERRUPT_TIMEOUT_ERR_MASK = 21,
+ PCBS_PSTATE_INTERRUPT_TIMEOUT_ERR_MASK = 22,
+ PCBS_GLOBAL_ACTUAL_SYNC_INTERRUPT_TIMEOUT_ERR_MASK = 23,
+ PCBS_PMAX_SYNC_INTERRUPT_TIMEOUT_ERR_MASK = 24,
+ PCBS_GLOBAL_ACTUAL_PSTATE_PROTOCOL_ERR_MASK = 25,
+ PCBS_PMAX_PROTOCOL_ERR_MASK = 26,
+ PCBS_IVRM_GROSS_OR_FINE_ERR_MASK = 27,
+ PCBS_IVRM_RANGE_ERR_MASK = 28,
+ PCBS_DPLL_CPM_FMIN_ERR_MASK = 29,
+ PCBS_DPLL_DCO_FULL_ERR_MASK = 30,
+ PCBS_DPLL_DCO_EMPTY_ERR_MASK = 31,
+ PCBS_DPLL_INT_ERR_MASK = 32,
+ PCBS_FMIN_AND_NOT_CPMBIT_ERR_MASK = 33,
+ PCBS_DPLL_FASTER_THAN_FMAX_PLUS_DELTA1_ERR_MASK = 34,
+ PCBS_DPLL_SLOWER_THAN_FMIN_MINUS_DELTA2_ERR_MASK = 35,
+ PCBS_RESCLK_CSB_INSTR_VECTOR_CHG_IN_INVALID_STATE_ERR_MASK = 36,
+ PCBS_RESLKC_BAND_BOUNDARY_CHG_IN_INVALID_STATE_ERR_MASK = 37,
+ PCBS_OCC_HEARTBEAT_LOSS_ERR_MASK = 38,
+ PCBS_SPARE39_ERR_MASK = 39,
+ PCBS_SPARE40_ERR_MASK = 40,
+ PCBS_SPARE41_ERR_MASK = 41,
+ PCBS_SPARE42_ERR_MASK = 42
+};
+// function pointer typedef definition for HWP call support
+typedef fapi::ReturnCode (*p8_pm_pcbs_firinit_FP_t) (const fapi::Target& , uint32_t mode );
extern "C" {
/// \param[in] &i_target Chip target
-
+
fapi::ReturnCode p8_pm_pcbs_firinit(const fapi::Target& i_target , uint32_t mode );
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
index 94cda8525..2d5483c53 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.C
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pmc_firinit.C,v 1.14 2013/08/02 19:19:40 stillgs Exp $
+// $Id: p8_pm_pmc_firinit.C,v 1.15 2013/08/26 12:44:38 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.C,v $
//------------------------------------------------------------------------------
// *! (C) Copyright International Business Machines Corp. 2011
@@ -102,49 +102,7 @@ p8_pm_pmc_firinit(const fapi::Target& i_target , uint32_t mode )
ecmdDataBufferBase mask(64);
uint32_t e_rc = 0;
- enum PMC_FIRS
- {
- PSTATE_OCI_MASTER_RDERR =0 ,
- PSTATE_OCI_MASTER_RDDATA_PARITY_ERR =1 ,
- PSTATE_GPST_CHECKBYTE_ERR =2 ,
- PSTATE_GACK_TO_ERR =3 ,
- PSTATE_PIB_MASTER_NONOFFLINE_ERR =4 ,
- PSTATE_PIB_MASTER_OFFLINE_ERR =5 ,
- PSTATE_OCI_MASTER_TO_ERR =6 ,
- PSTATE_INTERCHIP_UE_ERR =7 ,
- PSTATE_INTERCHIP_ERRORFRAME_ERR =8 ,
- PSTATE_MS_FSM_ERR =9 ,
- MS_COMP_PARITY_ERR =10 ,
- IDLE_PORESW_FATAL_ERR =11 ,
- IDLE_PORESW_STATUS_RC_ERR =12 ,
- IDLE_PORESW_STATUS_VALUE_ERR =13 ,
- IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR =14 ,
- IDLE_PORESW_TIMEOUT_ERR =15 ,
- IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR =16 ,
- IDLE_INTERNAL_ERR =17 ,
- INT_COMP_PARITY_ERR =18 ,
- PMC_OCC_HEARTBEAT_TIMEOUT =19 ,
- SPIVID_CRC_ERROR0 =20 ,
- SPIVID_CRC_ERROR1 =21 ,
- SPIVID_CRC_ERROR2 =22 ,
- SPIVID_RETRY_TIMEOUT =23 ,
- SPIVID_FSM_ERR =24 ,
- SPIVID_MAJORITY_DETECTED_A_MINORITY =25 ,
- O2S_CRC_ERROR0 =26 ,
- O2S_CRC_ERROR1 =27 ,
- O2S_CRC_ERROR2 =28 ,
- O2S_RETRY_TIMEOUT =29 ,
- O2S_WRITE_WHILE_BRIDGE_BUSY_ERR =30 ,
- O2S_FSM_ERR =31 ,
- O2S_MAJORITY_DETECTED_A_MINORITY =32 ,
- O2P_WRITE_WHILE_BRIDGE_BUSY_ERR =33 ,
- O2P_FSM_ERR =34 ,
- OCI_SLAVE_ERR =35 ,
- IF_COMP_PARITY_ERR =36 ,
- FIR_PARITY_ERR_DUP =47 ,
- FIR_PARITY_ERR =48
- };
-
+
FAPI_DBG("Executing p8_pm_pmc_firinit ...");
do
{
diff --git a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H
index 20990621d..67eafb6f1 100755
--- a/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H
+++ b/src/usr/hwpf/hwp/occ/occ_procedures/p8_pm_pmc_firinit.H
@@ -20,7 +20,7 @@
/* Origin: 30 */
/* */
/* IBM_PROLOG_END_TAG */
-// $Id: p8_pm_pmc_firinit.H,v 1.5 2013/04/01 04:27:51 stillgs Exp $
+// $Id: p8_pm_pmc_firinit.H,v 1.6 2013/08/26 12:44:39 stillgs Exp $
// $Source: /afs/awd/projects/eclipz/KnowledgeBase/.cvsroot/eclipz/chips/p8/working/procedures/ipl/fapi/p8_pm_pmc_firinit.H,v $
//------------------------------------------------------------------------------
// *|
@@ -37,12 +37,62 @@
// *!
//------------------------------------------------------------------------------
+#ifndef _P8_PM_PMC_FIRINIT_H_
+#define _P8_PM_PMC_FIRINIT_H_
+
//------------------------------------------------------------------------------
// Includes
//------------------------------------------------------------------------------
#include "p8_pm_firinit.H"
+
+const uint32_t PMC_FIR_REGISTER_LENGTH = 49 ;
+enum PMC_FIRS
+{
+ PSTATE_OCI_MASTER_RDERR = 0,
+ PSTATE_OCI_MASTER_RDDATA_PARITY_ERR = 1,
+ PSTATE_GPST_CHECKBYTE_ERR = 2,
+ PSTATE_GACK_TO_ERR = 3,
+ PSTATE_PIB_MASTER_NONOFFLINE_ERR = 4,
+ PSTATE_PIB_MASTER_OFFLINE_ERR = 5,
+ PSTATE_OCI_MASTER_TO_ERR = 6,
+ PSTATE_INTERCHIP_UE_ERR = 7,
+ PSTATE_INTERCHIP_ERRORFRAME_ERR = 8,
+ PSTATE_MS_FSM_ERR = 9,
+ MS_COMP_PARITY_ERR = 10,
+ IDLE_PORESW_FATAL_ERR = 11,
+ IDLE_PORESW_STATUS_RC_ERR = 12,
+ IDLE_PORESW_STATUS_VALUE_ERR = 13,
+ IDLE_PORESW_WRITE_WHILE_INACTIVE_ERR = 14,
+ IDLE_PORESW_TIMEOUT_ERR = 15,
+ IDLE_OCI_MASTER_WRITE_TIMEOUT_ERR = 16,
+ IDLE_INTERNAL_ERR = 17,
+ INT_COMP_PARITY_ERR = 18,
+ PMC_OCC_HEARTBEAT_TIMEOUT = 19,
+ SPIVID_CRC_ERROR0 = 20,
+ SPIVID_CRC_ERROR1 = 21,
+ SPIVID_CRC_ERROR2 = 22,
+ SPIVID_RETRY_TIMEOUT = 23,
+ SPIVID_FSM_ERR = 24,
+ SPIVID_MAJORITY_DETECTED_A_MINORITY = 25,
+ O2S_CRC_ERROR0 = 26,
+ O2S_CRC_ERROR1 = 27,
+ O2S_CRC_ERROR2 = 28,
+ O2S_RETRY_TIMEOUT = 29,
+ O2S_WRITE_WHILE_BRIDGE_BUSY_ERR = 30,
+ O2S_FSM_ERR = 31,
+ O2S_MAJORITY_DETECTED_A_MINORITY = 32,
+ O2P_WRITE_WHILE_BRIDGE_BUSY_ERR = 33,
+ O2P_FSM_ERR = 34,
+ OCI_SLAVE_ERR = 35,
+ IF_COMP_PARITY_ERR = 36,
+ FIR_PARITY_ERR_DUP = 47,
+ FIR_PARITY_ERR = 48
+};
+
+
+
// function pointer typedef definition for HWP call support
typedef fapi::ReturnCode (*p8_pm_pmc_firinit_FP_t) (const fapi::Target& , uint32_t mode );
@@ -63,4 +113,4 @@ p8_pm_pmc_firinit(const fapi::Target& i_target, uint32_t mode );
} // extern "C"
-
+#endif // _P8_PM_PMC_FIRINIT_H_
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