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| author | Bill Hoffa <wghoffa@us.ibm.com> | 2016-04-22 15:39:01 -0500 |
|---|---|---|
| committer | Daniel M. Crowell <dcrowell@us.ibm.com> | 2016-05-17 09:55:42 -0400 |
| commit | d729f5915949de457a21305b6b0a724e2c6ac805 (patch) | |
| tree | 2452a45dba1acf5b0e9b4174425833afa7abfad6 /src/usr | |
| parent | 3ba617d4ddeb2bb07769c2c16efc5424931714be (diff) | |
| download | talos-hostboot-d729f5915949de457a21305b6b0a724e2c6ac805.tar.gz talos-hostboot-d729f5915949de457a21305b6b0a724e2c6ac805.zip | |
Enable waking threads on master core with doorbell interrupts
Change-Id: Iceb33f0b8c802e7448e8b77200623048f7f7ab61
RTC: 141924
CMVC-Coreq: 993299
CMVC-Prereq: 994801
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23591
Tested-by: Jenkins Server
Tested-by: FSP CI Jenkins
Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com>
Reviewed-by: Prachi Gupta <pragupta@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Diffstat (limited to 'src/usr')
| -rw-r--r-- | src/usr/intr/intrrp.C | 18 | ||||
| -rw-r--r-- | src/usr/isteps/istep06/thread_activate/thread_activate.C | 22 |
2 files changed, 24 insertions, 16 deletions
diff --git a/src/usr/intr/intrrp.C b/src/usr/intr/intrrp.C index 91bca3c11..4df934758 100644 --- a/src/usr/intr/intrrp.C +++ b/src/usr/intr/intrrp.C @@ -182,7 +182,7 @@ errlHndl_t IntrRp::_init() //Set value for enabled threads uint64_t l_en_threads = get_enabled_threads(); - TRACDCOMP(g_trac_intr, "IntrRp::_init() Threads enabled:" + TRACFCOMP(g_trac_intr, "IntrRp::_init() Threads enabled:" " %lx", l_en_threads); } while(0); @@ -198,7 +198,7 @@ void IntrRp::acknowledgeInterrupt() l_ack_int_ptr += ACK_HYPERVISOR_INT_REG_OFFSET; uint16_t l_ackRead = *l_ack_int_ptr; - TRACDCOMP(g_trac_intr, "IntrRp::acknowledgeInterrupt(), read result: %16x", l_ackRead); + TRACFCOMP(g_trac_intr, "IntrRp::acknowledgeInterrupt(), read result: %16x", l_ackRead); } errlHndl_t IntrRp::resetIntUnit() @@ -404,12 +404,12 @@ void IntrRp::msgHandler() //Check if LSI-Based Interrupt if ((ackResponse & LSI_INTERRUPT) == LSI_INTERRUPT) { - TRACDCOMP(g_trac_intr, "IntrRp::msgHandler() " + TRACFCOMP(g_trac_intr, "IntrRp::msgHandler() " "- LSI Interrupt Detected"); //Read LSI Interrupt Status register PSIHB_SW_INTERFACES_t * l_psihb_ptr = iv_psiHbBaseAddr; uint64_t lsiIntStatus = l_psihb_ptr->lsiintstatus; - TRACDCOMP(g_trac_intr, "IntrRp::msgHandler() " + TRACFCOMP(g_trac_intr, "IntrRp::msgHandler() " "lsiIntStatus 0x%016lx", lsiIntStatus); LSIvalue_t l_intrType = static_cast<LSIvalue_t> (__builtin_clzl(lsiIntStatus)); @@ -424,7 +424,7 @@ void IntrRp::msgHandler() uint64_t l_data0 = (l_xirr_pir & 0xFFFFFFFF); PIR_t pir = static_cast<PIR_t>(l_data0); - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, "External Interrupt received. XIRR=%x, PIR=%x", xirr,pir.word); //An external interrupt comes from two paths @@ -468,7 +468,7 @@ void IntrRp::msgHandler() } else if (type == LSI_PSU) { - TRACDCOMP(g_trac_intr, "PSU Interrupt Detected"); + TRACFCOMP(g_trac_intr, "PSU Interrupt Detected"); handlePsuInterrupt(type); } else // no queue registered for this interrupt type @@ -601,7 +601,7 @@ void IntrRp::msgHandler() break; case MSG_INTR_UNREGISTER_MSGQ: { - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, "INTR remove registration of interrupt type = 0x%lx", msg->data[0]); LSIvalue_t l_type = static_cast<LSIvalue_t>(msg->data[0]); @@ -710,7 +710,7 @@ void IntrRp::msgHandler() } else // Ended successfully. { - TRACDCOMP(g_trac_intr, + TRACFCOMP(g_trac_intr, INFO_MRK "Cpu wakeup completed on %x", pir.word); // Tell child thread to exit. @@ -1063,7 +1063,7 @@ errlHndl_t IntrRp::handlePsuInterrupt(ext_intr_t i_type) //Issue standard EOI for the PSU Interupt uint64_t intSource = i_type; - TRACDCOMP(g_trac_intr, "Sending PSU EOI"); + TRACFCOMP(g_trac_intr, "Sending PSU EOI"); sendEOI(intSource); } while(0); diff --git a/src/usr/isteps/istep06/thread_activate/thread_activate.C b/src/usr/isteps/istep06/thread_activate/thread_activate.C index 43ff4c1aa..22b90568d 100644 --- a/src/usr/isteps/istep06/thread_activate/thread_activate.C +++ b/src/usr/isteps/istep06/thread_activate/thread_activate.C @@ -384,7 +384,7 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) } else { - TRACDCOMP( g_fapiTd, + TRACFCOMP( g_fapiTd, "activate_threads enabling thread=%d", thread ); thread_bitset |= fapi2::thread_id2bitset(thread); @@ -406,12 +406,20 @@ void activate_threads( errlHndl_t& io_rtaskRetErrl ) // return data in o_ras_status // i_warncheck => convert pre/post checks errors to // warnings -// // @TODO RTC:134077 -// FAPI_INVOKE_HWP( l_errl, p9_thread_control, -// l_fapiCore, //i_target -// thread_bitset, //i_threads -// PTC_CMD_SRESET, //i_command -// false); //i_warncheck + // o_rasStatusReg => Complete RAS status reg 64-bit buffer + // o_state => N/A - Output state not used for + // PTC_CMD_SRESET command + // + //TODO RTC 134077 Revisit use of status and threadState + fapi2::buffer<uint64_t> l_status = 0; + uint64_t l_threadState = 0; + FAPI_INVOKE_HWP( l_errl, p9_thread_control, + l_fapiCore, //i_target + thread_bitset, //i_threads + PTC_CMD_SRESET, //i_command + false, //i_warncheck + l_status, //o_rasStatusReg + l_threadState); //o_state if ( l_errl != NULL ) { |
