PRD: PLL Analysis

Change-Id: I2d8396e867c45a729f8d947411add95ddd310e2d
RTC: 136052
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25574
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Caleb N. Palmer <cnpalmer@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com>
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27139
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>

19 files changed, 304 insertions, 1784 deletions

diff --git a/src/usr/diag/prdf/common/framework/resolution/prdfClockResolution.C b/src/usr/diag/prdf/common/framework/resolution/prdfClockResolution.C
index 3ee6b3e4d..737345d5e 100755
--- a/src/usr/diag/prdf/common/framework/resolution/prdfClockResolution.C
+++ b/src/usr/diag/prdf/common/framework/resolution/prdfClockResolution.C
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2014                        */
+/* Contributors Listed Below - COPYRIGHT 2012,2016                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -73,13 +73,6 @@ int32_t ClockResolution::Resolve(STEP_CODE_DATA_STRUCT & serviceData)
                             PRDcalloutData::TYPE_PROCCLK));
         #endif
     }
-    else if (iv_targetType == TYPE_PCI)
-    {
-        // The PCIe OSC callout is being done inside
-        // chip plugins (prdfP8PllPcie) since the connected
-        // OSC can dynamically change and requires
-        // reading chip reg to figure out.
-    }
     // Get all connected chips for non-CLOCK_CARD types.
     else
     {
diff --git a/src/usr/diag/prdf/common/iipconst.h b/src/usr/diag/prdf/common/iipconst.h
index 9a709342b..078cc9022 100755
--- a/src/usr/diag/prdf/common/iipconst.h
+++ b/src/usr/diag/prdf/common/iipconst.h
@@ -87,9 +87,7 @@ enum DOMAIN_ID
     MBA_DOMAIN    = 0x81,
 
     CLOCK_DOMAIN_FAB          = 0x90,
-    CLOCK_DOMAIN_MCS          = 0x91,
-    CLOCK_DOMAIN_MEMBUF       = 0x92,
-    CLOCK_DOMAIN_IO           = 0x93,
+    CLOCK_DOMAIN_MEMBUF       = 0x91,
 
     END_DOMAIN_ID
 };
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
index e841e7381..7aa0260dd 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_ec.rule
@@ -163,6 +163,24 @@ chip p9_ec
         capture     group default;
     };
 
+
+    ############################################################################
+    # EC Chiplet PLL Registers
+    ############################################################################
+
+    register EC_ERROR_REG
+    {
+        name        "EC Chiplet PCB SLAVE ERROR REG";
+        scomaddr    0x100F001F;
+        capture     group PllFIRs;
+    };
+
+    register EC_CONFIG_REG
+    {
+        name        "EC Chiplet PCB SLAVE CONFIG REG";
+        scomaddr    0x100F001E;
+        capture     group PllFIRs;
+    };
 };
 
  ##############################################################################
diff --git a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
index 1b9927b81..71d87b3c6 100644
--- a/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
+++ b/src/usr/diag/prdf/common/plat/p9/p9_nimbus.rule
@@ -31,6 +31,9 @@ chip p9_nimbus
     dump        DUMP_CONTENT_HW;
     scomlen     64;
 
+#Import signatures
+.include "prdfP9ProcMbCommonExtraSig.H";
+
  #############################################################################
  #                                                                           #
  #  ######                                                                   #
@@ -1708,6 +1711,22 @@ chip p9_nimbus
         capture     group default;
     };
 
+    ############################################################################
+    # Non-FIR Registers
+    ############################################################################
+    register CFAM_FSI_STATUS
+    {
+        name        "TPC.FSI.FSI2PIB.STATUS";
+        scomaddr    0x00001007;
+        capture     group never;
+    };
+
+    register CFAM_FSI_GP7
+    {
+        name        "TPC.FSI.FSI_MAILBOX.FSXCOMP.FSXLOG.FSIGP7";
+        scomaddr    0x00002816;
+        capture     group never;
+    };
 };
 
  ##############################################################################
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.C b/src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.C
index 6648d3c72..88c37fcdc 100644..100755
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.C
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.C $      */
+/* $Source: src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.C $           */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -43,8 +43,8 @@ namespace PLL
 void captureFsiStatusReg( ExtensibleChip * i_chip,
                           STEP_CODE_DATA_STRUCT & io_sc )
 {
-    // At runtime, PRD runs under the OPAL app and does not
-    // have access to drivers that read CFAM registers.
+    // In hostboot runtime, PRD does not have access to drivers that read
+    // CFAM registers
     #ifndef __HOSTBOOT_RUNTIME
 
     #define PRDF_FUNC "[PLL::captureFsiStatusReg] "
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.H b/src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.H
index bbc143a0f..6f8da2daa 100644
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.H
+++ b/src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfFsiCapUtil.H $      */
+/* $Source: src/usr/diag/prdf/common/plat/p9/prdfFsiCapUtil.H $           */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014                             */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -22,6 +22,7 @@
 /* permissions and limitations under the License.                         */
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
+
 #ifndef FSI_CAP_UTIL_H
 #define FSI_CAP_UTIL_H
 
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C
index 9e28f7a00..6316694fc 100755
--- a/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Configurator.C
@@ -253,8 +253,8 @@ errlHndl_t PlatConfigurator::addDomainChips( TARGETING::TYPE i_type,
                           i_type );
         }
 
-        // Generic empty PLL domain maps, if they are used.
-        PllDomainMap pllDmnMap1, pllDmnMap2;
+        // Generic empty PLL domain map
+        PllDomainMap pllDmnMap;
 
         // Add each chip to the chip domain.
         for ( const auto & trgt : trgtList )
@@ -276,16 +276,13 @@ errlHndl_t PlatConfigurator::addDomainChips( TARGETING::TYPE i_type,
             switch ( i_type )
             {
                 case TYPE_PROC:
-                    addChipToPllDomain( CLOCK_DOMAIN_FAB, pllDmnMap1,
+                    addChipToPllDomain( CLOCK_DOMAIN_FAB, pllDmnMap,
                                         chip, trgt, TYPE_PROC,
                                         scanFac, resFac );
-                    addChipToPllDomain( CLOCK_DOMAIN_IO,  pllDmnMap2,
-                                        chip, trgt, TYPE_PCI,
-                                        scanFac, resFac );
                     break;
 
                 case TYPE_MEMBUF:
-                    addChipToPllDomain( CLOCK_DOMAIN_MEMBUF, pllDmnMap1,
+                    addChipToPllDomain( CLOCK_DOMAIN_MEMBUF, pllDmnMap,
                                         chip, trgt, TYPE_MEMBUF,
                                         scanFac, resFac );
                     break;
@@ -295,8 +292,7 @@ errlHndl_t PlatConfigurator::addDomainChips( TARGETING::TYPE i_type,
         }
 
         // Add the PLL domain maps to the PLL domain map list.
-        if ( !pllDmnMap1.empty() ) io_pllDmnLst.push_back( pllDmnMap1 );
-        if ( !pllDmnMap2.empty() ) io_pllDmnLst.push_back( pllDmnMap2 );
+        if ( !pllDmnMap.empty() ) io_pllDmnLst.push_back( pllDmnMap );
 
         // Flush rule table cache since objects are all built.
         Prdr::LoadChipCache::flushCache();
@@ -315,7 +311,7 @@ void PlatConfigurator::addChipToPllDomain( DOMAIN_ID i_domainId,
                                            ScanFacility & i_scanFac,
                                            ResolutionFactory & i_resFac )
 {
-    // TODO: RTC 136052 - The position used here should be based on clock
+    // TODO: RTC 155673 - The position used here should be based on clock
     //       domains. In the past there happened to be one clock source for each
     //       node. In which case, we just used the node position. Unfortunately,
     //       that is not very maintainable code. Instead, we should be querying
@@ -347,7 +343,7 @@ void PlatConfigurator::addPllDomainsToSystem( const PllDomainMapList & i_list )
           lit != i_list.end(); ++lit )
     {
         for ( PllDomainMap::const_iterator mit = lit->begin();
-              mit != lit->begin(); ++mit )
+              mit != lit->end(); ++mit )
         {
             sysDmnLst.push_back( mit->second );
         }
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C b/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C
new file mode 100755
index 000000000..ae37d0dff
--- /dev/null
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C
@@ -0,0 +1,216 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/usr/diag/prdf/common/plat/p9/prdfP9Pll.C $                */
+/*                                                                        */
+/* OpenPOWER HostBoot Project                                             */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+/**
+ * @file prdfP9PLL.C
+ * @brief chip Plug-in code for proc pll support
+ */
+
+#include <iipServiceDataCollector.h>
+#include <prdfExtensibleChip.H>
+#include <prdfPluginMap.H>
+#include <prdfBitString.H>
+#include <iipscr.h>
+#include <prdfPlatServices.H>
+#include <prdfErrlUtil.H>
+#include <iipSystem.h>
+#include <prdfGlobal_common.H>
+#include <UtilHash.H>
+#include <prdfFsiCapUtil.H>
+
+using namespace TARGETING;
+
+namespace PRDF
+{
+
+using namespace PlatServices;
+
+namespace Proc
+{
+
+enum
+{
+    // All of the chiplet PLL_ERROR bits below
+    // are collected in this TP_LFIR bit
+    PLL_DETECT_P9 = 21,
+};
+
+/**
+  * @brief Query the PLL chip for a PLL error on P9
+  * @param  i_chip P9 chip
+  * @param o_result set to true in the presence of PLL error
+  * @returns Failure or Success of query.
+  * @note
+  */
+int32_t QueryPll( ExtensibleChip * i_chip,
+                        bool & o_result)
+{
+    #define PRDF_FUNC "[Proc::QueryPll] "
+
+    int32_t rc = SUCCESS;
+    o_result = false;
+
+    SCAN_COMM_REGISTER_CLASS * TP_LFIR =
+                i_chip->getRegister("TP_LFIR");
+    SCAN_COMM_REGISTER_CLASS * TP_LFIRmask =
+                i_chip->getRegister("TP_LFIR_MASK");
+
+    do
+    {
+        rc = TP_LFIR->Read();
+        if (rc != SUCCESS)
+        {
+            PRDF_ERR(PRDF_FUNC "TP_LFIR read failed"
+                     "for 0x%08x", i_chip->GetId());
+            break;
+        }
+
+        rc = TP_LFIRmask->Read();
+        if (rc != SUCCESS)
+        {
+            PRDF_ERR(PRDF_FUNC "TP_LFIR_MASK read failed"
+                     "for 0x%08x", i_chip->GetId());
+            break;
+        }
+
+        if (( ! TP_LFIRmask->IsBitSet(PLL_DETECT_P9) ) &&
+            ( TP_LFIR->IsBitSet(PLL_DETECT_P9) ))
+        {
+            o_result = true;
+        }
+
+    } while(0);
+
+    if( rc != SUCCESS )
+    {
+        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
+                 i_chip->GetId());
+    }
+
+    return rc;
+
+    #undef PRDF_FUNC
+}
+PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, QueryPll );
+
+/**
+  * @brief  Clear the PLL error for P9 Plugin
+  * @param  i_chip P9 chip
+  * @param  i_sc   The step code data struct
+  * @returns Failure or Success of query.
+  */
+int32_t ClearPll( ExtensibleChip * i_chip,
+                        STEP_CODE_DATA_STRUCT & i_sc)
+{
+    #define PRDF_FUNC "[Proc::ClearPll] "
+
+    int32_t rc = SUCCESS;
+
+    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
+    {
+        // Clear TP_LFIR
+        SCAN_COMM_REGISTER_CLASS * TP_LFIRand =
+                   i_chip->getRegister("TP_LFIR_AND");
+        TP_LFIRand->setAllBits();
+        TP_LFIRand->ClearBit(PLL_DETECT_P9);
+        rc = TP_LFIRand->Write();
+        if (rc != SUCCESS)
+        {
+            PRDF_ERR(PRDF_FUNC "TP_LFIR_AND write failed"
+                     "for chip: 0x%08x", i_chip->GetId());
+        }
+    }
+
+    return rc;
+
+    #undef PRDF_FUNC
+}
+PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, ClearPll );
+
+/**
+  * @brief Mask the PLL error for P9 Plugin
+  * @param  i_chip P9 chip
+  * @param  i_sc   The step code data struct
+  * @returns Failure or Success of query.
+  * @note
+  */
+int32_t MaskPll( ExtensibleChip * i_chip,
+                 STEP_CODE_DATA_STRUCT & i_sc )
+{
+    int32_t rc = SUCCESS;
+    SCAN_COMM_REGISTER_CLASS * tpmask_or =
+        i_chip->getRegister("TP_LFIR_MASK_OR");
+    tpmask_or->clearAllBits();
+    tpmask_or->SetBit(PLL_DETECT_P9);
+    rc = tpmask_or->Write();
+    if (rc != SUCCESS)
+    {
+        PRDF_ERR("[Proc::MaskPll] TP_LFIR_AND write failed"
+                 "for chip: 0x%08x", i_chip->GetId());
+    }
+
+    return rc;
+}
+PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, MaskPll );
+
+/**
+ * @brief   capture additional PLL FFDC
+ * @param   i_chip   P9 chip
+ * @param   i_sc     service data collector
+ * @returns Success
+ */
+int32_t capturePllFfdc( ExtensibleChip * i_chip,
+                        STEP_CODE_DATA_STRUCT & io_sc )
+{
+    #define PRDF_FUNC "[Proc::capturePllFfdc] "
+
+    // Add FSI status reg
+    PLL::captureFsiStatusReg( i_chip, io_sc );
+
+    // Add EX scom data
+    TargetHandleList exList = getConnected(
+                        i_chip->GetChipHandle(), TYPE_CORE);
+    ExtensibleChip * exChip;
+    TargetHandleList::iterator itr = exList.begin();
+    for( ; itr != exList.end(); ++itr)
+    {
+        exChip = (ExtensibleChip *)systemPtr->GetChip(*itr);
+        if( NULL == exChip ) continue;
+
+        exChip->CaptureErrorData(
+                io_sc.service_data->GetCaptureData(),
+                Util::hashString("PllFIRs"));
+    }
+
+    return SUCCESS;
+
+    #undef PRDF_FUNC
+}
+PRDF_PLUGIN_DEFINE_NS( p9_nimbus, Proc, capturePllFfdc );
+
+
+} // end namespace Proc
+
+} // end namespace PRDF
diff --git a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C
index a94a58193..a1b7b2526 100755
--- a/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9PllDomain.C
@@ -41,43 +41,17 @@
 #include <iipSystem.h>
 #include <UtilHash.H>
 
-//#include <prdfP8PllPcie.H> TODO RTC 136052
-//#include <prdfP8ProcMbCommonExtraSig.H> TODO RTC 136052
+#include <prdfP9ProcMbCommonExtraSig.H>
 
 using namespace TARGETING;
 
 namespace PRDF
 {
 
-//using namespace PLL; TODO RTC 136052
 using namespace PlatServices;
 
 //------------------------------------------------------------------------------
 
-void PllDomain::InitChipPluginFuncs()
-{
-    if ( CLOCK_DOMAIN_IO == GetId() )
-    {
-        QueryPllFunc = "QueryPllIo";
-        CapturePllFunc = "capturePllFfdcIo";
-        CalloutPllFunc = "CalloutPllIo";
-        MaskPllFunc = "MaskPllIo";
-        ClearPllFunc = "ClearPllIo";
-        PostAnalysisPllFunc = "PllPostAnalysisIo";
-    }
-    else
-    {
-        QueryPllFunc = "QueryPll";
-        CapturePllFunc = "capturePllFfdc";
-        CalloutPllFunc = "CalloutPll";
-        MaskPllFunc = "MaskPll";
-        ClearPllFunc = "ClearPll";
-        PostAnalysisPllFunc = "PllPostAnalysis";
-    }
-}
-
-//------------------------------------------------------------------------------
-
 int32_t PllDomain::Initialize(void)
 {
 
@@ -107,7 +81,7 @@ bool PllDomain::Query(ATTENTION_TYPE attentionType)
             if( l_analysisPending )
             {
                 ExtensibleChipFunction * l_query =
-                                    l_chip->getExtensibleFunction(QueryPllFunc);
+                                    l_chip->getExtensibleFunction("QueryPll");
                 int32_t rc = (*l_query)(l_chip,PluginDef::bindParm<bool &>(atAttn));
                 // if rc then scom read failed - Error log has already been generated
                 if( PRD_POWER_FAULT == rc )
@@ -135,7 +109,6 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
     typedef ExtensibleChip * ChipPtr;
     CcAutoDeletePointerVector<ChipPtr> chip(new ChipPtr[GetSize()]());
     int count = 0;
-    bool oscSource[2] = { false, false };
     int32_t rc = SUCCESS;
 
     // Due to clock issues some chips may be moved to non-functional during
@@ -151,7 +124,7 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
         bool atAttn = false;
 
         ExtensibleChipFunction * l_query =
-            l_chip->getExtensibleFunction(QueryPllFunc);
+            l_chip->getExtensibleFunction("QueryPll");
         rc |= (*l_query)(l_chip,PluginDef::bindParm<bool &>(atAttn));
 
         if ( atAttn )
@@ -167,36 +140,13 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
 
             // Call this chip's capturePllFfdc plugin if it exists.
             ExtensibleChipFunction * l_captureFfdc =
-                l_chip->getExtensibleFunction(CapturePllFunc, true);
+                l_chip->getExtensibleFunction("capturePllFfdc", true);
             if ( NULL != l_captureFfdc )
             {
                 (*l_captureFfdc)( l_chip,
                 PluginDef::bindParm<STEP_CODE_DATA_STRUCT &>(serviceData) );
             }
 
-            // If error is not from PCIE OSC, there is no need to go further
-            // than this. We shall analyze errors from other chips in the
-            // domain.
-
-            if ( CLOCK_DOMAIN_IO != GetId() )
-            {
-                continue;
-            }
-
-/* TODO: RTC 136052
-            // Figure out which pcie osc is active for this proc
-            uint32_t oscPos = getIoOscPos(l_chip, serviceData);
-
-            if ( oscPos < MAX_PCIE_OSC_PER_NODE )
-            {
-                oscSource[oscPos] = true;
-            }
-            else
-            {
-                PRDF_ERR(PRDF_FUNC "getOscPos returned error for chip: "
-                         "0x%08x", l_chip->GetId());
-            }
-*/
         }
         else if ( !PlatServices::isFunctional(l_chip->GetChipHandle()) )
         {
@@ -221,17 +171,11 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
     const uint32_t tmpCount = serviceData.service_data->getMruListSize();
 
     // If only one detected the error, add it to the callout list.
-    // Or if multiple chips report errors but no callout for PCIe case.
-    // This could happen for PCIe PLL since pcie clock resolution defer
-    // the osc callout to PllPcie chip plugin.
-    if (( 1 == count ) ||
-        (( 1 < count ) &&
-         ( 0 == tmpCount ) &&
-         ( CLOCK_DOMAIN_IO == GetId() )))
+    if ( 1 == count )
     {
         // Call this chip's CalloutPll plugin if it exists.
         ExtensibleChipFunction * l_callout =
-                chip()[0]->getExtensibleFunction( CalloutPllFunc, true );
+                chip()[0]->getExtensibleFunction( "CalloutPll", true );
         if ( NULL != l_callout )
         {
             (*l_callout)( chip()[0],
@@ -239,95 +183,34 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
         }
 
         // If CalloutPll plugin does not add anything new to the callout
-        // or for pcie io domain and only 1 proc reports error, then
-        // call it out in addition to the pcie osc already called out in
-        // CalloutPllFunc plugin
-        if (( tmpCount == serviceData.service_data->getMruListSize() ) ||
-            (( CLOCK_DOMAIN_IO == GetId() ) && ( 1 == count )))
+        // list, callout this chip
+        if ( tmpCount == serviceData.service_data->getMruListSize() )
         {
             // No additional callouts were made so add this chip to the list.
             serviceData.service_data->SetCallout( chip()[0]->GetChipHandle());
         }
     }
 
-    // PCIe domains uses two threshold resolutions one per osc
-    if ( CLOCK_DOMAIN_IO == GetId() )
-    {
-        if ( true == oscSource[0] )
-        {
-            iv_threshold.Resolve(serviceData);
-        }
-
-        if ( true == oscSource[1] )
-        {
-            iv_threshold2.Resolve(serviceData);
-        }
-
-        if (( false == oscSource[0] ) && ( false == oscSource[1] ))
-        {
-            PRDF_ERR(PRDF_FUNC "can't threshold IO domain due to no available "
-                               "pcie osc source - count:%d, chip 0x%08x",
-                               count, chip()[0]->GetId());
-        }
-    }
-    // Proc and mem domains only use one threshold resolution
-    else
-    {
-        iv_threshold.Resolve(serviceData);
-    }
+    iv_threshold.Resolve(serviceData);
 
     // Test for threshold
     if(serviceData.service_data->IsAtThreshold())
     {
-        // Only mask chips connected to fault pcie osc
-        if ( CLOCK_DOMAIN_IO == GetId() )
-        {
-            uint32_t oscPos = MAX_PCIE_OSC_PER_NODE;
-            if ( true == oscSource[0] )
-            {
-                // Mask pcie pll error in chips connected to pcie osc-0
-                oscPos = 0;
-                ExtensibleDomainFunction * l_mask =
-                           getExtensibleFunction("MaskPllIo");
-                (*l_mask)(this,
-                     PluginDef::bindParm<STEP_CODE_DATA_STRUCT&, uint32_t>
-                     (serviceData, oscPos));
-            }
-
-            if ( true == oscSource[1] )
-            {
-                // Mask pcie pll error in chips connected to pcie osc-1
-                oscPos = 1;
-                ExtensibleDomainFunction * l_mask =
-                           getExtensibleFunction("MaskPllIo");
-                (*l_mask)(this,
-                     PluginDef::bindParm<STEP_CODE_DATA_STRUCT&, uint32_t>
-                     (serviceData, oscPos));
-            }
-
-            if (( false == oscSource[0] ) && ( false == oscSource[1] ))
-            {
-                PRDF_ERR(PRDF_FUNC "can't mask pcie pll error due to no "
-                    "available pcie osc source - count:%d, chip 0x%08x",
-                    count, chip()[0]->GetId());
-            }
-        }
-        else
-        {
-            // Mask in all chips in domain
-            ExtensibleDomainFunction * l_mask =
-                                getExtensibleFunction("MaskPll");
-            (*l_mask)(this,
-                  PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData));
-        }
+        // Mask in all chips in domain
+        ExtensibleDomainFunction * l_mask =
+                            getExtensibleFunction("MaskPll");
+        (*l_mask)(this,
+              PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData));
     }
     // Set Signature
-    serviceData.service_data->GetErrorSignature()->setChipId(chip()[0]->GetId());
-//    serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR ); TODO RTC 136052
+    serviceData.service_data->GetErrorSignature()->
+        setChipId(chip()[0]->GetId());
+    serviceData.service_data->SetErrorSig( PRDFSIG_PLL_ERROR );
 
 #ifndef __HOSTBOOT_MODULE
     // Set dump flag dg09a
-    serviceData.service_data->SetDump(iv_dumpContent,chip()[0]->GetChipHandle());
+    serviceData.service_data->SetDump(iv_dumpContent,chip()[0]->
+        GetChipHandle());
 #endif
 
     // Clear PLLs from this domain.
@@ -341,7 +224,7 @@ int32_t PllDomain::Analyze(STEP_CODE_DATA_STRUCT & serviceData,
         ExtensibleChip * l_chip = chip()[i];
         // Send any special messages indicating there was a PLL error.
         ExtensibleChipFunction * l_pllPostAnalysis =
-                l_chip->getExtensibleFunction(PostAnalysisPllFunc, true);
+                l_chip->getExtensibleFunction("PllPostAnalysis", true);
         (*l_pllPostAnalysis)(l_chip,
                 PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(serviceData));
     }
@@ -366,10 +249,6 @@ int32_t PllDomain::ClearPll( ExtensibleDomain * i_domain,
     PllDomain * l_domain = (PllDomain *) i_domain;
 
     const char * clearPllFuncName = "ClearPll";
-    if ( CLOCK_DOMAIN_IO == l_domain->GetId() )
-    {
-        clearPllFuncName = "ClearPllIo";
-    }
 
     // Clear children chips.
     for ( uint32_t i = 0; i < l_domain->GetSize(); i++ )
@@ -431,42 +310,5 @@ PRDF_PLUGIN_DEFINE( PllDomain, MaskPll );
 
 //------------------------------------------------------------------------------
 
-int32_t PllDomain::MaskPllIo( ExtensibleDomain * i_domain,
-                              STEP_CODE_DATA_STRUCT & i_sc,
-                              uint32_t i_oscPos )
-{
-    PllDomain * l_domain = (PllDomain *) i_domain;
-
-    // Mask children chips.
-    for ( uint32_t i = 0; i < l_domain->GetSize(); i++ )
-    {
-        ExtensibleChip * l_chip = l_domain->LookUp(i);
-        ExtensibleChipFunction * l_mask =
-                            l_chip->getExtensibleFunction("MaskPllIo");
-
-        // io pcie domain needs osc pos info
-        (*l_mask)( l_chip,
-                   PluginDef::bindParm<STEP_CODE_DATA_STRUCT&, uint32_t>
-                   (i_sc, i_oscPos) );
-    }
-
-    // Mask children domains - not used in PCIe but leave it here for now
-    // This looks like a recursive call.  It calls other domains of Mask.
-    ParentDomain<ExtensibleDomain>::iterator i;
-    for (i = l_domain->getBeginIterator(); i != l_domain->getEndIterator(); i++)
-    {
-        ExtensibleDomainFunction * l_mask =
-                                (i->second)->getExtensibleFunction("MaskPll");
-        (*l_mask)( i->second,
-                   PluginDef::bindParm<STEP_CODE_DATA_STRUCT&>(i_sc) );
-    }
-
-    return SUCCESS;
-}
-PRDF_PLUGIN_DEFINE( PllDomain, MaskPllIo );
-
-
-//------------------------------------------------------------------------------
-
 } // end namespace PRDF
 
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.H b/src/usr/diag/prdf/common/plat/p9/prdfP9ProcMbCommonExtraSig.H
index 33b0be3fe..c5aa1ceb5 100644
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.H
+++ b/src/usr/diag/prdf/common/plat/p9/prdfP9ProcMbCommonExtraSig.H
@@ -1,11 +1,11 @@
 /* IBM_PROLOG_BEGIN_TAG                                                   */
 /* This is an automatically generated prolog.                             */
 /*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.H $       */
+/* $Source: src/usr/diag/prdf/common/plat/p9/prdfP9ProcMbCommonExtraSig.H $ */
 /*                                                                        */
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2015                             */
+/* Contributors Listed Below - COPYRIGHT 2016                             */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -23,52 +23,11 @@
 /*                                                                        */
 /* IBM_PROLOG_END_TAG                                                     */
 
-#ifndef __prdfP8PllPcie_H
-#define __prdfP8PllPcie_H
+#ifndef __prdfP9ProcMbCommonExtraSig_H
+#define __prdfP9ProcMbCommonExtraSig_H
 
-/** @file  prdfP8PllPcie.H
- *  @brief Utility functions for PLL domain.
- */
+#include <prdrSignatures.H>
 
-#include <UtilHash.H>
-namespace PRDF
-{
-
-class ExtensibleChip;
-struct STEP_CODE_DATA_STRUCT;
-namespace PLL
-{
-
-/**
- * @brief   get the pcie source osc pos reporting error for this proc
- * @param   i_chip   P8 chip
- * @param   i_sc     service data collector
- * @return  osc position
- */
-uint32_t getIoOscPos( ExtensibleChip * i_chip,
-                      STEP_CODE_DATA_STRUCT & io_sc );
-
-} // end namespace PLL
-
-namespace Proc
-{
-
-enum
-{
-    // All of the chiplet PLL_ERROR bits below
-    // are collected in this TP_LFIR bit
-    PLL_DETECT_P8 = 19,
-    // Chiplet PLL_ERROR mask and error bits
-    PLL_ERROR_MASK  = 12,
-    PLL_ERROR_BIT   = 25,
-    PB_DMI_RIGHT_PLL_ERROR = 25, // Venice only
-    PB_DMI_LEFT_PLL_ERROR  = 26, // Venice and Murano
-    // PCB Slave internal parity error
-    PARITY_ERROR_MASK  = 8,
-    PARITY_ERROR_BIT   = 4,
-};
-
-}//end namespace Proc
-} // end namespace PRDF
-
-#endif // __prdfP8PllPcie_H
+/* PLL Extra signatures */
+PRDR_ERROR_SIGNATURE( PLL_ERROR, 0x00ed0000, "","PLL error" );
+#endif // __prdfP9ProcMbCommonExtraSig_H
diff --git a/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk b/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk
index cb628778b..20563c656 100644
--- a/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk
+++ b/src/usr/diag/prdf/common/plat/p9/prdf_plat_p9.mk
@@ -40,7 +40,8 @@ prd_incpath += ${PRD_SRC_PATH}/common/plat/p9
 # non-rule plugin related
 prd_obj += prdfP9Configurator.o
 prd_obj += prdfP9PllDomain.o
+prd_obj += prdfFsiCapUtil.o
 
 # rule plugin related
 prd_rule_plugin += prdfP9Proc.o
-
+prd_rule_plugin += prdfP9Pll.o
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C
deleted file mode 100755
index bb86f086a..000000000
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C
+++ /dev/null
@@ -1,811 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfP8Pll.C $           */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2012,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-/**
- * @file prdfP8PLL.C
- * @brief chip Plug-in code for proc pll support
- */
-
-#include <iipServiceDataCollector.h>
-#include <prdfExtensibleChip.H>
-#include <prdfPluginMap.H>
-#include <prdfBitString.H>
-#include <iipscr.h>
-#include <prdfPlatServices.H>
-#include <prdfErrlUtil.H>
-#include <iipSystem.h>
-#include <prdfGlobal_common.H>
-#include <prdfP8DataBundle.H>
-#include <prdfP8PllPcie.H>
-#include <prdfFsiCapUtil.H>
-#include <UtilHash.H>
-
-
-using namespace TARGETING;
-
-namespace PRDF
-{
-
-using namespace PLL;
-using namespace PlatServices;
-
-namespace Proc
-{
-
-/**
-  * @brief this is to get a list of pll error
-  *        register data to work on
-  * @param  i_chip          P8 chip
-  * @param  o_pllErrRegList Pll Err Reg list
-  * @note
-  */
-void GetProcPllErrRegList(ExtensibleChip * i_chip,
-                          P8DataBundle::ProcPllErrRegList& o_pllErrRegList)
-{
-    #define PRDF_FUNC "[Proc::GetProcPllErrRegList] "
-    o_pllErrRegList.clear();
-    P8DataBundle::PllErrReg entry;
-
-    do
-    {
-        // PB
-        entry.chip      = i_chip;
-        entry.type      = P8DataBundle::PB;
-        entry.errReg    = i_chip->getRegister("PB_ERROR_REG");
-        entry.configReg = i_chip->getRegister("PB_CONFIG_REG");
-        o_pllErrRegList.push_back( entry );
-
-        entry.chip      = i_chip;
-
-        // Get NV PLL Registers if Naples chip, else get ABUS PLL Registers
-        if ( MODEL_NAPLES == getProcModel(i_chip->GetChipHandle()) )
-        {
-            // NV
-            entry.type      = P8DataBundle::NV;
-            entry.errReg    = i_chip->getRegister("NV_ERROR_REG");
-            entry.configReg = i_chip->getRegister("NV_CONFIG_REG");
-        }
-        else
-        {
-            // ABUS
-            entry.type      = P8DataBundle::ABUS;
-            entry.errReg    = i_chip->getRegister("ABUS_ERROR_REG");
-            entry.configReg = i_chip->getRegister("ABUS_CONFIG_REG");
-        }
-
-        o_pllErrRegList.push_back( entry );
-
-        // EX
-        TargetHandleList exList = getConnected(
-                            i_chip->GetChipHandle(), TYPE_EX);
-        ExtensibleChip * exChip;
-
-        TargetHandleList::iterator itr = exList.begin();
-        for( ; itr != exList.end(); ++itr)
-        {
-            PRDF_DTRAC(PRDF_FUNC "EX: 0x%.8X", getHuid(*itr));
-            exChip = (ExtensibleChip *)systemPtr->GetChip( *itr );
-            if( NULL == exChip ) continue;
-
-            entry.chip      = exChip;
-            entry.type      = P8DataBundle::EX;
-            entry.errReg    = exChip->getRegister("EX_ERROR_REG");
-            entry.configReg = exChip->getRegister("EX_CONFIG_REG");
-            o_pllErrRegList.push_back( entry );
-        }
-
-    } while(0);
-
-    #undef PRDF_FUNC
-}
-
-/**
-  * @brief Query the PLL chip for a Proc PLL error
-  * @param  i_chip P8 chip
-  * @param o_result set to true in the presence of PLL error
-  * @returns Failure or Success of query.
-  * @note
-  */
-int32_t QueryProcPll( ExtensibleChip * i_chip,
-                        bool & o_result)
-{
-    #define PRDF_FUNC "[Proc::QueryProcPll] "
-
-    int32_t rc = SUCCESS;
-    o_result = false;
-
-    MODEL procModel = getProcModel( i_chip->GetChipHandle() );
-
-    // Next check for the error reg bits in the chiplets
-    P8DataBundle * procdb = getDataBundle( i_chip );
-    P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-        procdb->getProcPllErrRegList();
-
-    // Always get a list here since this is the entry point
-    GetProcPllErrRegList( i_chip, procPllErrRegList );
-
-    do
-    {
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            rc = (*itr).errReg->Read();
-            if (rc != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "ERROR_REG read failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                break;
-            }
-
-            rc = (*itr).configReg->Read();
-            if (rc != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "CONFIG_REG read failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                break;
-            }
-
-            if( P8DataBundle::PB == (*itr).type )
-            {
-                if(( (*itr).errReg->IsBitSet(PB_DMI_LEFT_PLL_ERROR) &&
-                     !(*itr).configReg->IsBitSet(PLL_ERROR_MASK) ) ||
-                   (( MODEL_VENICE == procModel) &&
-                    ( (*itr).errReg->IsBitSet(PB_DMI_RIGHT_PLL_ERROR) &&
-                      !(*itr).configReg->IsBitSet(PLL_ERROR_MASK) )))
-                {
-                    o_result = true;
-                    break;
-                }
-            }
-            else if((*itr).errReg->IsBitSet(PLL_ERROR_BIT) &&
-               !(*itr).configReg->IsBitSet(PLL_ERROR_MASK))
-            {
-                o_result = true;
-                break;
-            }
-        }
-
-    } while(0);
-
-    // clear the PLL Err Reg list if no pll error was found
-    if(false == o_result)
-    {
-        procPllErrRegList.clear();
-    }
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, QueryProcPll );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, QueryProcPll );
-
-/**
-  * @brief Query the PLL chip for a PLL error on P8
-  * @param  i_chip P8 Pci chip
-  * @param o_result set to true in the presence of PLL error
-  * @returns Failure or Success of query.
-  * @note
-  */
-int32_t QueryPll( ExtensibleChip * i_chip,
-                        bool & o_result)
-{
-    #define PRDF_FUNC "[Proc::QueryPll] "
-
-    int32_t rc = SUCCESS;
-    o_result = false;
-
-    SCAN_COMM_REGISTER_CLASS * TP_LFIR =
-                i_chip->getRegister("TP_LFIR");
-    SCAN_COMM_REGISTER_CLASS * TP_LFIRmask =
-                i_chip->getRegister("TP_LFIR_MASK");
-
-    do
-    {
-        rc = TP_LFIR->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        rc = TP_LFIRmask->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR_MASK read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        if (( TP_LFIRmask->IsBitSet(PLL_DETECT_P8) ) ||
-            ( ! TP_LFIR->IsBitSet(PLL_DETECT_P8) ))
-        {
-            // if global pll bit is not set, break out
-            break;
-        }
-
-        rc = QueryProcPll( i_chip, o_result );
-        if ((rc != SUCCESS) || (true == o_result)) break;
-
-    } while(0);
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, QueryPll );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, QueryPll );
-
-
-/**
-  * @brief  Clear the PLL error for P8 Plugin
-  * @param  i_chip P8 chip
-  * @param  i_sc   The step code data struct
-  * @returns Failure or Success of query.
-  */
-int32_t ClearPll( ExtensibleChip * i_chip,
-                        STEP_CODE_DATA_STRUCT & i_sc)
-{
-    #define PRDF_FUNC "[Proc::ClearPll] "
-
-    int32_t rc = SUCCESS;
-
-    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
-    {
-        // Clear proc osc error reg bits
-        P8DataBundle * procdb = getDataBundle( i_chip );
-        P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-                           procdb->getProcPllErrRegList();
-        if( procPllErrRegList.empty() )
-        {
-            GetProcPllErrRegList( i_chip, procPllErrRegList );
-        }
-
-        int32_t tmpRC = SUCCESS;
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            (*itr).errReg->ClearBit(PLL_ERROR_BIT);
-            if( P8DataBundle::PB == (*itr).type )
-            {
-                (*itr).errReg->ClearBit(PB_DMI_LEFT_PLL_ERROR);
-            }
-            tmpRC = (*itr).errReg->Write();
-            if (tmpRC != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "ERROR_REG write failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                rc |= tmpRC;
-            }
-        }
-
-        // Clear TP_LFIR
-        SCAN_COMM_REGISTER_CLASS * TP_LFIRand =
-                   i_chip->getRegister("TP_LFIR_AND");
-        TP_LFIRand->setAllBits();
-        TP_LFIRand->ClearBit(PLL_DETECT_P8);
-        tmpRC = TP_LFIRand->Write();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR_AND write failed"
-                     "for chip: 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-
-        // Need to clear the PLL Err Reg list so it can
-        // be populated with fresh data on the next analysis
-        // can do this in error case to save some space
-        procPllErrRegList.clear();
-    }
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, ClearPll );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, ClearPll );
-
-/**
-  * @brief Mask the PLL error for P8 Plugin
-  * @param  i_chip P8 chip
-  * @param  i_sc   The step code data struct
-  * @returns Failure or Success of query.
-  * @note
-  */
-int32_t MaskPll( ExtensibleChip * i_chip,
-                 STEP_CODE_DATA_STRUCT & i_sc )
-{
-    #define PRDF_FUNC "[Proc::MaskPll] "
-
-    int32_t rc = SUCCESS;
-
-    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
-    {
-        int32_t tmpRC = SUCCESS;
-
-        P8DataBundle * procdb = getDataBundle( i_chip );
-        P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-            procdb->getProcPllErrRegList();
-        if( procPllErrRegList.empty() )
-        {
-            GetProcPllErrRegList( i_chip, procPllErrRegList );
-        }
-
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            // Error is already fenced
-            if( (*itr).configReg->IsBitSet(PLL_ERROR_MASK) )
-            {
-                continue;
-            }
-
-            (*itr).configReg->SetBit(PLL_ERROR_MASK);
-
-            tmpRC = (*itr).configReg->Write();
-            if (tmpRC != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "CONFIG_REG write failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                rc |= tmpRC;
-            }
-        }
-
-        // Need to clear the PLL Err Reg list so it can
-        // be populated with fresh data on the next analysis
-        // can do this in error case to save some space
-        procPllErrRegList.clear();
-
-        // Since TP_LFIR bit is the collection of all of the
-        // pll error reg bits, we can't mask it or we will not
-        // see any PLL errors reported from the error regs
-
-    }  // if not checkstop
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                    i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, MaskPll );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, MaskPll );
-
-/**
- * @brief  Optional plugin function called after analysis is complete but
- *         before PRD exits.
- * @param  i_chip    P8 chip.
- * @param  i_sc      The step code data struct.
- * @note   This is especially useful for any analysis that still needs to be
- *         done after the framework clears the FIR bits that were at attention.
- * @return SUCCESS.
- */
-int32_t PllPostAnalysis( ExtensibleChip * i_chip,
-                         STEP_CODE_DATA_STRUCT & i_sc )
-{
-    #define PRDF_FUNC "[Proc::PllPostAnalysis] "
-
-    // Need to clear the PLL Err Reg list so it can
-    // be populated with fresh data on the next analysis
-    P8DataBundle * procdb = getDataBundle( i_chip );
-    P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-                        procdb->getProcPllErrRegList();
-    procPllErrRegList.clear();
-
-    return SUCCESS;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, PllPostAnalysis );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, PllPostAnalysis );
-
-/**
- * @brief   capture additional PLL FFDC
- * @param   i_chip   P8 chip
- * @param   i_sc     service data collector
- * @returns Success
- */
-int32_t capturePllFfdc( ExtensibleChip * i_chip,
-                        STEP_CODE_DATA_STRUCT & io_sc )
-{
-    #define PRDF_FUNC "[Proc::capturePllFfdc] "
-
-    // Add FSI status reg
-    captureFsiStatusReg( i_chip, io_sc );
-
-    // Add EX scom data
-    TargetHandleList exList = getConnected(
-                        i_chip->GetChipHandle(), TYPE_EX);
-    ExtensibleChip * exChip;
-    TargetHandleList::iterator itr = exList.begin();
-    for( ; itr != exList.end(); ++itr)
-    {
-        exChip = (ExtensibleChip *)systemPtr->GetChip(*itr);
-        if( NULL == exChip ) continue;
-
-        exChip->CaptureErrorData(
-                io_sc.service_data->GetCaptureData(),
-                Util::hashString("PllFIRs"));
-    }
-
-    return SUCCESS;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, capturePllFfdc );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, capturePllFfdc );
-
-/**
-  * @brief   Check PCB Slave internal parity errors
-  * @param   i_chip P8 chip
-  * @param   o_parityErr true for parity error, false otherwise
-  * @param   io_sc  service data collector
-  * @returns FAIL or SUCCESS
-  */
-int32_t CheckParityErr( ExtensibleChip * i_chip,
-                        bool & o_parityErr,
-                        STEP_CODE_DATA_STRUCT & io_sc )
-{
-    #define PRDF_FUNC "[Proc::CheckParityErr] "
-
-    int32_t rc = SUCCESS;
-    o_parityErr = false;
-    P8DataBundle * procdb = getDataBundle( i_chip );
-    P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-        procdb->getProcPllErrRegList();
-
-    do
-    {
-        // First check PCI chiplet
-        SCAN_COMM_REGISTER_CLASS * pciErrReg =
-            i_chip->getRegister("PCI_ERROR_REG");
-        SCAN_COMM_REGISTER_CLASS * pciConfigReg =
-            i_chip->getRegister("PCI_CONFIG_REG");
-
-        rc = pciErrReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_ERROR_REG read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        rc = pciConfigReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_CONFIG_REG read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        if(pciErrReg->IsBitSet(PARITY_ERROR_BIT) &&
-           !pciConfigReg->IsBitSet(PARITY_ERROR_MASK))
-        {
-            o_parityErr = true;
-            break;
-        }
-
-        // Next check other chiplets
-
-        // Always get a list here since this is the entry point
-        GetProcPllErrRegList( i_chip, procPllErrRegList );
-
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            rc = (*itr).errReg->Read();
-            if (rc != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "ERROR_REG read failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                break;
-            }
-
-            rc = (*itr).configReg->Read();
-            if (rc != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "CONFIG_REG read failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                break;
-            }
-
-            if((*itr).errReg->IsBitSet(PARITY_ERROR_BIT) &&
-               !(*itr).configReg->IsBitSet(PARITY_ERROR_MASK))
-            {
-                o_parityErr = true;
-                break;
-            }
-        }
-
-    } while(0);
-
-    if( ! o_parityErr )
-    {
-        PRDF_ERR(PRDF_FUNC "no parity error found for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X", i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-
-
-/**
-  * @brief Mask the PCB Slave internal parity error
-  * @param  i_chip P8 chip
-  * @param  i_sc   The step code data struct
-  * @returns Failure or Success
-  */
-int32_t MaskParityErr( ExtensibleChip * i_chip,
-                       STEP_CODE_DATA_STRUCT & i_sc)
-{
-    #define PRDF_FUNC "[Proc::MaskParityErr] "
-
-    int32_t rc = SUCCESS;
-
-    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
-    {
-        // fence off proc osc error reg bits
-        P8DataBundle * procdb = getDataBundle( i_chip );
-        P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-            procdb->getProcPllErrRegList();
-        int32_t tmpRC = SUCCESS;
-
-        if( procPllErrRegList.empty() )
-        {
-            GetProcPllErrRegList( i_chip, procPllErrRegList );
-        }
-
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            // Error is already fenced
-            if( (*itr).configReg->IsBitSet(PARITY_ERROR_MASK) )
-            {
-                continue;
-            }
-
-            if( (*itr).errReg->IsBitSet(PARITY_ERROR_BIT) )
-            {
-                (*itr).configReg->SetBit(PARITY_ERROR_MASK);
-                tmpRC = (*itr).configReg->Write();
-                if (tmpRC != SUCCESS)
-                {
-                    PRDF_ERR(PRDF_FUNC "CONFIG_REG write failed"
-                             "for chip: 0x%08x, type: 0x%08x",
-                             (*itr).chip->GetId(), (*itr).type);
-                    rc |= tmpRC;
-                }
-            }
-        }
-
-        // fence off pci parity error
-        SCAN_COMM_REGISTER_CLASS * pciErrReg =
-            i_chip->getRegister("PCI_ERROR_REG");
-        SCAN_COMM_REGISTER_CLASS * pciConfigReg =
-            i_chip->getRegister("PCI_CONFIG_REG");
-
-        if(pciErrReg->IsBitSet(PARITY_ERROR_BIT) &&
-           !pciConfigReg->IsBitSet(PARITY_ERROR_MASK))
-        {
-            pciConfigReg->SetBit(PARITY_ERROR_MASK);
-            tmpRC = pciConfigReg->Write();
-            if (tmpRC != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "PCI_CONFIG_REG write failed"
-                         "for 0x%08x", i_chip->GetId());
-                rc |= tmpRC;
-            }
-        }
-
-        // Since TP_LFIR bit is the collection of all of the
-        // pll error reg bits, we can't mask it or we will not
-        // see any PLL errors reported from the error regs
-
-    } // if not checkstop
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-
-/**
- * @brief  Clear the Parity errors
- * @param  i_chip P8 chip
- * @param  i_sc   The step code data struct
- * @returns Failure or Success
- */
-int32_t ClearParityErr( ExtensibleChip * i_chip,
-                        STEP_CODE_DATA_STRUCT & i_sc)
-{
-    #define PRDF_FUNC "[Proc::ClearParityErr] "
-
-    int32_t rc = SUCCESS;
-
-    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
-    {
-        // Clear proc osc error reg bits
-        P8DataBundle * procdb = getDataBundle( i_chip );
-        P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-                           procdb->getProcPllErrRegList();
-        if( procPllErrRegList.empty() )
-        {
-            GetProcPllErrRegList( i_chip, procPllErrRegList );
-        }
-
-        int32_t tmpRC = SUCCESS;
-
-        for(P8DataBundle::ProcPllErrRegListIter itr =
-            procPllErrRegList.begin();
-            itr != procPllErrRegList.end(); ++itr)
-        {
-            (*itr).errReg->ClearBit(PARITY_ERROR_BIT);
-            tmpRC = (*itr).errReg->Write();
-            if (tmpRC != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "ERROR_REG write failed"
-                         "for chip: 0x%08x, type: 0x%08x",
-                         (*itr).chip->GetId(), (*itr).type);
-                rc |= tmpRC;
-            }
-        }
-
-        // Clear pci parity error
-        SCAN_COMM_REGISTER_CLASS * pciErrReg =
-                i_chip->getRegister("PCI_ERROR_REG");
-        pciErrReg->ClearBit(PARITY_ERROR_BIT);
-        tmpRC = pciErrReg->Write();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_ERROR_REG write failed"
-                     "for 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-
-        // Clear TP_LFIR
-        SCAN_COMM_REGISTER_CLASS * TP_LFIR_and =
-                   i_chip->getRegister("TP_LFIR_AND");
-        TP_LFIR_and->setAllBits();
-        // Parity error also feeds into this LFIR
-        TP_LFIR_and->ClearBit(PLL_DETECT_P8);
-        tmpRC = TP_LFIR_and->Write();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR_AND write failed"
-                     "for 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-    }
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-
-
-/**
-  * @brief   analyze PCB Slave internal parity errors
-  * @param   i_chip P8 chip
-  * @param   io_sc  service data collector
-  * @returns Failure or Success
-  */
-int32_t AnalyzeParityErr( ExtensibleChip * i_chip,
-                          STEP_CODE_DATA_STRUCT & io_sc )
-{
-    #define PRDF_FUNC "[Proc::AnalyzeParityErr] "
-
-    int32_t rc = SUCCESS;
-    bool found = false;
-
-    do
-    {
-        rc = CheckParityErr(i_chip, found, io_sc);
-        if (rc != SUCCESS) break;
-
-        if(found)
-        {
-            if(io_sc.service_data->IsAtThreshold())
-            {
-                MaskParityErr( i_chip, io_sc );
-            }
-
-            ClearParityErr( i_chip, io_sc );
-        }
-
-    } while(0);
-
-    // clear the PLL Err Reg list
-    P8DataBundle * procdb = getDataBundle( i_chip );
-    P8DataBundle::ProcPllErrRegList & procPllErrRegList =
-                        procdb->getProcPllErrRegList();
-    procPllErrRegList.clear();
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X", i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, AnalyzeParityErr );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, AnalyzeParityErr );
-
-} // end namespace Proc
-
-} // end namespace PRDF
diff --git a/src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.C b/src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.C
deleted file mode 100755
index 4d1d556a3..000000000
--- a/src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.C
+++ /dev/null
@@ -1,537 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/diag/prdf/common/plat/pegasus/prdfP8PllPcie.C $       */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-/**
- * @file prdfP8PLL.C
- * @brief chip Plug-in code for proc pll pcie support
- */
-
-#include <iipServiceDataCollector.h>
-#include <prdfExtensibleChip.H>
-#include <prdfPluginMap.H>
-#include <prdfBitString.H>
-#include <iipscr.h>
-#include <prdfPlatServices.H>
-#include <prdfErrlUtil.H>
-#include <iipSystem.h>
-#include <prdfGlobal_common.H>
-#include <prdfP8DataBundle.H>
-#include <UtilHash.H>
-#include <prdfP8PllPcie.H>
-#include <prdfFsiCapUtil.H>
-
-using namespace TARGETING;
-
-namespace PRDF
-{
-
-using namespace PLL;
-using namespace PlatServices;
-
-namespace Proc
-{
-
-int32_t isPllUnlockCausedByPciOscFo( ExtensibleChip * i_chip,
-                                     uint32_t i_activeOscPos,
-                                     bool & o_pciOscSwitchCausedPllError )
-{
-    #define PRDF_FUNC "Proc::isPllUnlockCausedByPciOscFo "
-    int32_t o_rc = SUCCESS;
-    o_pciOscSwitchCausedPllError = false;
-
-    #ifndef __HOSTBOOT_MODULE
-
-    do
-    {
-        uint32_t u32Data = 0;
-        o_rc = getCfam( i_chip, 0x00002819, u32Data );
-
-        if( SUCCESS != o_rc )
-        {
-            PRDF_ERR( PRDF_FUNC "PCI Status register Read failed 0x%08x",
-                      i_chip->GetId() );
-            break;
-        }
-
-        uint32_t pciOscMask = ( 0 == i_activeOscPos ) ? 0x00000C00 : 0x00000300;
-
-        if( !(u32Data & pciOscMask) )
-        {
-            // PLL unlock error has occurred due to problem in secondary or
-            // backup pci osc.
-            o_pciOscSwitchCausedPllError = true;
-        }
-    }while(0);
-
-    #endif
-    #undef PRDF_FUNC
-
-    return o_rc;
-}
-
-/**
-  * @brief Query the PLL chip for a PCI PLL error
-  * @param i_chip P8 Pci chip
-  * @param o_result set to true in the presence of PLL error
-  * @returns Failure or Success of query.
-  */
-int32_t QueryPciPll( ExtensibleChip * i_chip,
-                        bool & o_result)
-{
-    #define PRDF_FUNC "[Proc::QueryPciPll] "
-
-    int32_t rc = SUCCESS;
-    o_result = false;
-
-    SCAN_COMM_REGISTER_CLASS * pciErrReg =
-                i_chip->getRegister("PCI_ERROR_REG");
-    SCAN_COMM_REGISTER_CLASS * pciConfigReg =
-                i_chip->getRegister("PCI_CONFIG_REG");
-
-    do
-    {
-        rc = pciErrReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_ERROR_REG read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        rc = pciConfigReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_CONFIG_REG read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        if(pciErrReg->IsBitSet(PLL_ERROR_BIT) &&
-           !pciConfigReg->IsBitSet(PLL_ERROR_MASK))
-        {
-            o_result = true;
-        }
-
-    } while(0);
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, QueryPciPll );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, QueryPciPll );
-
-/**
-  * @brief Query the PLL chip for a PLL error on P8
-  * @param  i_chip P8 Pci chip
-  * @param o_result set to true in the presence of PLL error
-  * @returns Failure or Success of query.
-  * @note
-  */
-int32_t QueryPllIo( ExtensibleChip * i_chip,
-                        bool & o_result)
-{
-    #define PRDF_FUNC "[Proc::QueryPllIo] "
-
-    int32_t rc = SUCCESS;
-    o_result = false;
-
-    SCAN_COMM_REGISTER_CLASS * TP_LFIR =
-                i_chip->getRegister("TP_LFIR");
-    SCAN_COMM_REGISTER_CLASS * TP_LFIRmask =
-                i_chip->getRegister("TP_LFIR_MASK");
-
-    do
-    {
-        rc = TP_LFIR->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        rc = TP_LFIRmask->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR_MASK read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        if (( TP_LFIRmask->IsBitSet(PLL_DETECT_P8) ) ||
-            ( ! TP_LFIR->IsBitSet(PLL_DETECT_P8) ))
-        {
-            // if global pll bit is not set, break out
-            break;
-        }
-
-        rc = QueryPciPll( i_chip, o_result );
-        if ((rc != SUCCESS) || (true == o_result)) break;
-
-    } while(0);
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, QueryPllIo );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, QueryPllIo );
-
-
-/**
-  * @brief  Clear the PLL error for P8 Plugin
-  * @param  i_chip P8 chip
-  * @param  i_sc   The step code data struct
-  * @returns Failure or Success of query.
-  */
-int32_t ClearPllIo( ExtensibleChip * i_chip,
-                        STEP_CODE_DATA_STRUCT & i_sc)
-{
-    #define PRDF_FUNC "[Proc::ClearPllIo] "
-
-    int32_t rc = SUCCESS;
-
-    if (CHECK_STOP != i_sc.service_data->getPrimaryAttnType())
-    {
-        // Clear pci osc error reg bit
-        int32_t tmpRC = SUCCESS;
-        SCAN_COMM_REGISTER_CLASS * pciErrReg =
-                i_chip->getRegister("PCI_ERROR_REG");
-
-        tmpRC = pciErrReg->Read();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_ERROR_REG read failed"
-                     "for chip: 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-
-        if( pciErrReg->IsBitSet( PLL_ERROR_BIT ) )
-        {
-            pciErrReg->clearAllBits();
-            pciErrReg->SetBit(PLL_ERROR_BIT);
-            tmpRC = pciErrReg->Write();
-
-            if ( SUCCESS != tmpRC )
-            {
-                PRDF_ERR( PRDF_FUNC "Write() failed on PCI Error register: "
-                          "proc=0x%08x", i_chip->GetId() );
-                rc |= tmpRC;
-            }
-        }
-
-        // Clear TP_LFIR
-        SCAN_COMM_REGISTER_CLASS * TP_LFIRand =
-                   i_chip->getRegister("TP_LFIR_AND");
-        TP_LFIRand->setAllBits();
-        TP_LFIRand->ClearBit(PLL_DETECT_P8);
-        tmpRC = TP_LFIRand->Write();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "TP_LFIR_AND write failed"
-                     "for chip: 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-
-        SCAN_COMM_REGISTER_CLASS * oscCerrReg =
-                i_chip->getRegister("OSCERR");
-
-        tmpRC = oscCerrReg->Read();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "OSCERR read failed"
-                     "for 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-        oscCerrReg->ClearBit(4);
-        oscCerrReg->ClearBit(5);
-        tmpRC = oscCerrReg->Write();
-        if (tmpRC != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "oscCerrReg write failed"
-                     "for chip: 0x%08x", i_chip->GetId());
-            rc |= tmpRC;
-        }
-
-    }
-
-    if( rc != SUCCESS )
-    {
-        PRDF_ERR(PRDF_FUNC "failed for proc: 0x%.8X",
-                 i_chip->GetId());
-    }
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, ClearPllIo );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, ClearPllIo );
-
-/**
-  * @brief Mask the PLL error for P8 Plugin
-  * @param  i_chip P8 chip
-  * @param  i_sc   The step code data struct
-  * @param  i_oscPos active osc position
-  * @returns Failure or Success of query.
-  * @note
-  */
-int32_t MaskPllIo( ExtensibleChip * i_chip,
-                 STEP_CODE_DATA_STRUCT & i_sc,
-                 uint32_t i_oscPos )
-{
-    #define PRDF_FUNC "[Proc::MaskPllIo] "
-
-    int32_t rc = SUCCESS;
-
-    do
-    {
-        if (CHECK_STOP == i_sc.service_data->getPrimaryAttnType())
-        {
-            break;
-        }
-
-        if ( i_oscPos >= MAX_PCIE_OSC_PER_NODE )
-        {
-            PRDF_ERR(PRDF_FUNC "invalid oscPos: %d for chip: "
-                     "0x%08x", i_oscPos, i_chip->GetId());
-            rc = FAIL;
-            break;
-        }
-
-        uint32_t oscPos = getIoOscPos( i_chip, i_sc );
-
-        if ( oscPos != i_oscPos )
-        {
-            PRDF_DTRAC(PRDF_FUNC "skip masking for chip: 0x%08x, "
-                      "oscPos: %d, i_oscPos: %d",
-                      i_chip->GetId(), oscPos, i_oscPos);
-            break;
-        }
-
-        // fence off pci osc error reg bit
-        SCAN_COMM_REGISTER_CLASS * pciConfigReg =
-            i_chip->getRegister("PCI_CONFIG_REG");
-
-        rc = pciConfigReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCI_CONFIG_REG read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        if(!pciConfigReg->IsBitSet(PLL_ERROR_MASK))
-        {
-            pciConfigReg->SetBit(PLL_ERROR_MASK);
-            rc = pciConfigReg->Write();
-            if (rc != SUCCESS)
-            {
-                PRDF_ERR(PRDF_FUNC "PCI_CONFIG_REG write failed"
-                         "for chip: 0x%08x",
-                         i_chip->GetId());
-            }
-        }
-
-        // Since TP_LFIR bit is the collection of all of the
-        // pll error reg bits, we can't mask it or we will not
-        // see any PLL errors reported from the error regs
-
-    } while(0);
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, MaskPllIo );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, MaskPllIo );
-
-/**
- * @brief   capture additional PLL FFDC
- * @param   i_chip   P8 chip
- * @param   i_sc     service data collector
- * @returns Success
- */
-int32_t capturePllFfdcIo( ExtensibleChip * i_chip,
-                          STEP_CODE_DATA_STRUCT & io_sc )
-{
-    // Add FSI Osc reg
-    captureFsiStatusReg( i_chip, io_sc );
-
-    return SUCCESS;
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, capturePllFfdcIo );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, capturePllFfdcIo );
-
-/**
- * @brief   calling out active pcie osc connected to this proc
- * @param   i_chip   P8 chip
- * @param   i_sc     service data collector
- * @returns Success
- */
-int32_t CalloutPllIo( ExtensibleChip * i_chip,
-                      STEP_CODE_DATA_STRUCT & io_sc )
-{
-    #define PRDF_FUNC "[Proc::CalloutPllIo] "
-
-    int32_t rc = SUCCESS;
-
-    do
-    {
-        uint32_t oscPos = getIoOscPos( i_chip, io_sc );
-        bool pllUnlockDuetoOscSwitch;
-        rc = isPllUnlockCausedByPciOscFo( i_chip, oscPos,
-                                          pllUnlockDuetoOscSwitch );
-
-        if( SUCCESS != rc )
-        {
-            PRDF_ERR( PRDF_FUNC "PCI Osc switch analysis failed" );
-            break;
-        }
-
-        if( pllUnlockDuetoOscSwitch )
-        {
-            // PLL unlock has occurred due to PCI OSC switchover. We can ignore
-            // this error. It shall be handled seprately as PC OSC switchover
-            // event.
-            break;
-        }
-
-        // oscPos will be checked inside getClockId and in case
-        // a connected osc is not found, will use the proc target
-        // this is the hostboot path since it's used the proc
-        // target and clock type.
-        TargetHandle_t connectedOsc = getClockId( i_chip->GetChipHandle(),
-                                                  TYPE_OSCPCICLK,
-                                                  oscPos );
-
-        if ( NULL == connectedOsc )
-        {
-            PRDF_ERR(PRDF_FUNC "Failed to get connected PCIe OSC for "
-                 "chip 0x%08x, oscPos: %d",i_chip->GetId(), oscPos );
-            connectedOsc = i_chip->GetChipHandle();
-        }
-
-        PRDF_DTRAC(PRDF_FUNC "PCIe OSC: 0x%08x connected to "
-                 "proc: 0x%08x", getHuid(connectedOsc), i_chip->GetId());
-
-        // callout the clock source
-        // HB does not have the osc target modeled
-        // so we need to use the proc target with
-        // osc clock type to call out
-        #ifndef __HOSTBOOT_MODULE
-        io_sc.service_data->SetCallout(connectedOsc);
-        #else
-        io_sc.service_data->SetCallout(
-                            PRDcallout(connectedOsc,
-                            PRDcalloutData::TYPE_PCICLK));
-        #endif
-
-    } while(0);
-
-    return rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, CalloutPllIo );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, CalloutPllIo );
-
-} // end namespace Proc
-
-namespace PLL
-{
-
-uint32_t getIoOscPos( ExtensibleChip * i_chip,
-                      STEP_CODE_DATA_STRUCT & io_sc)
-{
-    #define PRDF_FUNC "[PLL::getIoOscPos] "
-    uint32_t o_oscPos = MAX_PCIE_OSC_PER_NODE;
-
-    do
-    {
-        int32_t rc = SUCCESS;
-
-        // START WORKAROUND
-        // TODO: RTC 137711 - This redundant clock code only applies to Brazos
-        //       systems. Unfortunately, this code made it into the common
-        //       source and we ran into SW324506 where we are unable to SCOM
-        //       PCIE_OSC_SWITCH during OP checkstop analysis. We should have
-        //       a system attribute that tells us if redundant clock are enabled
-        //       but for now just assume anything that is OPAL based will not
-        //       have redundant clocks. Note that we still need this code in
-        //       Hostboot (not HBRT) because Hostboot is still run on a Brazos
-        //       system.
-        if ( isHyprConfigOpal() )
-        {
-            o_oscPos = 0;
-            break;
-        }
-        // END WORKAROUND
-
-        SCAN_COMM_REGISTER_CLASS * pcieOscSwitchReg =
-                i_chip->getRegister("PCIE_OSC_SWITCH");
-
-        rc = pcieOscSwitchReg->Read();
-        if (rc != SUCCESS)
-        {
-            PRDF_ERR(PRDF_FUNC "PCIE_OSC_SWITCH read failed"
-                     "for 0x%08x", i_chip->GetId());
-            break;
-        }
-
-        // [ 16 ] == 1    ( OSC 0 is active )
-        // [ 16 ] == 0    ( OSC 1 is active )
-        if(pcieOscSwitchReg->IsBitSet(16))
-        {
-            o_oscPos = 0;
-        }
-        else
-        {
-            o_oscPos = 1;
-        }
-
-    } while(0);
-
-    return o_oscPos;
-
-    #undef PRDF_FUNC
-}
-
-}// namespace PLL
-
-} // end namespace PRDF
diff --git a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
index 251dfc5aa..dff39b147 100755
--- a/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
+++ b/src/usr/diag/prdf/common/plat/prdfPlatServices_common.H
@@ -508,11 +508,9 @@ mss_MaintCmdWrapper * createIncAddrMssCmd( TARGETING::TargetHandle_t i_mba );
  * @param   o_data   returned data
  * @return  Non-SUCCESS if an internal function fails, SUCCESS otherwise.
  */
-/* TODO RTC 136052
 int32_t getCfam( ExtensibleChip * i_chip,
                  const uint32_t i_addr,
                  uint32_t & o_data);
-*/
 
 /**
  * @brief   get sysref clk target for the given proc target.
diff --git a/src/usr/diag/prdf/common/plat/prdfPllDomain.H b/src/usr/diag/prdf/common/plat/prdfPllDomain.H
index 7cf387c32..0deedf092 100644
--- a/src/usr/diag/prdf/common/plat/prdfPllDomain.H
+++ b/src/usr/diag/prdf/common/plat/prdfPllDomain.H
@@ -166,13 +166,6 @@ protected:
    */
   virtual void Order(ATTENTION_TYPE attentionType);
 
-private:  // functions
-
-  /**
-   * @brief initialize pll chip plugin function names
-   */
-  virtual void InitChipPluginFuncs();
-
 private:  // Data
 
   enum { CONTAINER_SIZE = 8 };
@@ -182,23 +175,10 @@ private:  // Data
 
   Resolution & iv_threshold;
 
-  // This resolution is used for the 2nd pcie osc only
-  // since the redundant pcie oscs are at the node
-  // level and can dynamically switch or config
-  // during the IPL
-  Resolution & iv_threshold2;
-
 #ifndef __HOSTBOOT_MODULE
     hwTableContent iv_dumpContent;
 #endif
 
-  const char * QueryPllFunc;
-  const char * CapturePllFunc;
-  const char * CalloutPllFunc;
-  const char * MaskPllFunc;
-  const char * ClearPllFunc;
-  const char * PostAnalysisPllFunc;
-
 };
 
 //------------------------------------------------------------------------------
@@ -214,12 +194,8 @@ PllDomain::PllDomain( DOMAIN_ID domain_id, Resolution & clockSource,
     farClockSource(clockSource),
     iv_threshold( ResolutionFactory::Access().GetThresholdResolution( 1,
                                 ThresholdResolution::cv_pllDefault,
-                                i_mfgThresh ) ),
-    iv_threshold2( ResolutionFactory::Access().GetThresholdResolution( 1,
-                                ThresholdResolution::cv_pllDefault,
                                 i_mfgThresh ) )
 {
-    InitChipPluginFuncs();
 }
 
 inline
@@ -232,12 +208,8 @@ PllDomain::PllDomain( DOMAIN_ID domain_id, Resolution & secondClockSource,
     farClockSource(clockSource),
     iv_threshold( ResolutionFactory::Access().GetThresholdResolution( 1,
                                 ThresholdResolution::cv_pllDefault,
-                                i_mfgThresh ) ),
-    iv_threshold2( ResolutionFactory::Access().GetThresholdResolution( 1,
-                                ThresholdResolution::cv_pllDefault,
                                 i_mfgThresh ) )
 {
-    InitChipPluginFuncs();
 }
 
 #else // not __HOSTBOOT_MODULE
@@ -253,12 +225,8 @@ PllDomain::PllDomain( DOMAIN_ID domain_id, Resolution & clockSource,
     iv_threshold( ResolutionFactory::Access().GetThresholdResolution( 1,
                                 ThresholdResolution::cv_pllDefault,
                                 i_mfgThresh ) ),
-    iv_threshold2( ResolutionFactory::Access().GetThresholdResolution( 1,
-                                ThresholdResolution::cv_pllDefault,
-                                i_mfgThresh ) ),
     iv_dumpContent(i_hwdc)
 {
-    InitChipPluginFuncs();
 }
 
 inline
@@ -273,12 +241,8 @@ PllDomain::PllDomain( DOMAIN_ID domain_id, Resolution & secondClockSource,
     iv_threshold( ResolutionFactory::Access().GetThresholdResolution( 1,
                                 ThresholdResolution::cv_pllDefault,
                                 i_mfgThresh ) ),
-    iv_threshold2( ResolutionFactory::Access().GetThresholdResolution( 1,
-                                ThresholdResolution::cv_pllDefault,
-                                i_mfgThresh ) ),
     iv_dumpContent(i_hwdc)
 {
-    InitChipPluginFuncs();
 }
 
 #endif // not __HOSTBOOT_MODULE
diff --git a/src/usr/diag/prdf/common/plat/prdfTargetServices.C b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
index 9c8bd2479..aa5a71f78 100755
--- a/src/usr/diag/prdf/common/plat/prdfTargetServices.C
+++ b/src/usr/diag/prdf/common/plat/prdfTargetServices.C
@@ -1442,13 +1442,6 @@ TARGETING::TargetHandle_t getClockId(TARGETING::TargetHandle_t
 
     do
     {
-        if ( i_oscPos >= MAX_PCIE_OSC_PER_NODE )
-        {
-            PRDF_ERR(PRDF_FUNC "target: 0x%.8X - invalid "
-                "i_oscPos: %d", getHuid(i_pGivenTarget), i_oscPos);
-            break;
-        }
-
         // If membuf target, use the connected proc target
         if(TYPE_MEMBUF == getTargetType(i_pGivenTarget))
         {
@@ -1464,9 +1457,7 @@ TARGETING::TargetHandle_t getClockId(TARGETING::TargetHandle_t
 
         PredicateIsFunctional l_funcFilter;
         PredicateCTM l_oscFilter(CLASS_CHIP, i_connType);
-        PredicateCTM l_peerFilter(CLASS_UNIT,
-                                  (i_connType == TYPE_OSCREFCLK ?
-                                   TYPE_REFCLKENDPT: TYPE_PCICLKENDPT));
+        PredicateCTM l_peerFilter(CLASS_UNIT, TYPE_MFREFCLKENDPT);
         PredicatePostfixExpr l_funcAndOscFilter, l_funcAndPeerFilter;
         l_funcAndOscFilter.push(&l_oscFilter).push(&l_funcFilter).And();
         l_funcAndPeerFilter.push(&l_peerFilter).push(&l_funcFilter).And();
diff --git a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
index b7272321e..a328c5af0 100644
--- a/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
+++ b/src/usr/diag/prdf/common/plugins/prdfParserEnums.H
@@ -88,7 +88,6 @@ enum PositionBounds
     MAX_DIMM_PER_PORT   = 2,
     MAX_L4_PER_MEMBUF   = 1,
 
-    MAX_PCIE_OSC_PER_NODE = 2, // TODO: RTC 136052 may need to be removed
     INVALID_POSITION_BOUND = 0xffffffff,
 };
 
diff --git a/src/usr/diag/prdf/plat/pegasus/prdfPllUtils.C b/src/usr/diag/prdf/plat/pegasus/prdfPllUtils.C
deleted file mode 100644
index da83a7391..000000000
--- a/src/usr/diag/prdf/plat/pegasus/prdfPllUtils.C
+++ /dev/null
@@ -1,116 +0,0 @@
-/* IBM_PROLOG_BEGIN_TAG                                                   */
-/* This is an automatically generated prolog.                             */
-/*                                                                        */
-/* $Source: src/usr/diag/prdf/plat/pegasus/prdfPllUtils.C $               */
-/*                                                                        */
-/* OpenPOWER HostBoot Project                                             */
-/*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2014,2015                        */
-/* [+] International Business Machines Corp.                              */
-/*                                                                        */
-/*                                                                        */
-/* Licensed under the Apache License, Version 2.0 (the "License");        */
-/* you may not use this file except in compliance with the License.       */
-/* You may obtain a copy of the License at                                */
-/*                                                                        */
-/*     http://www.apache.org/licenses/LICENSE-2.0                         */
-/*                                                                        */
-/* Unless required by applicable law or agreed to in writing, software    */
-/* distributed under the License is distributed on an "AS IS" BASIS,      */
-/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
-/* implied. See the License for the specific language governing           */
-/* permissions and limitations under the License.                         */
-/*                                                                        */
-/* IBM_PROLOG_END_TAG                                                     */
-
-/** @file prdfPllUtils.C */
-
-#include <prdfExtensibleChip.H>
-#include <prdfTrace.H>
-#include <UtilHash.H>
-#include <prdfPluginDef.H>
-#include <iipServiceDataCollector.h>
-#include <prdfPciOscSwitchDomain.H>
-
-using namespace TARGETING;
-
-namespace PRDF
-{
-
-using namespace PlatServices;
-
-namespace Proc
-{
-
-/**
- * @brief queries if there is PCI osc error.
- * @param   i_procChip       P8 proc chip.
- * @param   o_pciOscError    PCI Osc error status.
- * @return  SUCCESS if query is successful FAIL otherwise.
- */
-int32_t  queryPciOscErr( ExtensibleChip * i_procChip,
-                         bool & o_pciClkSwitchOver )
-{
-    #define PRDF_FUNC "[Proc::queryPciOscErr] "
-
-    int32_t o_rc = FAIL;
-    o_pciClkSwitchOver = false;
-    PRDF_TRAC( PRDF_FUNC "PCI Osc Switch over not expected during hostboot "
-               "HUID: 0x%08x", i_procChip->GetId() );
-
-    return o_rc;
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, queryPciOscErr );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, queryPciOscErr );
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief analyzes PCI osc error and switchover.
- * @param   i_procChip       P8 proc chip.
- * @param   PciOscConnList   PCI osc error data.
- * @return  SUCCESS if analysis is successful FAIL otherwise.
- */
-int32_t analyzePciClkFailover( ExtensibleChip * i_procChip,
-                               PciOscConnList & o_pciOscSwitchData )
-{
-    #define PRDF_FUNC "Proc::analyzePciClkFailover "
-
-    int32_t o_rc = FAIL;
-    PRDF_TRAC( PRDF_FUNC "PCI Osc Switch over not expected during hostboot "
-               "HUID: 0x%08x", i_procChip->GetId() );
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, analyzePciClkFailover );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, analyzePciClkFailover );
-
-//------------------------------------------------------------------------------
-
-/**
- * @brief   cleans up PCI osc error data.
- * @param   i_chip           P8 proc chip.
- * @param   i_faultyOscPos   position of faulty PCI osc.
- * @return  SUCCESS if cleanup is successful FAIL otherwise.
- */
-int32_t clearPciOscFailOver( ExtensibleChip * i_procChip,
-                             PciOscConnList & i_oscData )
-{
-    #define PRDF_FUNC "Proc::clearPciOscFailOver "
-
-    int32_t o_rc = FAIL;
-    PRDF_TRAC( PRDF_FUNC "PCI Osc Switch over not expected during hostboot "
-               "HUID: 0x%08x", i_procChip->GetId() );
-    return o_rc;
-
-    #undef PRDF_FUNC
-}
-PRDF_PLUGIN_DEFINE_NS( NaplesProc, Proc, clearPciOscFailOver );
-PRDF_PLUGIN_DEFINE_NS( MuranoVeniceProc, Proc, clearPciOscFailOver );
-
-} // end namespace Proc
-
-} // end namespace PRDF
-
diff --git a/src/usr/diag/prdf/plat/prdfPlatServices.C b/src/usr/diag/prdf/plat/prdfPlatServices.C
index 35713b32a..1effdf6da 100644
--- a/src/usr/diag/prdf/plat/prdfPlatServices.C
+++ b/src/usr/diag/prdf/plat/prdfPlatServices.C
@@ -227,7 +227,6 @@ TARGETING::TargetHandle_t getMasterCore( TARGETING::TargetHandle_t i_procTgt )
 //##                        util functions
 //##############################################################################
 
-/* TODO RTC 136052
 int32_t getCfam( ExtensibleChip * i_chip,
                  const uint32_t i_addr,
                  uint32_t & o_data)
@@ -256,19 +255,10 @@ int32_t getCfam( ExtensibleChip * i_chip,
         }
 
         errlHndl_t errH = NULL;
-        ecmdDataBufferBase cfamData(32);
-
-        FAPI_INVOKE_HWP(errH,
-                        fapiGetCfamRegister,
-                        PlatServices::getFapiTarget(l_procTgt),
-                        i_addr,
-                        cfamData);
-
-        if ( NULL == errH )
-        {
-            o_data = cfamData.getWord(0);
-        }
-        else
+        size_t l_size = sizeof(uint32_t);
+        errH = deviceRead(l_procTgt, &o_data, l_size,
+                          DEVICE_FSI_ADDRESS((uint64_t) i_addr));
+        if (errH)
         {
             rc = FAIL;
             PRDF_ERR( PRDF_FUNC "chip: 0x%.8X, failed to get cfam address: "
@@ -285,7 +275,6 @@ int32_t getCfam( ExtensibleChip * i_chip,
 
     #undef PRDF_FUNC
 }
-*/
 
 //------------------------------------------------------------------------------