Set up core checkstop escalation using HWP

This commit creates the hostboot functionality around the
p9_core_checkstop_handler HWP. At various points in the IPL when
we want to turn off unit checkstops for system checkstops, and then
later restore them, we call this HWP.

Change-Id: I6f69a9c3a88707f29e4b86e9f4e3b3bd3dfd76b7
RTC: 147565
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/56430
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>

13 files changed, 352 insertions, 78 deletions

diff --git a/src/usr/isteps/istep15/host_build_stop_image.C b/src/usr/isteps/istep15/host_build_stop_image.C
index 86cbfef4f..cbd699e08 100644
--- a/src/usr/isteps/istep15/host_build_stop_image.C
+++ b/src/usr/isteps/istep15/host_build_stop_image.C
@@ -171,11 +171,6 @@ errlHndl_t  applyHcodeGenCpuRegs(  TARGETING::Target *i_procChipTarg,
     l_lpcrVal   &=  ~(0x0000000000002000) ;
     l_lpcrVal   |=    0x0000400000000000  ;  //Allow Hyp virt to exit STOP
 
-//@TODO RTC:147565
-//Force Core Checkstops by telling ACTION1 Reg after coming out of winkle
-// Core FIR Action1 Register value from Nick
-//     const uint64_t action1_reg = 0xEA5C139705980000;
-
     //Get top-lvl system target with TARGETING code to find the enabled threads
     TARGETING::Target* sys = NULL;
     TARGETING::targetService().getTopLevelTarget(sys);
@@ -320,27 +315,6 @@ errlHndl_t  applyHcodeGenCpuRegs(  TARGETING::Target *i_procChipTarg,
         {
             break;
         }
-//@TODO RTC:147565
-//Force Core Checkstops by telling ACTION1 Reg after coming out of winkle
-//@fixme HACK in place for OPAL
-          // Need to force core checkstops to escalate to a system checkstop
-          //  by telling the HCODE to update the ACTION1 register when it
-          //  comes out of winkle  (see HW286670)
-//         l_rc = p8_pore_gen_scom_fixed( io_image,
-//                                        P8_SLW_MODEBUILD_IPL,
-//                                        EX_CORE_FIR_ACTION1_0x10013107,
-//                                        l_coreId,
-//                                        action1_reg,
-//                                        P8_PORE_SCOM_REPLACE,
-//                                        P8_SCOM_SECTION_NC );
-//         if( l_rc )
-//         {
-//             TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-//                        "ERROR: ACTION1: core=0x%x,l_rc=0x%x",
-//                        l_coreId, l_rc );
-//             l_failAddr = EX_CORE_FIR_ACTION1_0x10013107;
-//             break;
-//         }
 
     }   // end for l_coreIds
 
diff --git a/src/usr/isteps/istep16/call_host_activate_master.C b/src/usr/isteps/istep16/call_host_activate_master.C
index 635dd2950..bfdbaef42 100644
--- a/src/usr/isteps/istep16/call_host_activate_master.C
+++ b/src/usr/isteps/istep16/call_host_activate_master.C
@@ -32,7 +32,6 @@
 #include    <errl/errludtarget.H>
 #include    <intr/interrupt.H>
 #include    <console/consoleif.H>
-
 #include <arch/pirformat.H>
 #include <arch/pvrformat.H>
 #include <sys/task.h>
@@ -48,10 +47,13 @@
 //SBE interfacing
 #include    <sbeio/sbeioif.H>
 #include    <sys/misc.h>
+#include    <pm/pm_common.H>
 
 //Import directory (EKB)
 #include    <p9_block_wakeup_intr.H>
 
+#include <scom/scomif.H>
+
 //HWP invoker
 #include    <fapi2/plat_hwp_invoker.H>
 
@@ -361,8 +363,27 @@ void* call_host_activate_master (void *io_pArgs)
                    "Call proc_stop_deadman_timer. Target %.8X",
                    TARGETING::get_huid(l_proc_target) );
 
-        TARGETING::Target* sys = NULL;
-        TARGETING::targetService().getTopLevelTarget(sys);
+
+        // Save off original checkstop values and override them
+        // to disable core xstops and enable sys xstops.
+        l_errl = HBPM::core_checkstop_helper_hwp(l_masterCore, true);
+
+        if( l_errl )
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                       "core_checkstop_helper_hwp ERROR: returning.");
+            break;
+        }
+
+        // Take new checkstop values and insert them into the homer image
+        l_errl = HBPM::core_checkstop_helper_homer();
+
+        if( l_errl )
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                       "core_checkstop_helper_homer ERROR: returning.");
+            break;
+        }
 
     }   while ( 0 );
 
diff --git a/src/usr/isteps/istep16/makefile b/src/usr/isteps/istep16/makefile
index d15782d53..b88ca8684 100644
--- a/src/usr/isteps/istep16/makefile
+++ b/src/usr/isteps/istep16/makefile
@@ -42,6 +42,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/pmlib/include/registers/
+EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/
 
 OBJS += call_host_activate_master.o
 OBJS += call_host_activate_slave_cores.o
diff --git a/src/usr/isteps/istep21/call_host_runtime_setup.C b/src/usr/isteps/istep21/call_host_runtime_setup.C
index a509feafe..461ca5c31 100644
--- a/src/usr/isteps/istep21/call_host_runtime_setup.C
+++ b/src/usr/isteps/istep21/call_host_runtime_setup.C
@@ -806,17 +806,6 @@ void* call_host_runtime_setup (void *io_pArgs)
             break;
         }
 
-#if 0 //@TODO-RTC:147565-Core checkstop escalation
-        // Revert back to standard runtime mode where core checkstops
-        //  do not escalate to system checkstops
-        // Workaround for HW286670
-        l_err = enableCoreCheckstops();
-        if ( l_err )
-        {
-            break;
-        }
-#endif
-
         // Fill in Hostboot runtime data for all nodes
         // (adjunct partition)
         // Write the HB runtime data into mainstore
diff --git a/src/usr/isteps/istep21/call_host_start_payload.C b/src/usr/isteps/istep21/call_host_start_payload.C
index 97653ab71..9b80ae8a3 100644
--- a/src/usr/isteps/istep21/call_host_start_payload.C
+++ b/src/usr/isteps/istep21/call_host_start_payload.C
@@ -30,6 +30,7 @@
 #include <initservice/isteps_trace.H>
 #include <isteps/hwpisteperror.H>
 #include <isteps/istep_reasoncodes.H>
+#include <pm/pm_common.H>
 #include <initservice/initserviceif.H>
 #include <initservice/istepdispatcherif.H>
 #include <secureboot/trustedbootif.H>
@@ -50,12 +51,14 @@
 #include <fapi2/target.H>
 #include <fapi2/plat_hwp_invoker.H>
 #include <p9n2_quad_scom_addresses_fld.H>
+#include <p9_quad_scom_addresses.H>
 #include <ipmi/ipmiwatchdog.H>
 #include <config.h>
 #include <errno.h>
 #include <p9_int_scom.H>
 #include <sbeio/sbeioif.H>
 #include <runtime/runtime.H>
+#include <p9_stop_api.H>
 
 #ifdef CONFIG_DRTM_TRIGGERING
 #include <secureboot/drtm.H>
@@ -290,6 +293,37 @@ void* call_host_start_payload (void *io_pArgs)
         // calculate lowest addressable memory location to be used as COMM base
         uint64_t l_commBase = cpu_spr_value(CPU_SPR_HRMOR) - VMM_HRMOR_OFFSET;
 
+        // About to call shutdown, if we're running on a PHYP system, we need
+        // to switch back to running unit checkstops
+        if(! is_sapphire_load() )
+        {
+            TARGETING::TargetHandleList l_coreTargetList;
+            getAllChips(l_coreTargetList, TYPE_CORE);
+
+            for( auto l_core_target : l_coreTargetList)
+            {
+                l_errl = HBPM::core_checkstop_helper_hwp( l_core_target,
+                                                          false);
+
+                if(l_errl)
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                        "p9_core_checkup_handler_hwp ERROR : Returning "
+                        "errorlog, reason=0x%x",l_errl->reasonCode() );
+
+                    // capture the target data in the elog
+                    ErrlUserDetailsTarget(l_core_target).addToLog( l_errl );
+
+                    break;
+                }
+            }
+        }
+
+        if(l_errl)
+        {
+            break;
+        }
+
         //  - Call shutdown using payload base, and payload entry.
         //      - base/entry will be from system attributes
         //      - this will start the payload (Phyp)
diff --git a/src/usr/isteps/istep21/makefile b/src/usr/isteps/istep21/makefile
index e89430c98..c0ec1114d 100644
--- a/src/usr/isteps/istep21/makefile
+++ b/src/usr/isteps/istep21/makefile
@@ -24,15 +24,18 @@
 # IBM_PROLOG_END_TAG
 ROOTPATH = ../../../..
 MODULE = istep21
+PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures
 
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/initfiles/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/
+EXTRAINCDIR += ${PROCEDURES_PATH}/utils/stopreg/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/
 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/
+EXTRAINCDIR += ${ROOTPATH}/src/usr/isteps/
 
 OBJS += call_host_runtime_setup.o
 OBJS += freqAttrData.o
diff --git a/src/usr/isteps/istepHelperFuncs.C b/src/usr/isteps/istepHelperFuncs.C
index b7ba22e88..9d57300dc 100644
--- a/src/usr/isteps/istepHelperFuncs.C
+++ b/src/usr/isteps/istepHelperFuncs.C
@@ -27,7 +27,7 @@
 
 #include    <trace/interface.H>
 #include    <errl/errlentry.H>
-
+#include    <errl/errlmanager.H>
 #include    <isteps/hwpisteperror.H>
 #include    <errl/errludtarget.H>
 #include    <errl/errlmanager.H>
@@ -42,6 +42,11 @@
 #include    <util/align.H>
 #include    <util/algorithm.H>
 
+using namespace ISTEP;
+using namespace ISTEP_ERROR;
+using namespace TARGETING;
+using namespace ERRORLOG;
+
 //
 //  Helper function to set _EFF_CONFIG attributes for HWPs
 //
@@ -318,6 +323,3 @@ void captureError(errlHndl_t                        &io_err,
     } // end if ( i_err )
 }
 
-
-
-
diff --git a/src/usr/isteps/istepHelperFuncs.H b/src/usr/isteps/istepHelperFuncs.H
index 51d72cd8b..27f8dd133 100644
--- a/src/usr/isteps/istepHelperFuncs.H
+++ b/src/usr/isteps/istepHelperFuncs.H
@@ -70,14 +70,12 @@ enum MSS_PROGRAM_TYPE
     DEFAULT_TYPE = 3,
 };
 
-
 //
 //  Helper function to set _EFF_CONFIG attributes for HWPs
 //
 void set_eff_config_attrs_helper( const EFF_CONFIG_ATTRIBUTES_BASE i_base,
                                   bool & o_post_dram_inits_found);
 
-
 /**
  *  @brief Compares two mcbist targets based on the voltage domain ID for
  *      the voltage domain given by the template parameter.  Used for sorting
diff --git a/src/usr/isteps/makefile b/src/usr/isteps/makefile
index b77651293..b64adc283 100644
--- a/src/usr/isteps/makefile
+++ b/src/usr/isteps/makefile
@@ -24,6 +24,7 @@
 # IBM_PROLOG_END_TAG
 ROOTPATH=../../..
 MODULE = isteps
+PROCEDURES_PATH = ${ROOTPATH}/src/import/chips/p9/procedures
 
 SUBDIRS+=istep06.d
 SUBDIRS+=istep07.d
@@ -50,16 +51,12 @@ SUBDIRS+=fab_iovalid.d
 SUBDIRS+=nest.d
 SUBDIRS+=io.d
 
-OBJS += hwpisteperror.o
-OBJS += hwpistepud.o
-OBJS += istepHelperFuncs.o
-OBJS += pbusLinkSvc.o
-
 #TODO: RTC 176018
 EXTRAINCDIR += ${ROOTPATH}/src/import/
-
-OBJS += $(if $(CONFIG_OPENPOWER_VOLTMSG),openpower_vddr.o,hbToHwsvVoltageMsg.o)
-
+EXTRAINCDIR += ${PROCEDURES_PATH}/hwp/perv/
+EXTRAINCDIR += ${PROCEDURES_PATH}/utils/stopreg/
+EXTRAINCDIR += ${ROOTPATH}/src/include/usr/isteps/pm/
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/common/include/
 EXTRAINCDIR += ${ROOTPATH}/src/usr/initservice/istepdispatcher
 EXTRAINCDIR += ${ROOTPATH}/src/import/hwpf/fapi2/include/
 EXTRAINCDIR += ${ROOTPATH}/src/include/usr/fapi2/
@@ -67,4 +64,13 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/common/utils/imageProcs/
 EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/ffdc/
 
+OBJS += hwpisteperror.o
+OBJS += hwpistepud.o
+OBJS += istepHelperFuncs.o
+OBJS += pbusLinkSvc.o
+
+OBJS += $(if $(CONFIG_OPENPOWER_VOLTMSG),openpower_vddr.o,hbToHwsvVoltageMsg.o)
+
+include ${ROOTPATH}/procedure.rules.mk
 include ${ROOTPATH}/config.mk
+
diff --git a/src/usr/isteps/pm/makefile b/src/usr/isteps/pm/makefile
index 77f7c69cb..a94c026aa 100644
--- a/src/usr/isteps/pm/makefile
+++ b/src/usr/isteps/pm/makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER HostBoot Project
 #
-# Contributors Listed Below - COPYRIGHT 2016
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -29,7 +29,7 @@ MODULE = pm
 SUBDIRS+=runtime.d
 
 ## Objects unique to HB IPL
-
+OBJS += ../istepHelperFuncs.o
 ## Objects common to HB IPL and HBRT
 include pm.mk
 
diff --git a/src/usr/isteps/pm/pm.mk b/src/usr/isteps/pm/pm.mk
index 55e15b1fb..e8e725a35 100644
--- a/src/usr/isteps/pm/pm.mk
+++ b/src/usr/isteps/pm/pm.mk
@@ -42,6 +42,7 @@ EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/xip
 HWP_LIB_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/lib/
 HWP_PM_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/pm
 EXTRAINCDIR += ${HWP_PM_PATH}
+EXTRAINCDIR += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv
 HWP_STOPUTIL_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/utils/stopreg/
 EXTRAINCDIR += ${HWP_STOPUTIL_PATH}
 NEST_UTIL_PATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/nest
@@ -70,6 +71,7 @@ OBJS += p9_avsbus_lib.o
 VPATH += ${HWP_PM_PATH} ${HWP_CUST_PATH} ${HWP_ACC_PATH}
 VPATH += ${HWP_LIB_PATH} ${HWP_STOPUTIL_PATH}
 VPATH += ${NEST_UTIL_PATH}
+VPATH += ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv/
 
 # TODO RTC: 164237
 # Take another look at PM lib
@@ -114,3 +116,4 @@ include ${HWP_PM_PATH}/p9_pm_recovery_ffdc_qppm.mk
 include ${HWP_PM_PATH}/p9_pm_recovery_ffdc_occ.mk
 include ${HWP_PM_PATH}/p9_cme_sram_access.mk
 include ${HWP_PM_PATH}/p9_pm_callout.mk
+include ${ROOTPATH}/src/import/chips/p9/procedures/hwp/perv/p9_core_checkstop_handler.mk
diff --git a/src/usr/isteps/pm/pm_common.C b/src/usr/isteps/pm/pm_common.C
index 0810b7f54..2a42338a2 100644
--- a/src/usr/isteps/pm/pm_common.C
+++ b/src/usr/isteps/pm/pm_common.C
@@ -30,6 +30,7 @@
 #include    <initservice/taskargs.H>
 #include    <errl/errlentry.H>
 #include    <errl/errlreasoncodes.H>
+#include    <errl/errludtarget.H>
 
 // attn/prd call
 #include    <runtime/attnsvc.H>
@@ -75,6 +76,12 @@
 
 #include <isteps/pm/occCheckstop.H>
 
+#include    <p9_core_checkstop_handler.H>
+#include    <p9_stop_api.H>
+#include    <scom/scomif.H>
+#include    <p9_quad_scom_addresses.H>
+
+
 #ifdef CONFIG_ENABLE_CHECKSTOP_ANALYSIS
   #include <diag/prdf/prdfWriteHomerFirData.H>
 #endif
@@ -967,39 +974,92 @@ namespace HBPM
         uint64_t l_homerPhysAddr = 0x0;
         uint64_t l_commonPhysAddr = 0x0;
 
-        for (const auto & l_procChip: l_procChips)
+        do
         {
-            // This attr was set during istep15 HCODE build
-            l_homerPhysAddr = l_procChip->
-                    getAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>();
-            l_commonPhysAddr = l_sys->
-                    getAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR>();
-
-            l_errl = loadPMComplex(l_procChip,
-                                   l_homerPhysAddr,
-                                   l_commonPhysAddr,
-                                   i_mode);
-            if( l_errl )
+            // Switching core checkstops from unit to system
+            TARGETING::TargetHandleList l_coreTargetList;
+            getAllChips(l_coreTargetList, TYPE_CORE);
+
+            if(is_sapphire_load())
+            {
+                for( auto l_core_target : l_coreTargetList )
+                {
+                    l_errl = core_checkstop_helper_hwp(l_core_target, true);
+
+                    if( l_errl )
+                    {
+                        TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               "loadPM complex, switching core checkstops "
+                               "from unit to system ERROR: reason=0x%x",
+                               l_errl->reasonCode() );
+
+                        // Capture the target data in the elog
+                        ERRORLOG::ErrlUserDetailsTarget(l_core_target).
+                                addToLog(l_errl);
+                        break;
+
+                    }
+                }
+            }
+            if(l_errl)
             {
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                           ERR_MRK"loadAndStartPMAll: "
-                           "load PM complex failed!" );
-                o_failTarget = l_procChip;
                 break;
             }
 
-            l_errl = startPMComplex(l_procChip);
+            for (const auto & l_procChip: l_procChips)
+            {
+                // This attr was set during istep15 HCODE build
+                l_homerPhysAddr = l_procChip->
+                        getAttr<TARGETING::ATTR_HOMER_PHYS_ADDR>();
+                l_commonPhysAddr = l_sys->
+                        getAttr<TARGETING::ATTR_OCC_COMMON_AREA_PHYS_ADDR>();
+
+                l_errl = loadPMComplex(l_procChip,
+                                       l_homerPhysAddr,
+                                       l_commonPhysAddr,
+                                       i_mode);
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               ERR_MRK"loadAndStartPMAll: "
+                               "load PM complex failed!" );
+                    o_failTarget = l_procChip;
+                    break;
+                }
+
+                l_errl = startPMComplex(l_procChip);
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                               ERR_MRK"loadAndStartPMAll: "
+                               "start PM complex failed!" );
+                    o_failTarget = l_procChip;
+                    break;
+                }
+            }
+
             if( l_errl )
             {
-                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
-                           ERR_MRK"loadAndStartPMAll: "
-                           "start PM complex failed!" );
-                o_failTarget = l_procChip;
                 break;
             }
-        }
+
+            if(is_sapphire_load())
+            {
+                l_errl = core_checkstop_helper_homer();
+
+                if( l_errl )
+                {
+                    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "loadPM complex switching homer xstops from unit "
+                           "to system error. ERROR: reaso=0x%x",
+                           l_errl->reasonCode() );
+                }
+            }
+
+        }while(0);
 
         return l_errl;
+
     } // loadAndStartPMAll
 
 
@@ -1208,5 +1268,167 @@ namespace HBPM
         return l_err;
     } // end getRingOvd
 
+//
+//  Helper function to enable or disable core checkstops with the HWP
+//
+errlHndl_t core_checkstop_helper_hwp( const TARGETING::Target* i_core_target,
+                            bool i_override_restore)
+{
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,ENTER_MRK
+               "core_checkstop_helper_hwp");
+
+    errlHndl_t l_errl = NULL;
+    TARGETING::Target* l_sys = NULL;
+    TARGETING::targetService().getTopLevelTarget(l_sys);
+    assert( l_sys != NULL );
+
+    do
+    {
+        assert( i_core_target != NULL );
+
+        const fapi2::Target<fapi2::TARGET_TYPE_CORE> l_fapi2_coreTarget(
+                const_cast<TARGETING::Target*> ( i_core_target ));
+
+        FAPI_INVOKE_HWP( l_errl, p9_core_checkstop_handler,
+                         l_fapi2_coreTarget, i_override_restore);
+
+        if( l_errl )
+        {
+            TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                       "p9_core_checkstop_handler ERROR: returning "
+                       "errorlog, reason=0x%x", l_errl->reasonCode() );
+
+            // Capture the target data in the elog
+            ERRORLOG::ErrlUserDetailsTarget(i_core_target).
+                   addToLog( l_errl );
+            break;
+        }
+    }while(0);
+
+    if( l_errl )
+    {
+        // Commit Error
+        errlCommit( l_errl, HWPF_COMP_ID );
+    }
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,EXIT_MRK
+               "core_checkstop_helper_hwp");
+
+    return l_errl;
+}
+
+//
+//  Helper function to disable core checkstops with the HOMER
+//
+errlHndl_t core_checkstop_helper_homer()
+{
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,ENTER_MRK
+               "core_checkstop_helper_homer");
+
+    errlHndl_t l_errl = NULL;
+    TARGETING::Target* l_sys = NULL;
+    TARGETING::targetService().getTopLevelTarget(l_sys);
+    assert( l_sys != NULL );
+
+    do{
+
+        uint64_t l_action0 = l_sys->getAttr<
+                    TARGETING::ATTR_ORIG_FIR_SETTINGS_ACTION0>();
+        uint64_t l_action1 = l_sys->getAttr<
+                    TARGETING::ATTR_ORIG_FIR_SETTINGS_ACTION1>();
+
+        uint64_t l_local_xstop = l_action0 & l_action1;
+        l_action0 &= ~l_local_xstop;
+        l_action1 &= ~l_local_xstop;
+
+        TARGETING::TargetHandleList l_coreIds;
+        getAllChiplets( l_coreIds, TYPE_CORE, true );
+
+        for(TARGETING::Target* l_core : l_coreIds)
+        {
+            const TARGETING::Target* l_procChip =
+                        TARGETING::getParentChip(l_core);
+
+            const uint64_t l_homerAddr = l_procChip->getAttr<
+                        TARGETING::ATTR_HOMER_PHYS_ADDR>();
+
+            void* l_homerVAddr = HBPM::convertHomerPhysToVirt(
+                                (TARGETING::Target*) l_procChip,
+                                l_homerAddr);
+
+            // Translate the scom address
+            uint64_t l_scomAddr = C_CORE_ACTION0;
+            bool l_needsWakeup = false; // Ignored - SW already enabled
+
+            l_errl = SCOM::scomTranslate( l_core, l_scomAddr,
+                                          l_needsWakeup );
+            if( l_errl )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, ERR_MRK
+                           "core_checkstop_helper: scomTranslate ERROR");
+                break;
+            }
+
+            stopImageSection::StopReturnCode_t l_srErrl =
+                                p9_stop_save_scom( l_homerVAddr,
+                                l_scomAddr, l_action0,
+                                stopImageSection::P9_STOP_SCOM_REPLACE,
+                                stopImageSection::P9_STOP_SECTION_CORE_SCOM );
+
+            if( l_srErrl != stopImageSection::StopReturnCode_t::
+                                STOP_SAVE_SUCCESS )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "core_checkstop_helper: Returning errorlog, "
+                           "reason=0x%x",l_srErrl );
+
+                break;
+            }
+
+            // Translate the scom address
+            l_scomAddr = C_CORE_ACTION1;
+
+            l_errl = SCOM::scomTranslate(l_core, l_scomAddr,
+                                l_needsWakeup);
+
+            if( l_errl )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace, ERR_MRK
+                           "core_checkstop_helper: scomTranslate ERROR");
+                break;
+            }
+
+            l_srErrl = p9_stop_save_scom( l_homerVAddr,
+                                l_scomAddr, l_action1,
+                                stopImageSection::P9_STOP_SCOM_REPLACE,
+                                stopImageSection::P9_STOP_SECTION_CORE_SCOM );
+
+            if( l_srErrl != stopImageSection::StopReturnCode_t::
+                                STOP_SAVE_SUCCESS )
+            {
+                TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,
+                           "core_checkstop_helper: Returning errorlog, "
+                           "reason=0x%x",l_srErrl );
+
+                break;
+            }
+
+        }
+    } while(0);
+
+    if( l_errl )
+    {
+        // Commit Error
+        errlCommit( l_errl, HWPF_COMP_ID );
+    }
+
+    TRACFCOMP( ISTEPS_TRACE::g_trac_isteps_trace,EXIT_MRK
+               "core_checkstop_helper_homer");
+
+    return l_errl;
+
+}
+
+
 }  // end HBPM namespace
 
diff --git a/src/usr/isteps/pm/pm_common.H b/src/usr/isteps/pm/pm_common.H
index 416e0fa3f..6d167dbda 100644
--- a/src/usr/isteps/pm/pm_common.H
+++ b/src/usr/isteps/pm/pm_common.H
@@ -30,6 +30,7 @@
 #include <util/utillidmgr.H>
 #include <diag/prdf/prdfWriteHomerFirData.H>
 #include <isteps/pm/pm_common_ext.H>
+#include <istepHelperFuncs.H>
 
 namespace HBPM
 {
@@ -154,6 +155,26 @@ namespace HBPM
      */
     errlHndl_t resetPMComplex(TARGETING::Target * i_target);
 
+    //
+    // @brief - Handles the core_checkstop_handler HWP
+    //
+    // @param[in] i_core_target      - Core Target ID
+    // @param[in] i_override_restore - settings for the HWP. Are we overriding
+    //                                 the xstop settings (true) or restoring
+    //                                 the original settings (false)
+    //
+    // @return errlHndl_t
+
+    errlHndl_t core_checkstop_helper_hwp(
+                                const TARGETING::Target* i_core_target,
+                                bool i_override_restore);
+    //
+    // @brief - Turns off unit xstops in the homer image
+    //
+    // @return errlHndl_t
+
+    errlHndl_t core_checkstop_helper_homer();
+
 } //namespace HBPM ends
 
 #endif